Searched full:unified (Results 1 – 25 of 38) sorted by relevance
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74 # @l2: L2 (unified) cache.76 # @l3: L3 (unified) cache
42 * Interface is designed for providing unified interface
5 virtual addressing (SVA) to provide a unified programming interface for8 UADK includes Unified/User-space-access-intended Accelerator Framework (UACCE),
21 .syntax unified
23 .syntax unified
146 "Primary Data or Unified Primary", in helper_cache()
2 * Unified Hosting Interface syscalls.
100 * and we use a unified interval tree. For system, we use a
171 - Unified Hosting Interface (MD01069)700 configuration, and optionally a unified L2 per-core cache when a given working758 - Simulates a unified L2 cache (stores blocks for both
196 [2] "Unified Extensible Firmware Interface Specification",
286 /* Unified MMU. */
189 tlb_t utlb[UTLB_SIZE]; /* unified translation table */
174 #define XCHAL_NUM_URAM 0 /* number of core unified RAMs*/
170 #define XCHAL_NUM_URAM 0 /* number of core unified RAMs*/
217 #define XCHAL_NUM_URAM 0 /* number of core unified RAMs*/
210 #define XCHAL_NUM_URAM 0 /* number of core unified RAMs*/
220 #define XCHAL_NUM_URAM 0 /* number of core unified RAMs*/
523 cpu->ccsidr[2] = 0x711fe07a; /* 4096K L2 unified cache */ in cortex_a7_initfn()570 cpu->ccsidr[2] = 0x711fe07a; /* 4096K L2 unified cache */ in cortex_a15_initfn()
245 #define XCHAL_NUM_URAM 0 /* number of core unified RAMs*/
722 /* Prefer a unified memory GPU. Failing that, pick a non-removable GPU. */
287 #define XCHAL_NUM_URAM 0 /* number of core unified RAMs*/
291 #define XCHAL_NUM_URAM 0 /* number of core unified RAMs*/
5 * Unified block-device I/O interface for Xen guest OSes.
309 #define XCHAL_NUM_URAM 0 /* number of core unified RAMs*/
394 #define XCHAL_NUM_URAM 0 /* number of core unified RAMs*/