Searched full:typical (Results 1 – 25 of 40) sorted by relevance
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7 workloads that are typical of large enterprise applications such as SAP ERP55 XBZRLE has a sustained bandwidth of 2-2.5 GB/s for typical workloads making it
24 about 70% in a typical case. In addition to this, the VM downtime can be
46 accesses and data read from guest memory must be validated. A typical example75 typical "theory of operation" presented in driver writer manuals. The guest
184 This section explains the typical usage patterns for ``QemuLockCnt`` functions.
331 Reset of the complete system is a little complicated. The typical
22 ``-nographic`` option. The typical command line is:
18 multi-boot capability. A typical example would look like:
17 * memory location (e.g., typical futex-based implementations of Pthreads
127 This is a typical interchange of messages when using the passthru card device.137 A typical interchange is (the arrow shows who started each exchange, it can be client
51 on typical modern Linux distributions.
49 * A typical PCI OHCI will additionally set PERR in its configspace to
40 * char *password = "a-typical-awful-user-password";
129 * Typical input visitor usage involves:164 * Typical output visitor usage:233 * created by the QAPI generator. It is used as a typical
126 console output. Typical use case is to break a boot loader prompt, such:
16 * Typical users are user interfaces (gtk), remote access protocols
91 found by the sysconf system call. A typical value of clock ticks per second is
186 Typical usecases
200 * erasure based on CFI address 0x21 which is "Typical timeout per individual749 /* Typical timeout for block erase (512 ms) */ in pflash_cfi02_fill_cfi_table()751 /* Typical timeout for full chip erase (4096 ms) */ in pflash_cfi02_fill_cfi_table()
744 /* Typical timeout for block erase */ in pflash_cfi01_fill_cfi_table()746 /* Typical timeout for full chip erase (4096 ms) */ in pflash_cfi01_fill_cfi_table()
270 * Read from the backend (blocking). A typical front-end will instead rely
39 * It has several weird behaviours which don't match typical hardware
17 /// parameters and resolved at compile-time. A typical use is a function
56 * These are typical.
249 * because it's not a typical init flow.
317 * typical implementation does in pci_bridge_reset()