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Searched full:tx2 (Results 1 – 4 of 4) sorted by relevance

/qemu/target/riscv/
H A Dvector_internals.h131 /* (TD, T2, TX2) */
137 /* (TD, T1, T2, TX1, TX2) */
143 #define OPIVV1(NAME, TD, T2, TX2, HD, HS2, OP) \ argument
146 TX2 s2 = *((T2 *)vs2 + HS2(i)); \
182 #define OPIVV2(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ argument
186 TX2 s2 = *((T2 *)vs2 + HS2(i)); \
210 #define OPIVX2(NAME, TD, T1, T2, TX1, TX2, HD, HS2, OP) \ argument
213 TX2 s2 = *((T2 *)vs2 + HS2(i)); \
232 /* (TD, T1, T2, TX1, TX2) */
H A Dvector_helper.c897 /* (TD, T1, T2, TX1, TX2) */
1931 #define OPIVV3(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ argument
1935 TX2 s2 = *((T2 *)vs2 + HS2(i)); \
1977 #define OPIVX3(NAME, TD, T1, T2, TX1, TX2, HD, HS2, OP) \ argument
1980 TX2 s2 = *((T2 *)vs2 + HS2(i)); \
2182 #define OPIVV2_RM(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ argument
2188 TX2 s2 = *((T2 *)vs2 + HS2(i)); \
2310 #define OPIVX2_RM(NAME, TD, T1, T2, TX1, TX2, HD, HS2, OP) \ argument
2315 TX2 s2 = *((T2 *)vs2 + HS2(i)); \
3102 #define OPFVV2(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ in RVVCALL() argument
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/qemu/tests/qtest/
H A Dahci-test.c1441 g_autofree unsigned char *tx2 = g_malloc(bufsize); in test_reset_pending_callback() local
1464 generate_pattern(tx2, bufsize, AHCI_SECTOR_SIZE); in test_reset_pending_callback()
1465 } while (memcmp(tx1, tx2, bufsize) == 0); in test_reset_pending_callback()
1468 qtest_bufwrite(ahci->parent->qts, ptr2, tx2, bufsize); in test_reset_pending_callback()
1500 g_assert_cmphex(memcmp(tx2, rx2, bufsize), ==, 0); in test_reset_pending_callback()
/qemu/include/standard-headers/drm/
H A Ddrm_fourcc.h933 * 0 = Tegra K1 - Tegra Parker/TX2 Layout.