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/linux-6.15/drivers/gpu/drm/xe/
Dxe_tuning.c21 { XE_RTP_NAME("Tuning: Blend Fill Caching Optimization Disable"),
25 { XE_RTP_NAME("Tuning: 32B Access Enable"),
32 { XE_RTP_NAME("Tuning: L3 cache"),
37 { XE_RTP_NAME("Tuning: L3 cache - media"),
42 { XE_RTP_NAME("Tuning: Compression Overfetch"),
47 { XE_RTP_NAME("Tuning: Compression Overfetch - media"),
52 { XE_RTP_NAME("Tuning: Enable compressible partial write overfetch in L3"),
56 { XE_RTP_NAME("Tuning: Enable compressible partial write overfetch in L3 - media"),
60 { XE_RTP_NAME("Tuning: L2 Overfetch Compressible Only"),
65 { XE_RTP_NAME("Tuning: L2 Overfetch Compressible Only - media"),
[all …]
/linux-6.15/Documentation/devicetree/bindings/mmc/
Dfsl-imx-esdhc.yaml133 fsl,tuning-start-tap:
136 Specify the start delay cell point when send first CMD19 in tuning procedure.
139 fsl,tuning-step:
142 Specify the increasing delay cell steps in tuning procedure.
143 The uSDHC use one delay cell as default increasing step to do tuning process.
144 This property allows user to change the tuning step to more than one delay
146 tuning step can't find the proper delay window within limited tuning retries.
Drockchip-dw-mshc.yaml48 # for Rockchip RK3576 with phase tuning inside the controller
76 to control the clock phases, "ciu-sample" is required for tuning
89 low speeds or in case where all phases work at tuning time.
98 The desired number of times that the host execute tuning when needed.
99 If not specified, the host will do tuning for 360 times,
100 namely tuning for each degree.
/linux-6.15/drivers/mmc/host/
Dsdhci-esdhc-imx.c71 /* Tuning bits */
107 /* NOTE: the minimum valid tuning start tap for mx6sl is 1 */
155 /* The IP supports manual tuning process */
157 /* The IP supports standard tuning process */
235 unsigned int tuning_step; /* The delay cell steps in tuning procedure */
236 unsigned int tuning_start_tap; /* The start delay cell point in tuning procedure */
452 /* Enable the auto tuning circuit to check the CMD line and BUS line */
475 * For USDHC, auto tuning circuit can not handle the async sdio in usdhc_auto_tuning_mode_sel_and_en()
478 * tuning circuit check these 4 data lines, include the DAT[1], in usdhc_auto_tuning_mode_sel_and_en()
482 * device, config the auto tuning circuit only check DAT[0] and CMD in usdhc_auto_tuning_mode_sel_and_en()
[all …]
Dsdhci-of-esdhc.c436 /* Starting SW tuning requires ESDHC_SMPCLKSEL to be set in esdhc_be_writew()
462 /* Starting SW tuning requires ESDHC_SMPCLKSEL to be set in esdhc_le_writew()
1050 /* Program the software tuning mode by setting TBCTL[TB_MODE]=2'h3 */ in esdhc_execute_sw_tuning()
1073 /* For tuning mode, the sd clock divisor value in esdhc_execute_tuning()
1084 * during tuning. If the SD card is too slow sending the response, the in esdhc_execute_tuning()
1086 * is triggered. This leads to tuning errors. in esdhc_execute_tuning()
1100 /* Do HW tuning */ in esdhc_execute_tuning()
1110 /* For type2 affected platforms of the tuning erratum, in esdhc_execute_tuning()
1111 * tuning may succeed although eSDHC might not have in esdhc_execute_tuning()
1112 * tuned properly. Need to check tuning window. in esdhc_execute_tuning()
[all …]
Ddw_mmc-hi3798mv200.c113 * HiSilicon implemented a tuning mechanism. in dw_mci_hi3798mv200_execute_tuning_mix_mode()
159 * We don't care what timing we are tuning for, in dw_mci_hi3798mv200_execute_tuning_mix_mode()
160 * simply use the same phase for all timing needs tuning. in dw_mci_hi3798mv200_execute_tuning_mix_mode()
167 dev_dbg(host->dev, "Tuning clk_sample[%d, %d], set[%d]\n", in dw_mci_hi3798mv200_execute_tuning_mix_mode()
Dsdhci-of-dwcmshc.c42 /* Tuning and auto-tuning fields in AT_CTRL_R control register */
47 #define AT_CTRL_SW_TUNE_EN BIT(4) /* enable software managed tuning */
489 * Tuning can leave the IP in an active state (Buffer Read Enable bit in dwcmshc_execute_tuning()
786 * configure tuning settings: in th1520_execute_tuning()
789 * - disable software managed tuning in th1520_execute_tuning()
791 * instead tuning calculated edges are used in th1520_execute_tuning()
797 * configure tuning settings: in th1520_execute_tuning()
798 * - enable auto-tuning in th1520_execute_tuning()
813 /* perform tuning */ in th1520_execute_tuning()
818 /* disable auto-tuning upon tuning error */ in th1520_execute_tuning()
[all …]
/linux-6.15/drivers/ata/
Dpata_cs5530.c49 u32 tuning; in cs5530_set_piomode() local
53 tuning = ioread32(base + 0x04); in cs5530_set_piomode()
54 format = (tuning & 0x80000000UL) ? 1 : 0; in cs5530_set_piomode()
76 u32 tuning, timing = 0; in cs5530_set_dmamode() local
80 tuning = ioread32(base + 0x04); in cs5530_set_dmamode()
99 timing |= (tuning & 0x80000000UL); in cs5530_set_dmamode()
104 tuning |= 0x00100000; /* UDMA for both */ in cs5530_set_dmamode()
106 tuning &= ~0x00100000; /* MWDMA for both */ in cs5530_set_dmamode()
107 iowrite32(tuning, base + 0x04); in cs5530_set_dmamode()
/linux-6.15/Documentation/devicetree/bindings/phy/
Drealtek,usb3phy.yaml69 realtek,amplitude-control-coarse-tuning:
72 This value is a parameter for coarse tuning.
80 realtek,amplitude-control-fine-tuning:
83 This value is used for fine-tuning parameters.
106 realtek,amplitude-control-coarse-tuning = <0x77>;
Dqcom,qusb2-phy.yaml81 tuning parameter value for qusb2 phy.
92 tuning parameter that may vary for different boards of same SOC.
101 tuning parameter that may vary for different boards of same SOC.
110 tuning parameter that may vary for different boards of same SOC.
118 It is a 4 bit value that specifies tuning for HSTX
150 It is a 2 bit value tuning parameter that control disconnect
Dphy-stm32-usbphyc.yaml118 st,enable-fs-rftime-tuning:
119 description: Enables the FS rise/fall tuning option
152 Controls HS driver impedance tuning for choke compensation
259 st,enable-fs-rftime-tuning;
277 st,enable-fs-rftime-tuning;
/linux-6.15/Documentation/userspace-api/media/dvb/
Dfe-set-frontend.rst31 Points to parameters for tuning operation.
36 This ioctl call starts a tuning operation using specified parameters.
38 and the tuning could be initiated. The result of the tuning operation in
/linux-6.15/Documentation/devicetree/bindings/regulator/
Dmediatek,mt6358-regulator.yaml79 description: LDOs with fixed 1.2V output and 0~100/10mV tuning
88 LDOs with fixed 1.8V output and 0~100/10mV tuning (vcn18 on MT6366 has variable output)
96 description: LDOs with fixed 2.2V output and 0~100/10mV tuning
104 description: LDOs with fixed 2.8V output and 0~100/10mV tuning
112 description: LDOs with fixed 3.0V output and 0~100/10mV tuning
128 description: LDOs with variable output and 0~100/10mV tuning
/linux-6.15/Documentation/devicetree/bindings/iio/proximity/
Dams,as3935.yaml31 ams,tuning-capacitor-pf:
34 Calibration tuning capacitor stepping value. This will require using
70 ams,tuning-capacitor-pf = <80>;
/linux-6.15/Documentation/ABI/testing/
Dsysfs-fs-ext415 requests to a multiple of this tuning parameter if the
36 Tuning parameter which controls the minimum size for
55 Tuning parameter which controls the maximum number of
87 Tuning parameter which (if non-zero) controls the goal
/linux-6.15/Documentation/mm/damon/
Ddesign.rst271 Monitoring Parameters Tuning Guide
316 Based on the manual tuning guide, DAMON provides more intuitive knob-based
317 intervals auto tuning mechanism. Please refer to :ref:`the design document of
320 Refer to below documents for an example tuning based on the above guide.
330 Monitoring Intervals Auto-tuning
333 DAMON provides automatic tuning of the ``sampling interval`` and ``aggregation
334 interval`` based on the :ref:`the tuning guide idea
335 <damon_design_monitoring_params_tuning_guide>`. The tuning mechanism allows
357 be set by the tuning mechanism using two parameters (``min_sample_us`` and
358 ``max_sample_us``). Because the tuning mechanism changes ``sampling interval``
[all …]
/linux-6.15/drivers/net/wireless/ralink/rt2x00/
Drt2x00link.c10 Abstract: rt2x00 generic link tuning routines.
232 * While scanning, link tuning is disabled. By default in rt2x00link_start_tuner()
265 * device should only perform link tuning during the in rt2x00link_reset_tuner()
309 * Update quality RSSI for link tuning, in rt2x00link_tuner_sta()
320 * Check if link tuning is supported by the hardware, some hardware in rt2x00link_tuner_sta()
321 * do not support link tuning at all, while other devices can disable in rt2x00link_tuner_sta()
349 * immediately cease all link tuning. in rt2x00link_tuner()
/linux-6.15/include/linux/mmc/
Dhost.h224 /* The tuning command opcode value is different for SD and eMMC cards */
230 /* Execute HS400 tuning depending host driver */
233 /* Optional callback to prepare for SD high-speed tuning */
236 /* Optional callback to execute SD high-speed tuning */
488 unsigned int doing_init_tune:1; /* initial tuning in progress */
489 unsigned int can_retune:1; /* re-tuning can be used */
490 unsigned int doing_retune:1; /* re-tuning in progress */
491 unsigned int retune_now:1; /* do re-tuning at next req */
492 unsigned int retune_paused:1; /* re-tuning is temporarily disabled */
500 int need_retune; /* re-tuning is needed */
[all …]
/linux-6.15/drivers/staging/iio/Documentation/
Dsysfs-bus-iio-dds6 Stores frequency into tuning word Y.
10 can control the desired active tuning word by writing Y to the
26 Specifies the active output frequency tuning word. The value
/linux-6.15/drivers/staging/iio/frequency/
Dad9832.h17 * @freq0: power up freq0 tuning word in Hz
18 * @freq1: power up freq1 tuning word in Hz
Dad9832.c83 * @freq_xfer: tuning word spi transfer
84 * @freq_msg: tuning word spi message
85 * @phase_xfer: tuning word spi transfer
86 * @phase_msg: tuning word spi message
89 * @phase_data: tuning word spi transmit buffer
90 * @freq_data: tuning word spi transmit buffer
/linux-6.15/Documentation/admin-guide/mm/damon/
Dusage.rst137 ``aggr_us`` files of the kdamond with the auto-tuning applied ``sampling
227 Under the ``intervals`` directory, one directory for automated tuning of
229 Under the directory, four files for the auto-tuning control, namely
232 <damon_design_monitoring_intervals_autotuning>` for the internal of the tuning
234 directory shows and updates the tuning parameters that described in the
236 names. The tuning starts with the user-set ``sample_us`` and ``aggr_us``. The
237 tuning-applied current values of the two intervals can be read from the
384 The directory for the :ref:`automatic quota tuning goals
395 parameters for the quota auto-tuning goals that specified on the :ref:`design
493 online analysis or tuning of the schemes. Refer to :ref:`design doc
/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/inc/
Dsmu_v13_0_pptable.h70 …URE_MEMORY_TIMING_TUNE = 1 << SMU_13_0_ODCAP_MEMORY_TIMING_TUNE, //AC Timing Tuning feature
153 …od_turbo_power_limit; //Power limit setting for Turbo mode in Performance UI Tuning.
154 …e_power_limit; //Power limit setting for PowerSave/Optimal mode in Performance UI Tuning.
Dsmu_v11_0_pptable.h70 …URE_MEMORY_TIMING_TUNE = 1 << SMU_11_0_ODCAP_MEMORY_TIMING_TUNE, //AC Timing Tuning feature
151 …od_turbo_power_limit; //Power limit setting for Turbo mode in Performance UI Tuning.
152 …e_power_limit; //Power limit setting for PowerSave/Optimal mode in Performance UI Tuning.
/linux-6.15/Documentation/admin-guide/sysctl/
Dindex.rst72 filehandle, inode, dentry and quota tuning
74 kernel/ global kernel info / tuning
80 vm/ memory management tuning

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