| /linux-5.10/Documentation/devicetree/bindings/timer/ |
| D | mediatek,mtk-timer.txt | 1 MediaTek Timers
4 MediaTek SoCs have two different timers on different platforms,
13 * "mediatek,mt2701-timer" for MT2701 compatible timers (GPT)
14 * "mediatek,mt6580-timer" for MT6580 compatible timers (GPT)
15 * "mediatek,mt6589-timer" for MT6589 compatible timers (GPT)
16 * "mediatek,mt7623-timer" for MT7623 compatible timers (GPT)
17 * "mediatek,mt8127-timer" for MT8127 compatible timers (GPT)
18 * "mediatek,mt8135-timer" for MT8135 compatible timers (GPT)
19 * "mediatek,mt8173-timer" for MT8173 compatible timers (GPT)
20 * "mediatek,mt8516-timer" for MT8516 compatible timers (GPT)
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| D | samsung,exynos4210-mct.yaml | 14 global timer and CPU local timers. The global timer is a 64-bit free running
16 four preset counter values. The CPU local timers are 32-bit free running
52 For MCT block that uses a per-processor interrupt for local timers, such
54 interrupt might be specified, meaning that all local timers use the same
70 // In this example, the IP contains two local timers, using separate
111 // In this example, the IP contains four local timers, but using
131 // In this example, the IP contains four local timers, but using
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| D | andestech,atcpit100-timer.txt | 6 This timer is a set of compact multi-function timers, which can be
7 used as pulse width modulators (PWM) as well as simple timers.
12 Two 16-bit timers
13 Four 8-bit timers
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| D | ti,davinci-timer.txt | 5 timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
6 timers, each half can operate in conjunction (chain mode) or independently
12 Also see ../watchdog/davinci-wdt.txt for timers that are configurable as
13 watchdog timers.
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| /linux-5.10/drivers/staging/media/atomisp/pci/ |
| D | gp_timer_defs.h | 24 #define HIVE_GP_TIMER_VALUE_REG_IDX(timer, timers) (HIVE_GP_TIMER_ENABLE_REG_IDX(time… argument
25 …efine HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timer, timers) (HIVE_GP_TIMER_VALUE_REG_IDX(timers… argument
26 …e HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(timer, timers) (HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timer… argument
27 …HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(irq, timers) (HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(time… argument
28 …IVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irq, timers, irqs) (HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(… argument
29 …e HIVE_GP_TIMER_IRQ_ENABLE_REG_IDX(irq, timers, irqs) (HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_ID… argument
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| /linux-5.10/arch/powerpc/sysdev/ |
| D | fsl_gtm.c | 3 * Freescale General-purpose Timers Module
72 struct gtm_timer timers[4]; member
95 for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) { in gtm_get_timer16()
96 if (!gtm->timers[i].requested) { in gtm_get_timer16()
97 gtm->timers[i].requested = true; in gtm_get_timer16()
99 return >m->timers[i]; in gtm_get_timer16()
132 if (gtm->timers[timer].requested) in gtm_get_specific_timer16()
135 ret = >m->timers[timer]; in gtm_get_specific_timer16()
169 int num = tmr - >m->timers[0]; in gtm_set_ref_timer16()
206 * Properly reset timers: stop, reset, set up prescalers, reference in gtm_set_ref_timer16()
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| /linux-5.10/Documentation/timers/ |
| D | hrtimers.rst | 2 hrtimers - subsystem for high-resolution kernel timers
5 This patch introduces a new subsystem for high-resolution kernel timers.
8 (kernel/timers.c), why do we need two timer subsystems? After a lot of
18 - the forced handling of low-resolution and high-resolution timers in
20 mess. The timers.c code is very "tightly coded" around jiffies and
27 high-res timers.
30 necessitate a more complex handling of high resolution timers, which
34 degrading other portions of the timers.c code in an unacceptable way.
38 the required readjusting of absolute CLOCK_REALTIME timers at
41 timers.
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| D | highres.rst | 2 High resolution timers and dynamic ticks design notes
34 the base implementation are covered in Documentation/timers/hrtimers.rst. See
38 timers are:
64 Timers" was written by J. Stultz, D.V. Hart, & N. Aravamudan.
82 functionality like high resolution timers or dynamic ticks.
102 accounting, profiling, and high resolution timers.
134 enabling of high resolution timers and dynamic ticks is simply provided by
156 configured for high resolution timers can run on a system which lacks the
167 The time ordered insertion of timers provides all the infrastructure to decide
175 from the clock event distribution code and moves expired timers from the
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| /linux-5.10/drivers/clocksource/ |
| D | bcm_kona_timer.c | 42 static struct kona_bcm_timers timers; variable
47 * We use the peripheral timers for system tick, the cpu global timer for
110 * timer-interrupt->set_next_event. CPU local timers, when in kona_timer_set_next_event()
118 ret = kona_timer_get_counter(timers.tmr_regs, &msw, &lsw); in kona_timer_set_next_event()
123 writel(lsw + clc, timers.tmr_regs + KONA_GPTIMER_STCM0_OFFSET); in kona_timer_set_next_event()
126 reg = readl(timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET); in kona_timer_set_next_event()
128 writel(reg, timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET); in kona_timer_set_next_event()
135 kona_timer_disable_and_clear(timers.tmr_regs); in kona_timer_shutdown()
158 kona_timer_disable_and_clear(timers.tmr_regs); in kona_timer_interrupt()
181 timers.tmr_irq = irq_of_parse_and_map(node, 0); in kona_timer_init()
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| D | timer-probe.c | 21 unsigned timers = 0; in timer_probe() local
38 timers++; in timer_probe()
41 timers += acpi_probe_device_table(timer); in timer_probe()
43 if (!timers) in timer_probe()
44 pr_crit("%s: no matching timers found\n", __func__); in timer_probe()
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| /linux-5.10/drivers/remoteproc/ |
| D | omap_remoteproc.c | 92 * @num_wd_timers: number of rproc watchdog timers
93 * @timers: timer(s) info used by rproc
110 struct omap_rproc_timer *timers; member
262 * timers associated with a rproc (like IPUs which have 2 watchdog timers,
276 struct omap_rproc_timer *timers = oproc->timers; in omap_rproc_watchdog_isr() local
282 if (timers[i].irq > 0 && irq == timers[i].irq) { in omap_rproc_watchdog_isr()
283 wd_timer = &timers[i]; in omap_rproc_watchdog_isr()
301 * omap_rproc_enable_timers() - enable the timers for a remoteproc
305 * This function is used primarily to enable the timers associated with
320 struct omap_rproc_timer *timers = oproc->timers; in omap_rproc_enable_timers() local
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| /linux-5.10/Documentation/devicetree/bindings/remoteproc/ |
| D | ti,omap-remoteproc.yaml | 37 'timers', 'watchdog-timers' etc.
139 ti,timers:
143 as System/Tick timers for the OS running on the remote
147 to reserve specific timers to be dedicated to the
152 features. The timers to be used should match with the
153 timers used in the firmware image.
155 ti,watchdog-timers:
159 serve as Watchdog timers for the processor cores. This
163 The timers to be used should match with the watchdog
164 timers used in the firmware image.
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| /linux-5.10/arch/arm/boot/dts/ |
| D | stm32f746.dtsi | 86 timers2: timers@40000000 {
89 compatible = "st,stm32-timers";
116 timers3: timers@40000400 {
119 compatible = "st,stm32-timers";
146 timers4: timers@40000800 {
149 compatible = "st,stm32-timers";
175 timers5: timers@40000c00 {
178 compatible = "st,stm32-timers";
205 timers6: timers@40001000 {
208 compatible = "st,stm32-timers";
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| D | dra7-ipu-dsp-common.dtsi | 25 ti,timers = <&timer3>;
26 ti,watchdog-timers = <&timer4>, <&timer9>;
31 ti,timers = <&timer11>;
32 ti,watchdog-timers = <&timer7>, <&timer8>;
37 ti,timers = <&timer5>;
38 ti,watchdog-timers = <&timer10>;
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| D | stm32f429.dtsi | 104 timers2: timers@40000000 {
107 compatible = "st,stm32-timers";
134 timers3: timers@40000400 {
137 compatible = "st,stm32-timers";
164 timers4: timers@40000800 {
167 compatible = "st,stm32-timers";
193 timers5: timers@40000c00 {
196 compatible = "st,stm32-timers";
223 timers6: timers@40001000 {
226 compatible = "st,stm32-timers";
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| /linux-5.10/arch/m68k/coldfire/ |
| D | Makefile | 19 obj-$(CONFIG_M5206) += m5206.o timers.o intc.o reset.o
20 obj-$(CONFIG_M5206e) += m5206.o timers.o intc.o reset.o
23 obj-$(CONFIG_M5249) += m5249.o timers.o intc.o intc-5249.o reset.o
24 obj-$(CONFIG_M525x) += m525x.o timers.o intc.o intc-525x.o reset.o
26 obj-$(CONFIG_M5272) += m5272.o intc-5272.o timers.o
28 obj-$(CONFIG_M5307) += m5307.o timers.o intc.o reset.o
29 obj-$(CONFIG_M53xx) += m53xx.o timers.o intc-simr.o reset.o
30 obj-$(CONFIG_M5407) += m5407.o timers.o intc.o reset.o
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| /linux-5.10/Documentation/devicetree/bindings/mips/brcm/ |
| D | soc.txt | 145 == Timers
148 timers that can be used.
153 "brcm,bcm7425-timers"
154 "brcm,bcm7429-timers"
155 "brcm,bcm7435-timers" and
156 "brcm,brcmstb-timers"
157 - reg : the timers register range
162 timers: timer@4067c0 {
163 compatible = "brcm,bcm7425-timers", "brcm,brcmstb-timers";
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| /linux-5.10/drivers/misc/ |
| D | cs5535-mfgpt.c | 3 * Driver for the CS5535/CS5536 Multi-Function General Purpose Timers (MFGPT)
24 MODULE_PARM_DESC(mfgptfix, "Try to reset the MFGPT timers during init; "
27 "2 = perform a soft reset by unconfiguring all timers); "
62 * XXX: According to the docs, we cannot reset timers above in cs5535_mfgpt_toggle_event()
155 /* only allocate timers from the working domain if requested */ in cs5535_mfgpt_alloc_timer()
173 /* set timer_nr to -1 if no timers available */ in cs5535_mfgpt_alloc_timer()
242 * This is a sledgehammer that resets all MFGPT timers. This is required by
245 * whether or not this secret MSR can be used to release individual timers.
253 /* The following undocumented bit resets the MFGPT timers */ in reset_all_timers()
259 * This is another sledgehammer to reset all MFGPT timers.
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| /linux-5.10/Documentation/devicetree/bindings/pwm/ |
| D | pwm-samsung.yaml | 7 title: Samsung SoC PWM timers
15 and clock event timers, as well as to drive SoC outputs with PWM signal. Each
40 - "timers" - PWM base clock used to generate PWM signals,
49 - const: timers
51 - const: timers
54 - const: timers
57 - const: timers
118 clock-names = "timers";
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| D | pwm-omap-dmtimer.txt | 1 * OMAP PWM for dual-mode timers
5 - ti,timers: phandle to PWM capable OMAP timer. See timer/ti,timer.txt for info
6 about these timers.
11 - ti,prescaler: Should be a value between 0 and 7, see the timers datasheet
20 ti,timers = <&timer9>;
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| /linux-5.10/Documentation/devicetree/bindings/mfd/ |
| D | st,stm32-timers.yaml | 4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
7 title: STMicroelectronics STM32 Timers bindings
11 - advanced-control timers consist of a 16-bit auto-reload counter driven
14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
16 - basic timers consist of a 16-bit auto-reload counter driven by a
25 const: st,stm32-timers
134 timers2: timers@40000000 {
137 compatible = "st,stm32-timers";
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| /linux-5.10/kernel/time/ |
| D | posix-cpu-timers.c | 8 #include <linux/posix-timers.h>
19 #include "posix-timers.h"
283 * CPU timers armed. Before starting a timer it's required to check whether
468 * Clean out CPU timers which are still armed when a thread exits. The
469 * timers are only removed from the list. No other updates are done. The
470 * corresponding posix timers are still accessible, but cannot be rearmed.
496 * Insert the timer on the appropriate list before any timers that
517 * for process timers we share expiration cache with itimers in arm_timer()
518 * and RLIMIT_CPU and for thread timers with RLIMIT_RTTIME. in arm_timer()
567 * Guts of sys_timer_settime for CPU timers.
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| /linux-5.10/arch/arm64/kvm/hyp/nvhe/ |
| D | timer-sr.c | 20 * VHE systems use EL2 timers and configure EL1 timers in kvm_timer_init_vhe().
34 * VHE systems use EL2 timers and configure EL1 timers in kvm_timer_init_vhe().
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| /linux-5.10/include/kvm/ |
| D | arm_arch_timer.h | 54 struct arch_timer_context timers[NR_KVM_TIMERS]; member
91 #define vcpu_get_timer(v,t) (&vcpu_timer(v)->timers[(t)])
92 #define vcpu_vtimer(v) (&(v)->arch.timer_cpu.timers[TIMER_VTIMER])
93 #define vcpu_ptimer(v) (&(v)->arch.timer_cpu.timers[TIMER_PTIMER])
95 #define arch_timer_ctx_index(ctx) ((ctx) - vcpu_timer((ctx)->vcpu)->timers)
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| /linux-5.10/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | mpic-timer.txt | 1 * Freescale MPIC timers
12 all timers within the group can be used.
16 interrupts that correspond to available timers shall be present.
24 /* Another AMP partition is using timers 0 and 1 */
|