/linux/Documentation/devicetree/bindings/display/tegra/ |
H A D | nvidia,tegra186-display.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra186-display.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NVIDIA Tegra186 (and later) Display Hub 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 15 pattern: "^display-hub@[0-9a-f]+$" 19 - nvidia,tegra186-display 20 - nvidia,tegra194-display [all …]
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H A D | nvidia,tegra186-dc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra186-dc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NVIDIA Tegra186 (and later) Display Controller 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 15 pattern: "^display@[0-9a-f]+$" 19 - nvidia,tegra186-dc 20 - nvidia,tegra194-dc [all …]
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H A D | nvidia,tegra124-dpaux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-dpaux.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 14 The Tegra Display Port Auxiliary (DPAUX) pad controller manages two 24 pattern: "^dpaux@[0-9a-f]+$" 28 - enum: 29 - nvidia,tegra124-dpaux [all …]
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H A D | nvidia,tegra124-vic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-vic.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 15 pattern: "^vic@[0-9a-f]+$" 19 - enum: 20 - nvidia,tegra124-vic 21 - nvidia,tegra210-vic [all …]
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H A D | nvidia,tegra20-host1x.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-host1x.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 13 description: The host1x top-level node defines a number of children, each 19 - enum: 20 - nvidia,tegra20-host1x 21 - nvidia,tegra30-host1x [all …]
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H A D | nvidia,tegra20-vi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-vi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 15 pattern: "^vi@[0-9a-f]+$" 19 - const: nvidia,tegra20-vi 20 - const: nvidia,tegra30-vi 21 - const: nvidia,tegra114-vi [all …]
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/linux/arch/arm64/boot/dts/nvidia/ |
H A D | tegra194.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra194-clock.h> 3 #include <dt-bindings/gpio/tegra194-gpio.h> 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/mailbox/tegra186-hsp.h> 6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 7 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 8 #include <dt-bindings/power/tegra194-powergate.h> 9 #include <dt-bindings/reset/tegra194-reset.h> 10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h> [all …]
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H A D | tegra194-p2972-0000.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/linux-event-codes.h> 5 #include <dt-bindings/input/gpio-keys.h> 7 #include "tegra194-p2888.dtsi" 11 compatible = "nvidia,p2972-0000", "nvidia,tegra194"; 24 #address-cells = <1>; 25 #size-cells = <0>; 31 remote-endpoint = <&xbar_i2s1_ep>; 39 dai-format = "i2s"; [all …]
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H A D | tegra194-p3509-0000.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/gpio/tegra194-gpio.h> 4 #include <dt-bindings/input/linux-event-codes.h> 5 #include <dt-bindings/input/gpio-keys.h> 19 #address-cells = <1>; 20 #size-cells = <0>; 26 remote-endpoint = <&xbar_i2s3_ep>; 34 dai-format = "i2s"; 45 #address-cells = <1>; 46 #size-cells = <0>; [all …]
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/linux/sound/hda/controllers/ |
H A D | tegra.c | 1 // SPDX-License-Identifier: GPL-2.0-only 11 #include <linux/dma-mapping.h> 67 * Tegra194 does not reflect correct number of SDO lines. Below macro 97 "Automatic power-saving timeout (in seconds, 0 = disable)."); 109 v = readl(hda->regs + HDA_IPFS_CONFIG); in hda_tegra_init() 111 writel(v, hda->regs + HDA_IPFS_CONFIG); in hda_tegra_init() 114 v = readl(hda->regs + HDA_CFG_CMD); in hda_tegra_init() 118 writel(v, hda->regs + HDA_CFG_CMD); in hda_tegra_init() 120 writel(HDA_BAR0_INIT_PROGRAM, hda->regs + HDA_CFG_BAR0); in hda_tegra_init() 121 writel(HDA_BAR0_FINAL_PROGRAM, hda->regs + HDA_CFG_BAR0); in hda_tegra_init() [all …]
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/linux/drivers/gpu/drm/tegra/ |
H A D | drm.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * Copyright (C) 2012-2016 NVIDIA CORPORATION. All rights reserved. 28 #include <asm/dma-iommu.h> 76 struct drm_device *drm = old_state->dev; in tegra_atomic_commit_tail() 77 struct tegra_drm *tegra = drm->dev_private; in tegra_atomic_commit_tail() 79 if (tegra->hub) { in tegra_atomic_commit_tail() 108 return -ENOMEM; in tegra_drm_open() 110 idr_init_base(&fpriv->legacy_contexts, 1); in tegra_drm_open() 111 xa_init_flags(&fpriv->contexts, XA_FLAGS_ALLOC1); in tegra_drm_open() 112 xa_init(&fpriv->syncpoints); in tegra_drm_open() [all …]
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H A D | dpaux.c | 1 // SPDX-License-Identifier: GPL-2.0-only 12 #include <linux/pinctrl/pinconf-generic.h> 21 #include <drm/display/drm_dp_helper.h> 22 #include <drm/display/drm_dp_aux_bus.h> 79 u32 value = readl(dpaux->regs + (offset << 2)); in tegra_dpaux_readl() 81 trace_dpaux_readl(dpaux->dev, offset, value); in tegra_dpaux_readl() 89 trace_dpaux_writel(dpaux->dev, offset, value); in tegra_dpaux_writel() 90 writel(value, dpaux->regs + (offset << 2)); in tegra_dpaux_writel() 99 size_t num = min_t(size_t, size - i * 4, 4); in tegra_dpaux_write_fifo() 115 size_t num = min_t(size_t, size - i * 4, 4); in tegra_dpaux_read_fifo() [all …]
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H A D | dc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 10 #include <linux/dma-mapping.h> 43 stats->frames = 0; in tegra_dc_stats_reset() 44 stats->vblank = 0; in tegra_dc_stats_reset() 45 stats->underflow = 0; in tegra_dc_stats_reset() 46 stats->overflow = 0; in tegra_dc_stats_reset() 65 offset = 0x000 + (offset - 0x500); in tegra_plane_offset() 66 return plane->offset + offset; in tegra_plane_offset() 70 offset = 0x180 + (offset - 0x700); in tegra_plane_offset() 71 return plane->offset + offset; in tegra_plane_offset() [all …]
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H A D | sor.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <linux/clk-provider.h> 19 #include <drm/display/drm_dp_helper.h> 20 #include <drm/display/drm_scdc_helper.h> 488 u32 value = readl(sor->regs + (offset << 2)); in tegra_sor_readl() 490 trace_sor_readl(sor->dev, offset, value); in tegra_sor_readl() 498 trace_sor_writel(sor->dev, offset, value); in tegra_sor_writel() 499 writel(value, sor->regs + (offset << 2)); in tegra_sor_writel() 506 clk_disable_unprepare(sor->clk); in tegra_sor_set_parent_clock() 508 err = clk_set_parent(sor->clk_out, parent); in tegra_sor_set_parent_clock() [all …]
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/linux/drivers/dma/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 96 tristate "Arm DMA-350 support" 101 Enable support for the Arm DMA-350 controller. 119 tristate "Analog Devices AXI-DMAC DMA support" 125 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA 161 tristate "SA-11x0 DMA support" 166 Support the DMA engine found on Intel StrongARM SA-1100 and 167 SA-1110 SoCs. This DMA engine can only be used with on-chip 227 This module can be found on Freescale Vybrid and LS-1 SoCs. 270 Enable support for the IMG multi-threaded DMA controller (MDC). [all …]
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/linux/drivers/soc/tegra/ |
H A D | pmc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * Copyright (c) 2018-2024, NVIDIA CORPORATION. All rights reserved. 12 #define pr_fmt(fmt) "tegra-pmc: " fmt 14 #include <linux/arm-smccc.h> 16 #include <linux/clk-provider.h> 18 #include <linux/clk/clk-conf.h> 37 #include <linux/pinctrl/pinconf-generic.h> 57 #include <dt-bindings/interrupt-controller/arm-gic.h> 58 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 59 #include <dt-bindings/gpio/tegra186-gpio.h> [all …]
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