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Searched full:trc (Results 1 – 4 of 4) sorted by relevance

/qemu/hw/sh4/
H A Dsh7750_regs.h856 #define SH7750_MCR_TRAS_SDRAM_TRC_4 0x00000000 /* 4 + TRC */
857 #define SH7750_MCR_TRAS_SDRAM_TRC_5 0x00000400 /* 5 + TRC */
858 #define SH7750_MCR_TRAS_SDRAM_TRC_6 0x00000800 /* 6 + TRC */
859 #define SH7750_MCR_TRAS_SDRAM_TRC_7 0x00000C00 /* 7 + TRC */
860 #define SH7750_MCR_TRAS_SDRAM_TRC_8 0x00001000 /* 8 + TRC */
861 #define SH7750_MCR_TRAS_SDRAM_TRC_9 0x00001400 /* 9 + TRC */
862 #define SH7750_MCR_TRAS_SDRAM_TRC_10 0x00001800 /* 10 + TRC */
863 #define SH7750_MCR_TRAS_SDRAM_TRC_11 0x00001C00 /* 11 + TRC */
/qemu/tests/qtest/
H A Di440fx-test.c135 g_assert_cmpint(qpci_config_readb(dev, 0x93), ==, 0x00); /* TRC */ in test_i440fx_defaults()
/qemu/target/arm/
H A Dcpregs.h549 FIELD(HDFGRTR_EL2, TRC, 33, 1)
614 FIELD(HDFGWTR_EL2, TRC, 33, 1)
/qemu/hw/net/
H A Dpcnet.c252 " TDR=%d, TRC=%d\n", \
271 GET_FIELD((T)->misc, TMDM, TRC))