Searched +full:stm32h7 +full:- +full:spdifrx (Results 1 – 4 of 4) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/sound/st,stm32-spdifrx.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: STMicroelectronics STM32 S/PDIF receiver (SPDIFRX)10 - Olivier Moysan <olivier.moysan@st.com>13 The SPDIFRX peripheral, is designed to receive an S/PDIF flow compliant with14 IEC-60958 and IEC-61937.19 - st,stm32h7-spdifrx21 "#sound-dai-cells":[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * STM32 ALSA SoC Digital Audio Interface (SPDIF-rx) driver.5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved21 /* SPDIF-rx Register Map */207 * struct stm32_spdifrx_data - private data of SPDIFRX210 * @regmap: SPDIFRX register map pointer211 * @regmap_conf: SPDIFRX register map configuration pointer213 * @kclk: kernel clock feeding the SPDIFRX clock generator220 * @phys_addr: SPDIFRX registers physical base address225 * @irq: SPDIFRX interrupt line[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved6 #include <dt-bindings/interrupt-controller/arm-gic.h>7 #include <dt-bindings/clock/stm32mp1-clks.h>8 #include <dt-bindings/reset/stm32mp1-resets.h>11 #address-cells = <1>;12 #size-cells = <1>;15 #address-cells = <1>;16 #size-cells = <0>;19 compatible = "arm,cortex-a7";[all …]
1 // SPDX-License-Identifier: GPL-2.08 #include <linux/clk-provider.h>18 #include <dt-bindings/clock/stm32h7-clks.h>139 /* Micro-controller output clock parent */178 bit_status = !(readl(gate->reg) & BIT(rgate->bit_rdy)); in ready_gate_clk_enable()183 } while (bit_status && --timeout); in ready_gate_clk_enable()201 bit_status = !!(readl(gate->reg) & BIT(rgate->bit_rdy)); in ready_gate_clk_disable()206 } while (bit_status && --timeout); in ready_gate_clk_disable()227 return ERR_PTR(-ENOMEM); in clk_register_ready_gate()235 rgate->bit_rdy = bit_rdy; in clk_register_ready_gate()[all …]