Searched +full:spmi +full:- +full:clkdiv (Results 1 – 3 of 3) sorted by relevance
| /linux-6.15/Documentation/devicetree/bindings/clock/ |
| D | qcom,spmi-clkdiv.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,spmi-clkdiv.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SPMI PMIC clock divider
10 - Bjorn Andersson <andersson@kernel.org>
11 - Stephen Boyd <sboyd@kernel.org>
14 Qualcomm SPMI PMIC clock divider configures the clock frequency of a set of
20 const: qcom,spmi-clkdiv
27 - description: Board XO source
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| /linux-6.15/drivers/clk/qcom/ |
| D | clk-spmi-pmic-div.c | 1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk-provider.h>
25 struct clkdiv { struct
34 static inline struct clkdiv *to_clkdiv(struct clk_hw *hw) in to_clkdiv() argument
36 return container_of(hw, struct clkdiv, hw); in to_clkdiv()
44 return 1 << (div_factor - 1); in div_factor_to_div()
52 static bool is_spmi_pmic_clkdiv_enabled(struct clkdiv *clkdiv) in is_spmi_pmic_clkdiv_enabled() argument
56 regmap_read(clkdiv->regmap, clkdiv->base + REG_EN_CTL, &val); in is_spmi_pmic_clkdiv_enabled()
62 __spmi_pmic_clkdiv_set_enable_state(struct clkdiv *clkdiv, bool enable, in __spmi_pmic_clkdiv_set_enable_state() argument
66 unsigned int ns = clkdiv->cxo_period_ns; in __spmi_pmic_clkdiv_set_enable_state()
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| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
1294 Say Y if you want to toggle LPASS-adjacent resets within
1384 tristate "SPMI PMIC clkdiv Support"
1385 depends on SPMI || COMPILE_TEST
1387 This driver supports the clkdiv functionality on the Qualcomm
1388 Technologies, Inc. SPMI PMIC. It configures the frequency of
1389 clkdiv outputs of the PMIC. These clocks are typically wired
1393 tristate "High-Frequency PLL (HFPLL) Clock Controller"
1395 Support for the high-frequency PLLs present on Qualcomm devices.
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