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/linux-6.8/Documentation/devicetree/bindings/spi/
Dspi-peripheral-props.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a SPI bus.
10 Many SPI controllers need to add properties to peripheral devices. They could
11 be common properties like spi-max-frequency, spi-cpha, etc. or they could be
12 controller specific like delay in clock or data lines, etc. These properties
13 need to be defined in the peripheral node because they are per-peripheral and
19 - Mark Brown <broonie@kernel.org>
[all …]
/linux-6.8/drivers/iio/gyro/
Dadxrs450.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/delay.h>
14 #include <linux/spi/spi.h>
25 /* The MSB for the spi commands */
67 * struct adxrs450_state - device instance specific data
68 * @us: actual spi_device
69 * @buf_lock: mutex to protect tx and rx
70 * @tx: transmit buffer
74 struct spi_device *us; member
76 __be32 tx __aligned(IIO_DMA_MINALIGN);
[all …]
/linux-6.8/drivers/spi/
Dspi-dw-dma.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
15 #include <linux/platform_data/dma-dw.h>
16 #include <linux/spi/spi.h>
19 #include "spi-dw.h"
30 if (s->dma_dev != chan->device->dev) in dw_spi_dma_chan_filter()
33 chan->private = s; in dw_spi_dma_chan_filter()
43 def_burst = dws->fifo_len / 2; in dw_spi_dma_maxburst_init()
45 ret = dma_get_slave_caps(dws->rxchan, &caps); in dw_spi_dma_maxburst_init()
51 dws->rxburst = min(max_burst, def_burst); in dw_spi_dma_maxburst_init()
[all …]
Dspi-dw-core.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Designware SPI core controller driver (refer pxa2xx_spi.c)
9 #include <linux/dma-mapping.h>
14 #include <linux/delay.h>
16 #include <linux/spi/spi.h>
17 #include <linux/spi/spi-mem.h>
21 #include "spi-dw.h"
30 u32 rx_sample_dly; /* RX sample delay */
64 snprintf(name, 32, "dw_spi%d", dws->host->bus_num); in dw_spi_debugfs_init()
65 dws->debugfs = debugfs_create_dir(name, NULL); in dw_spi_debugfs_init()
[all …]
Dspi-mpc512x-psc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * MPC512x PSC in SPI mode driver.
7 * Hongjun Chen <hong-jun.chen@freescale.com>
21 #include <linux/delay.h>
23 #include <linux/spi/spi.h>
37 switch (mps->type) { \
39 struct mpc52xx_psc __iomem *psc = mps->psc; \
40 __ret = &psc->regname; \
44 struct mpc5125_psc __iomem *psc = mps->psc; \
45 __ret = &psc->regname; \
[all …]
Dspi-cadence.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Cadence SPI controller driver (host and target mode)
5 * Copyright (C) 2008 - 2014 Xilinx, Inc.
7 * based on Blackfin On-Chip SPI Driver (spi_bfin5xx.c)
11 #include <linux/delay.h>
21 #include <linux/spi/spi.h>
24 #define CDNS_SPI_NAME "cdns-spi"
33 #define CDNS_SPI_DR 0x18 /* Delay Register, RW */
41 * SPI Configuration Register bit Masks
44 * of the SPI controller
[all …]
Dspi-imx.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
8 #include <linux/delay.h>
10 #include <linux/dma-mapping.h>
21 #include <linux/spi/spi.h>
26 #include <linux/dma/imx-dma.h>
38 "time in us to run a transfer in polling mode\n");
74 int (*prepare_transfer)(struct spi_imx_data *spi_imx, struct spi_device *spi);
109 void (*tx)(struct spi_imx_data *spi_imx); member
113 unsigned int txfifo; /* number of words pushed in tx FIFO */
[all …]
/linux-6.8/net/nfc/nci/
Dspi.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/spi/spi.h>
12 #include <linux/crc-ccitt.h>
37 /* a NULL skb means we just want the SPI chip select line to raise */ in __nci_spi_send()
39 t.tx_buf = skb->data; in __nci_spi_send()
40 t.len = skb->len; in __nci_spi_send()
47 t.delay.value = nspi->xfer_udelay; in __nci_spi_send()
48 t.delay.unit = SPI_DELAY_UNIT_USECS; in __nci_spi_send()
49 t.speed_hz = nspi->xfer_speed_hz; in __nci_spi_send()
54 return spi_sync(nspi->spi, &m); in __nci_spi_send()
[all …]
/linux-6.8/Documentation/devicetree/bindings/input/
Dsyna,rmi4.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jason A. Donenfeld <Jason@zx2c4.com>
11 - Matthias Schiffer <matthias.schiffer@ew.tq-group.com
12 - Vincent Huang <vincent.huang@tw.synaptics.com>
16 devices using different transports (I2C, SPI) and different functions (e.g.
22 - syna,rmi4-i2c
23 - syna,rmi4-spi
28 '#address-cells':
[all …]
/linux-6.8/Documentation/networking/
Dpktgen.rst1 .. SPDX-License-Identifier: GPL-2.0
7 Enable CONFIG_NET_PKTGEN to compile and build pktgen either in-kernel
31 overload type of benchmarking, as this could hurt the normal use-case.
33 Specifically increasing the TX ring buffer in the NIC::
35 # ethtool -G ethX tx 1024
37 A larger TX ring can improve pktgen's performance, while it can hurt
38 in the general case, 1) because the TX ring buffer might get larger
43 TX ring cause delay. Drivers usually delay cleaning up the
44 ring-buffers for various performance reasons, and packets stalling
45 the TX ring might just be waiting for cleanup.
[all …]
/linux-6.8/arch/arm64/boot/dts/freescale/
Dimx8dxl-evk.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
12 compatible = "fsl,imx8dxl-evk", "fsl,imx8dxl";
22 stdout-path = &lpuart0;
30 reserved-memory {
31 #address-cells = <2>;
32 #size-cells = <2>;
37 * This will be automatically added to dtb if OP-TEE is installed.
40 * no-map;
46 compatible = "shared-dma-pool";
[all …]
Dimx8mm-phyboard-polis-rdk.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
12 #include "imx8mm-phycore-som.dtsi"
15 model = "PHYTEC phyBOARD-Polis-i.MX8MM RDK";
16 compatible = "phytec,imx8mm-phyboard-polis-rdk",
17 "phytec,imx8mm-phycore-som", "fsl,imx8mm";
20 stdout-path = &uart3;
[all …]
Dimx8mp-msc-sm2s.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
9 #include <dt-bindings/net/ti-dp83867.h>
18 stdout-path = &uart2;
21 reg_usb0_host_vbus: regulator-usb0-vbus {
22 compatible = "regulator-fixed";
23 regulator-name = "usb0_host_vbus";
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_usb0_vbus>;
26 regulator-min-microvolt = <5000000>;
[all …]
Dimx8mq-kontron-pitx-imx8m.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree File for the Kontron pitx-imx8m board.
8 /dts-v1/;
11 #include <dt-bindings/net/ti-dp83867.h>
14 model = "Kontron pITX-imx8m";
15 compatible = "kontron,pitx-imx8m", "fsl,imx8mq";
31 stdout-path = "serial2:115200n8";
34 pcie0_refclk: pcie0-clock {
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
[all …]
/linux-6.8/arch/arm64/boot/dts/qcom/
Dsm6375.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmcc.h>
7 #include <dt-bindings/clock/qcom,sm6375-gcc.h>
8 #include <dt-bindings/clock/qcom,sm6375-gpucc.h>
9 #include <dt-bindings/dma/qcom-gpi.h>
10 #include <dt-bindings/firmware/qcom,scm.h>
11 #include <dt-bindings/interconnect/qcom,osm-l3.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/mailbox/qcom-ipcc.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
[all …]
Dmsm8998.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/firmware/qcom,scm.h>
10 #include <dt-bindings/power/qcom-rpmpd.h>
11 #include <dt-bindings/gpio/gpio.h>
14 interrupt-parent = <&intc>;
[all …]
Dsm8350.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interconnect/qcom,sm8350.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/qcom,dispcc-sm8350.h>
9 #include <dt-bindings/clock/qcom,gcc-sm8350.h>
10 #include <dt-bindings/clock/qcom,gpucc-sm8350.h>
11 #include <dt-bindings/clock/qcom,rpmh.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/firmware/qcom,scm.h>
14 #include <dt-bindings/gpio/gpio.h>
[all …]
Dsm8150.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/dma/qcom-gpi.h>
8 #include <dt-bindings/firmware/qcom,scm.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/phy/phy-qcom-qmp.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
12 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,dispcc-sm8150.h>
[all …]
Dsm8450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
8 #include <dt-bindings/clock/qcom,rpmh.h>
9 #include <dt-bindings/clock/qcom,sm8450-camcc.h>
10 #include <dt-bindings/clock/qcom,sm8450-dispcc.h>
11 #include <dt-bindings/clock/qcom,sm8450-gpucc.h>
12 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
[all …]
Dsm8650.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm8650-dispcc.h>
8 #include <dt-bindings/clock/qcom,sm8650-gcc.h>
9 #include <dt-bindings/clock/qcom,sm8650-gpucc.h>
10 #include <dt-bindings/clock/qcom,sm8650-tcsr.h>
11 #include <dt-bindings/dma/qcom-gpi.h>
12 #include <dt-bindings/firmware/qcom,scm.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interconnect/qcom,icc.h>
[all …]
Dsm6115.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
7 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
8 #include <dt-bindings/clock/qcom,sm6115-gpucc.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/dma/qcom-gpi.h>
11 #include <dt-bindings/firmware/qcom,scm.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interconnect/qcom,rpm-icc.h>
14 #include <dt-bindings/interconnect/qcom,sm6115.h>
[all …]
/linux-6.8/arch/arm/boot/dts/nxp/imx/
Dimx6qp-prtwd3.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
16 stdout-path = &uart4;
29 clock_ksz8081: clock-ksz8081 {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <50000000>;
35 clock_ksz9031: clock-ksz9031 {
36 compatible = "fixed-clock";
[all …]
/linux-6.8/include/linux/iio/imu/
Dadis.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
12 #include <linux/spi/spi.h>
26 * struct adis_timeouts - ADIS chip variant timeouts
27 * @reset_ms - Wait time after rst pin goes inactive
28 * @sw_reset_ms - Wait time after sw reset command
29 * @self_test_ms - Wait time after self test command
38 * struct adis_data - ADIS chip variant specific data
39 * @read_delay: SPI delay for read operations in us
40 * @write_delay: SPI delay for write operations in us
[all …]
/linux-6.8/arch/powerpc/boot/dts/
Dac14xx.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #address-cells = <1>;
15 #size-cells = <1>;
26 timebase-frequency = <40000000>; /* 40 MHz (csb/4) */
27 bus-frequency = <160000000>; /* 160 MHz csb bus */
28 clock-frequency = <400000000>; /* 400 MHz ppc core */
49 compatible = "cfi-flash";
51 #address-cells = <1>;
52 #size-cells = <1>;
53 bank-width = <2>;
[all …]
/linux-6.8/arch/arm64/boot/dts/ti/
Dk3-am64-phycore-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2021 PHYTEC America, LLC - https://www.phytec.com
10 * https://www.phytec.com/product/phycore-am64x
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/net/ti-dp83867.h>
18 model = "PHYTEC phyCORE-AM64x";
19 compatible = "phytec,am64-phycore-som", "ti,am642";
32 reserved_memory: reserved-memory {
33 #address-cells = <2>;
[all …]

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