| /linux-6.15/Documentation/devicetree/bindings/riscv/ |
| D | sophgo.yaml | 4 $id: http://devicetree.org/schemas/riscv/sophgo.yaml#
7 title: Sophgo SoC-based boards
10 - Chao Wei <chao.wei@sophgo.com>
14 Sophgo SoC-based boards
24 - const: sophgo,cv1800b
27 - sophgo,huashan-pi
28 - const: sophgo,cv1812h
33 - const: sophgo,sg2002
37 - const: sophgo,sg2042
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| /linux-6.15/drivers/clk/sophgo/ |
| D | Kconfig | 2 # common clock support for SOPHGO SoC family.
5 tristate "Support for the Sophgo CV1800 series SoCs clock controller"
8 This driver supports clock controller of Sophgo CV18XX series SoC.
14 tristate "Sophgo SG2042 PLL clock support"
18 Sophgo SG2042 SoC. This clock IP uses three oscillators with
23 tristate "Sophgo SG2042 Clock Generator support"
27 Sophgo SG2042 SoC. This clock IP depends on SG2042 PLL clock
32 tristate "Sophgo SG2042 RP subsystem clock controller support"
36 controller on the Sophgo SG2042 SoC.
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| D | Makefile | 2 obj-$(CONFIG_CLK_SOPHGO_CV1800) += clk-sophgo-cv1800.o
4 clk-sophgo-cv1800-y += clk-cv1800.o
5 clk-sophgo-cv1800-y += clk-cv18xx-common.o
6 clk-sophgo-cv1800-y += clk-cv18xx-ip.o
7 clk-sophgo-cv1800-y += clk-cv18xx-pll.o
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| /linux-6.15/arch/riscv/boot/dts/sophgo/ |
| D | sg2042.dtsi | 3 * Copyright (C) 2022 Sophgo Technology Inc. All rights reserved.
7 #include <dt-bindings/clock/sophgo,sg2042-clkgen.h>
8 #include <dt-bindings/clock/sophgo,sg2042-pll.h>
9 #include <dt-bindings/clock/sophgo,sg2042-rpgate.h>
11 #include <dt-bindings/reset/sophgo,sg2042-reset.h>
16 compatible = "sophgo,sg2042";
169 compatible = "sophgo,sg2042-pwm";
178 compatible = "sophgo,sg2042-pll";
186 compatible = "sophgo,sg2042-msi";
196 compatible = "sophgo,sg2042-rpgate";
[all …]
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| D | sg2002.dtsi | 12 compatible = "sophgo,sg2002";
21 compatible = "sophgo,sg2002-pinctrl";
30 compatible = "sophgo,sg2002-plic", "thead,c900-plic";
34 compatible = "sophgo,sg2002-clint", "thead,c900-clint";
38 compatible = "sophgo,sg2000-clk";
42 compatible = "sophgo,sg2002-dwcmshc";
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| D | cv1800b.dtsi | 10 compatible = "sophgo,cv1800b";
19 compatible = "sophgo,cv1800b-pinctrl";
28 compatible = "sophgo,cv1800b-plic", "thead,c900-plic";
32 compatible = "sophgo,cv1800b-clint", "thead,c900-clint";
36 compatible = "sophgo,cv1800-clk";
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| D | cv1812h.dtsi | 12 compatible = "sophgo,cv1812h";
21 compatible = "sophgo,cv1812h-pinctrl";
30 compatible = "sophgo,cv1812h-plic", "thead,c900-plic";
34 compatible = "sophgo,cv1812h-clint", "thead,c900-clint";
38 compatible = "sophgo,cv1810-clk";
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| /linux-6.15/Documentation/devicetree/bindings/clock/ |
| D | sophgo,cv1800-clk.yaml | 4 $id: http://devicetree.org/schemas/clock/sophgo,cv1800-clk.yaml#
7 title: Sophgo CV1800/SG2000 Series Clock Controller
15 - sophgo,cv1800-clk
16 - sophgo,cv1810-clk
17 - sophgo,sg2000-clk
28 See <dt-bindings/clock/sophgo,cv1800.h> for valid indices.
41 compatible = "sophgo,cv1800-clk";
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| D | sophgo,sg2042-rpgate.yaml | 4 $id: http://devicetree.org/schemas/clock/sophgo,sg2042-rpgate.yaml#
7 title: Sophgo SG2042 Gate Clock Generator for RP(riscv processors) subsystem
14 const: sophgo,sg2042-rpgate
30 See <dt-bindings/clock/sophgo,sg2042-rpgate.h> for valid indices.
44 compatible = "sophgo,sg2042-rpgate";
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| D | sophgo,sg2042-pll.yaml | 4 $id: http://devicetree.org/schemas/clock/sophgo,sg2042-pll.yaml#
7 title: Sophgo SG2042 PLL Clock Generator
14 const: sophgo,sg2042-pll
34 See <dt-bindings/clock/sophgo,sg2042-pll.h> for valid indices.
48 compatible = "sophgo,sg2042-pll";
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| D | sophgo,sg2042-clkgen.yaml | 4 $id: http://devicetree.org/schemas/clock/sophgo,sg2042-clkgen.yaml#
7 title: Sophgo SG2042 Clock Generator for divider/mux/gate
14 const: sophgo,sg2042-clkgen
36 See <dt-bindings/clock/sophgo,sg2042-clkgen.h> for valid indices.
50 compatible = "sophgo,sg2042-clkgen";
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| /linux-6.15/Documentation/devicetree/bindings/pinctrl/ |
| D | sophgo,sg2042-pinctrl.yaml | 4 $id: http://devicetree.org/schemas/pinctrl/sophgo,sg2042-pinctrl.yaml#
7 title: Sophgo SG2042 Pin Controller
15 - sophgo,sg2042-pinctrl
16 - sophgo,sg2044-pinctrl
38 refer to https://github.com/sophgo/sophgo-doc/.
79 const: sophgo,sg2042-pinctrl
96 const: sophgo,sg2044-pinctrl
116 compatible = "sophgo,sg2042-pinctrl";
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| D | sophgo,cv1800-pinctrl.yaml | 4 $id: http://devicetree.org/schemas/pinctrl/sophgo,cv1800-pinctrl.yaml#
7 title: Sophgo CV1800 Pin Controller
15 - sophgo,cv1800b-pinctrl
16 - sophgo,cv1812h-pinctrl
17 - sophgo,sg2000-pinctrl
18 - sophgo,sg2002-pinctrl
51 refer to https://github.com/sophgo/sophgo-doc/.
104 compatible = "sophgo,cv1800b-pinctrl";
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| /linux-6.15/Documentation/devicetree/bindings/iio/adc/ |
| D | sophgo,cv1800b-saradc.yaml | 4 $id: http://devicetree.org/schemas/iio/adc/sophgo,cv1800b-saradc.yaml#
8 Sophgo CV1800B SoC 3 channels Successive Approximation Analog to
15 Datasheet at https://github.com/sophgo/sophgo-doc/releases
19 const: sophgo,cv1800b-saradc
62 #include <dt-bindings/clock/sophgo,cv1800.h>
65 compatible = "sophgo,cv1800b-saradc";
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| /linux-6.15/drivers/pinctrl/sophgo/ |
| D | Kconfig | 3 # Sophgo SoC PINCTRL drivers
16 tristate "Sophgo CV1800B SoC Pinctrl driver"
28 tristate "Sophgo CV1812H SoC Pinctrl driver"
40 tristate "Sophgo SG2000 SoC Pinctrl driver"
52 tristate "Sophgo SG2002 SoC Pinctrl driver"
67 tristate "Sophgo SG2042 SoC Pinctrl driver"
79 tristate "Sophgo SG2044 SoC Pinctrl driver"
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| D | Makefile | 3 obj-$(CONFIG_PINCTRL_SOPHGO_COMMON) += pinctrl-sophgo.o
4 pinctrl-sophgo-objs += pinctrl-sophgo-common.o
5 pinctrl-sophgo-$(CONFIG_PINCTRL_SOPHGO_CV18XX_OPS) += pinctrl-cv18xx.o
6 pinctrl-sophgo-$(CONFIG_PINCTRL_SOPHGO_SG2042_OPS) += pinctrl-sg2042-ops.o
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| /linux-6.15/Documentation/devicetree/bindings/pwm/ |
| D | sophgo,sg2042-pwm.yaml | 4 $id: http://devicetree.org/schemas/pwm/sophgo,sg2042-pwm.yaml#
7 title: Sophgo SG2042 PWM controller
20 const: sophgo,sg2042-pwm
49 #include <dt-bindings/reset/sophgo,sg2042-reset.h>
52 compatible = "sophgo,sg2042-pwm";
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| /linux-6.15/Documentation/devicetree/bindings/interrupt-controller/ |
| D | sophgo,sg2042-msi.yaml | 4 $id: http://devicetree.org/schemas/interrupt-controller/sophgo,sg2042-msi.yaml#
7 title: Sophgo SG2042 MSI Controller
13 This interrupt controller is in Sophgo SG2042 for transforming interrupts from
21 const: sophgo,sg2042-msi
55 compatible = "sophgo,sg2042-msi";
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| D | thead,c900-aclint-mswi.yaml | 7 title: Sophgo sg2042 CLINT Machine-level Software Interrupt Device
16 - sophgo,sg2042-aclint-mswi
36 compatible = "sophgo,sg2042-aclint-mswi", "thead,c900-aclint-mswi";
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| /linux-6.15/Documentation/devicetree/bindings/reset/ |
| D | sophgo,sg2042-reset.yaml | 4 $id: http://devicetree.org/schemas/reset/sophgo,sg2042-reset.yaml#
7 title: Sophgo SG2042 SoC Reset Controller
14 const: sophgo,sg2042-reset
32 compatible = "sophgo,sg2042-reset";
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| /linux-6.15/Documentation/devicetree/bindings/hwmon/ |
| D | sophgo,sg2042-hwmon-mcu.yaml | 4 $id: http://devicetree.org/schemas/hwmon/sophgo,sg2042-hwmon-mcu.yaml#
7 title: Sophgo SG2042 onboard MCU support
14 const: sophgo,sg2042-hwmon-mcu
39 compatible = "sophgo,sg2042-hwmon-mcu";
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| /linux-6.15/Documentation/devicetree/bindings/net/ |
| D | sophgo,sg2044-dwmac.yaml | 4 $id: http://devicetree.org/schemas/net/sophgo,sg2044-dwmac.yaml#
7 title: Sophgo SG2044 DWMAC glue layer
17 - sophgo,sg2044-dwmac
24 - const: sophgo,sg2044-dwmac
76 compatible = "sophgo,sg2044-dwmac", "snps,dwmac-5.30a";
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| /linux-6.15/drivers/net/ethernet/stmicro/stmmac/ |
| D | dwmac-sophgo.c | 3 * Sophgo DWMAC platform driver
57 { .compatible = "sophgo,sg2044-dwmac" },
66 .name = "sophgo-dwmac",
74 MODULE_DESCRIPTION("Sophgo DWMAC platform driver");
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| /linux-6.15/drivers/pwm/ |
| D | pwm-sophgo-sg2042.c | 3 * Sophgo SG2042 PWM Controller Driver
5 * Copyright (C) 2024 Sophgo Technology Inc.
17 * [1]:https://github.com/sophgo/sophgo-doc/tree/main/SG2042/TRM
132 { .compatible = "sophgo,sg2042-pwm" },
193 MODULE_DESCRIPTION("Sophgo SG2042 PWM driver");
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| /linux-6.15/Documentation/devicetree/bindings/mmc/ |
| D | snps,dwcmshc-sdhci.yaml | 26 - sophgo,cv1800b-dwcmshc
27 - sophgo,sg2002-dwcmshc
28 - sophgo,sg2042-dwcmshc
77 const: sophgo,sg2042-dwcmshc
|