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/linux-6.8/Documentation/devicetree/bindings/display/msm/
Dqcom,sm8150-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8150-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SM8150 Display MDSS
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
13 Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
15 bindings of MDSS are mentioned for SM8150 target.
17 $ref: /schemas/display/msm/mdss-common.yaml#
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Dqcom,sm8150-dpu.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8150-dpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SM8150 Display DPU
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
12 $ref: /schemas/display/msm/dpu-common.yaml#
16 const: qcom,sm8150-dpu
20 - description: Address offset and size for mdp register set
21 - description: Address offset and size for vbif register set
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Ddsi-controller-main.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
15 - items:
16 - enum:
17 - qcom,apq8064-dsi-ctrl
18 - qcom,msm8226-dsi-ctrl
19 - qcom,msm8916-dsi-ctrl
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Ddp-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dp-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kuogee Hsieh <quic_khsieh@quicinc.com>
19 - enum:
20 - qcom,sc7180-dp
21 - qcom,sc7280-dp
22 - qcom,sc7280-edp
23 - qcom,sc8180x-dp
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/linux-6.8/drivers/iommu/arm/arm-smmu/
Darm-smmu-qcom.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/adreno-smmu-priv.h>
12 #include "arm-smmu.h"
13 #include "arm-smmu-qcom.h"
15 #define QCOM_DUMMY_VAL -1
30 for (spin_cnt = TLB_SPIN_COUNT; spin_cnt > 0; spin_cnt--) { in qcom_smmu_tlb_sync()
53 if (qsmmu->stall_enabled & BIT(idx)) in qcom_adreno_smmu_write_sctlr()
63 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; in qcom_adreno_smmu_get_fault_info()
64 struct arm_smmu_device *smmu = smmu_domain->smmu; in qcom_adreno_smmu_get_fault_info()
66 info->fsr = arm_smmu_cb_read(smmu, cfg->cbndx, ARM_SMMU_CB_FSR); in qcom_adreno_smmu_get_fault_info()
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/linux-6.8/arch/arm64/boot/dts/qcom/
Dsm8150.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/dma/qcom-gpi.h>
8 #include <dt-bindings/firmware/qcom,scm.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/phy/phy-qcom-qmp.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
12 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,dispcc-sm8150.h>
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Dsm8150-hdk.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/usb/pd.h>
11 #include "sm8150.dtsi"
17 model = "Qualcomm Technologies, Inc. SM8150 HDK";
18 compatible = "qcom,sm8150-hdk", "qcom,sm8150";
19 chassis-type = "embedded";
26 stdout-path = "serial0:115200n8";
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Dsc8180x.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2020-2023, Linaro Limited
7 #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
8 #include <dt-bindings/clock/qcom,gcc-sc8180x.h>
9 #include <dt-bindings/clock/qcom,gpucc-sm8150.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/interconnect/qcom,icc.h>
12 #include <dt-bindings/interconnect/qcom,osm-l3.h>
13 #include <dt-bindings/interconnect/qcom,sc8180x.h>
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Dsm8350.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interconnect/qcom,sm8350.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/qcom,dispcc-sm8350.h>
9 #include <dt-bindings/clock/qcom,gcc-sm8350.h>
10 #include <dt-bindings/clock/qcom,gpucc-sm8350.h>
11 #include <dt-bindings/clock/qcom,rpmh.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/firmware/qcom,scm.h>
14 #include <dt-bindings/gpio/gpio.h>
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Dsm8650.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm8650-dispcc.h>
8 #include <dt-bindings/clock/qcom,sm8650-gcc.h>
9 #include <dt-bindings/clock/qcom,sm8650-gpucc.h>
10 #include <dt-bindings/clock/qcom,sm8650-tcsr.h>
11 #include <dt-bindings/dma/qcom-gpi.h>
12 #include <dt-bindings/firmware/qcom,scm.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interconnect/qcom,icc.h>
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Dsm8450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
8 #include <dt-bindings/clock/qcom,rpmh.h>
9 #include <dt-bindings/clock/qcom,sm8450-camcc.h>
10 #include <dt-bindings/clock/qcom,sm8450-dispcc.h>
11 #include <dt-bindings/clock/qcom,sm8450-gpucc.h>
12 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
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Dsm8550.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
8 #include <dt-bindings/clock/qcom,sm8550-camcc.h>
9 #include <dt-bindings/clock/qcom,sm8550-gcc.h>
10 #include <dt-bindings/clock/qcom,sm8550-gpucc.h>
11 #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
12 #include <dt-bindings/clock/qcom,sm8550-dispcc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
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Dsm8250.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
8 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
9 #include <dt-bindings/clock/qcom,gpucc-sm8250.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h>
12 #include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/gpio/gpio.h>
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Dsc7280.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/clock/qcom,camcc-sc7280.h>
8 #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7280.h>
11 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
12 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sc7280.h>
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/linux-6.8/drivers/gpu/drm/msm/
Dmsm_mdss.c2 * SPDX-License-Identifier: GPL-2.0
31 #define DEFAULT_REG_BW 153600 /* Used in mdss fbdev driver */
57 path0 = devm_of_icc_get(dev, "mdp0-mem"); in msm_mdss_parse_data_bus_icc_path()
61 msm_mdss->mdp_path[0] = path0; in msm_mdss_parse_data_bus_icc_path()
62 msm_mdss->num_mdp_paths = 1; in msm_mdss_parse_data_bus_icc_path()
64 path1 = devm_of_icc_get(dev, "mdp1-mem"); in msm_mdss_parse_data_bus_icc_path()
66 msm_mdss->mdp_path[1] = path1; in msm_mdss_parse_data_bus_icc_path()
67 msm_mdss->num_mdp_paths++; in msm_mdss_parse_data_bus_icc_path()
70 reg_bus_path = of_icc_get(dev, "cpu-cfg"); in msm_mdss_parse_data_bus_icc_path()
72 msm_mdss->reg_bus_path = reg_bus_path; in msm_mdss_parse_data_bus_icc_path()
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/linux-6.8/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_kms.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
13 #include <linux/dma-buf.h>
62 struct dpu_kms *kms = s->private; in _dpu_danger_signal_status()
65 if (!kms->hw_mdp) { in _dpu_danger_signal_status()
72 pm_runtime_get_sync(&kms->pdev->dev); in _dpu_danger_signal_status()
75 if (kms->hw_mdp->ops.get_danger_status) in _dpu_danger_signal_status()
76 kms->hw_mdp->ops.get_danger_status(kms->hw_mdp, in _dpu_danger_signal_status()
80 if (kms->hw_mdp->ops.get_safe_status) in _dpu_danger_signal_status()
81 kms->hw_mdp->ops.get_safe_status(kms->hw_mdp, in _dpu_danger_signal_status()
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