| /qemu/tests/tcg/i386/ |
| H A D | float_convd.conf | 2 from single: f32(nan:0x7fe00000)
3 to single: f64(nan:0x007ffc000000000000) (OK)
8 from single: f32(-nan:0xffc00000)
9 to single: f64(-nan:0x00fff8000000000000) (OK)
14 from single: f32(-inf:0xff800000)
15 to single: f64(-inf:0x00fff0000000000000) (OK)
20 from single: f32(-inf:0xff800000)
21 to single: f64(-inf:0x00fff0000000000000) (OVERFLOW INEXACT )
26 from single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
27 to single: f64(-0x1.fffffe00000000000000p+127:0x00c7efffffe0000000) (OK)
[all …]
|
| H A D | float_convs.ref | 2 from single: f32(-nan:0xffe00000)
8 from single: f32(-nan:0xffc00000)
14 from single: f32(-inf:0xff800000)
20 from single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
26 from single: f32(-0x1.1874b200000000000000p+103:0xf30c3a59)
32 from single: f32(-0x1.c0bab600000000000000p+99:0xf1605d5b)
38 from single: f32(-0x1.31f75000000000000000p-40:0xab98fba8)
44 from single: f32(-0x1.50544400000000000000p-66:0x9ea82a22)
50 from single: f32(-0x1.00000000000000000000p-126:0x80800000)
56 from single: f32(0x0.00000000000000000000p+0:0000000000)
[all …]
|
| /qemu/tests/tcg/arm/ |
| H A D | fcvt.ref | 3 Converting single-precision to half-precision
4 00 SINGLE: -nan / 0xffa00000 (0 => OK)
6 01 SINGLE: -nan / 0xffc00000 (0 => OK)
8 02 SINGLE: -inf / 0xff800000 (0 => OK)
10 03 SINGLE: -3.40282346638528859812e+38 / 0xff7fffff (0 => OK)
12 04 SINGLE: -1.11100004769645909791e+31 / 0xf30c3a59 (0 => OK)
14 05 SINGLE: -1.11100003258488635273e+30 / 0xf1605d5b (0 => OK)
16 06 SINGLE: -1.08700982243137289629e-12 / 0xab98fba8 (0 => OK)
18 07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22 (0 => OK)
20 08 SINGLE: -1.17549435082228750797e-38 / 0x80800000 (0 => OK)
[all …]
|
| H A D | float_convd.ref | 3 to single: f32(nan:0x7fe00000) (INVALID)
9 to single: f32(-nan:0xffc00000) (OK)
15 to single: f32(-inf:0xff800000) (OK)
21 to single: f32(-inf:0xff800000) (OVERFLOW INEXACT )
27 to single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff) (OK)
33 to single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff) (OK)
39 to single: f32(-0x1.1874b200000000000000p+103:0xf30c3a59) (INEXACT )
45 to single: f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) (INEXACT )
51 to single: f32(-0x1.00000000000000000000p+1:0xc0000000) (OK)
57 to single: f32(-0x1.00000000000000000000p+0:0xbf800000) (OK)
[all …]
|
| H A D | float_convs.ref | 2 from single: f32(-nan:0xffa00000)
8 from single: f32(-nan:0xffc00000)
14 from single: f32(-inf:0xff800000)
20 from single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
26 from single: f32(-0x1.1874b200000000000000p+103:0xf30c3a59)
32 from single: f32(-0x1.c0bab600000000000000p+99:0xf1605d5b)
38 from single: f32(-0x1.31f75000000000000000p-40:0xab98fba8)
44 from single: f32(-0x1.50544400000000000000p-66:0x9ea82a22)
50 from single: f32(-0x1.00000000000000000000p-126:0x80800000)
56 from single: f32(0x0.00000000000000000000p+0:0000000000)
[all …]
|
| /qemu/tests/tcg/aarch64/ |
| H A D | fcvt.ref | 3 Converting single-precision to half-precision
4 00 SINGLE: -nan / 0xffa00000 (0 => OK)
6 01 SINGLE: -nan / 0xffc00000 (0 => OK)
8 02 SINGLE: -inf / 0xff800000 (0 => OK)
10 03 SINGLE: -3.40282346638528859812e+38 / 0xff7fffff (0 => OK)
12 04 SINGLE: -1.11100004769645909791e+31 / 0xf30c3a59 (0 => OK)
14 05 SINGLE: -1.11100003258488635273e+30 / 0xf1605d5b (0 => OK)
16 06 SINGLE: -1.08700982243137289629e-12 / 0xab98fba8 (0 => OK)
18 07 SINGLE: -1.78051176151664730511e-20 / 0x9ea82a22 (0 => OK)
20 08 SINGLE: -1.17549435082228750797e-38 / 0x80800000 (0 => OK)
[all …]
|
| H A D | float_convd.ref | 3 to single: f32(nan:0x7fe00000) (INVALID)
9 to single: f32(-nan:0xffc00000) (OK)
15 to single: f32(-inf:0xff800000) (OK)
21 to single: f32(-inf:0xff800000) (OVERFLOW INEXACT )
27 to single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff) (OK)
33 to single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff) (OK)
39 to single: f32(-0x1.1874b200000000000000p+103:0xf30c3a59) (INEXACT )
45 to single: f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) (INEXACT )
51 to single: f32(-0x1.00000000000000000000p+1:0xc0000000) (OK)
57 to single: f32(-0x1.00000000000000000000p+0:0xbf800000) (OK)
[all …]
|
| H A D | float_convs.ref | 2 from single: f32(-nan:0xffa00000)
8 from single: f32(-nan:0xffc00000)
14 from single: f32(-inf:0xff800000)
20 from single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
26 from single: f32(-0x1.1874b200000000000000p+103:0xf30c3a59)
32 from single: f32(-0x1.c0bab600000000000000p+99:0xf1605d5b)
38 from single: f32(-0x1.31f75000000000000000p-40:0xab98fba8)
44 from single: f32(-0x1.50544400000000000000p-66:0x9ea82a22)
50 from single: f32(-0x1.00000000000000000000p-126:0x80800000)
56 from single: f32(0x0.00000000000000000000p+0:0000000000)
[all …]
|
| /qemu/tests/tcg/x86_64/ |
| H A D | float_convd.ref | 3 to single: f32(nan:0x7fe00000) (INVALID)
9 to single: f32(-nan:0xffc00000) (OK)
15 to single: f32(-inf:0xff800000) (OK)
21 to single: f32(-inf:0xff800000) (OVERFLOW INEXACT )
27 to single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff) (OK)
33 to single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff) (OK)
39 to single: f32(-0x1.1874b200000000000000p+103:0xf30c3a59) (INEXACT )
45 to single: f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) (INEXACT )
51 to single: f32(-0x1.00000000000000000000p+1:0xc0000000) (OK)
57 to single: f32(-0x1.00000000000000000000p+0:0xbf800000) (OK)
[all …]
|
| H A D | float_convs.ref | 2 from single: f32(-nan:0xffa00000)
8 from single: f32(-nan:0xffc00000)
14 from single: f32(-inf:0xff800000)
20 from single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
26 from single: f32(-0x1.1874b200000000000000p+103:0xf30c3a59)
32 from single: f32(-0x1.c0bab600000000000000p+99:0xf1605d5b)
38 from single: f32(-0x1.31f75000000000000000p-40:0xab98fba8)
44 from single: f32(-0x1.50544400000000000000p-66:0x9ea82a22)
50 from single: f32(-0x1.00000000000000000000p-126:0x80800000)
56 from single: f32(0x0.00000000000000000000p+0:0000000000)
[all …]
|
| /qemu/tests/tcg/loongarch64/ |
| H A D | float_convd.ref | 3 to single: f32(nan:0x7fe00000) (INVALID)
9 to single: f32(-nan:0xffc00000) (OK)
15 to single: f32(-inf:0xff800000) (OK)
21 to single: f32(-inf:0xff800000) (OVERFLOW INEXACT )
27 to single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff) (OK)
33 to single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff) (OK)
39 to single: f32(-0x1.1874b200000000000000p+103:0xf30c3a59) (INEXACT )
45 to single: f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) (INEXACT )
51 to single: f32(-0x1.00000000000000000000p+1:0xc0000000) (OK)
57 to single: f32(-0x1.00000000000000000000p+0:0xbf800000) (OK)
[all …]
|
| H A D | float_convs.ref | 2 from single: f32(-nan:0xffa00000)
8 from single: f32(-nan:0xffc00000)
14 from single: f32(-inf:0xff800000)
20 from single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
26 from single: f32(-0x1.1874b200000000000000p+103:0xf30c3a59)
32 from single: f32(-0x1.c0bab600000000000000p+99:0xf1605d5b)
38 from single: f32(-0x1.31f75000000000000000p-40:0xab98fba8)
44 from single: f32(-0x1.50544400000000000000p-66:0x9ea82a22)
50 from single: f32(-0x1.00000000000000000000p-126:0x80800000)
56 from single: f32(0x0.00000000000000000000p+0:0000000000)
[all …]
|
| /qemu/tests/tcg/hexagon/ |
| H A D | float_convd.ref | 3 to single: f32(-nan:0xffffffff) (INVALID)
9 to single: f32(-nan:0xffffffff) (OK)
15 to single: f32(-inf:0xff800000) (OK)
21 to single: f32(-inf:0xff800000) (OVERFLOW INEXACT )
27 to single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff) (OK)
33 to single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff) (OK)
39 to single: f32(-0x1.1874b200000000000000p+103:0xf30c3a59) (INEXACT )
45 to single: f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) (INEXACT )
51 to single: f32(-0x1.00000000000000000000p+1:0xc0000000) (OK)
57 to single: f32(-0x1.00000000000000000000p+0:0xbf800000) (OK)
[all …]
|
| H A D | float_convs.ref | 2 from single: f32(-nan:0xffa00000)
8 from single: f32(-nan:0xffc00000)
14 from single: f32(-inf:0xff800000)
20 from single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
26 from single: f32(-0x1.1874b200000000000000p+103:0xf30c3a59)
32 from single: f32(-0x1.c0bab600000000000000p+99:0xf1605d5b)
38 from single: f32(-0x1.31f75000000000000000p-40:0xab98fba8)
44 from single: f32(-0x1.50544400000000000000p-66:0x9ea82a22)
50 from single: f32(-0x1.00000000000000000000p-126:0x80800000)
56 from single: f32(0x0.00000000000000000000p+0:0000000000)
[all …]
|
| /qemu/tests/tcg/ppc64le/ |
| H A D | float_convs.ref | 2 from single: f32(-nan:0xffa00000)
8 from single: f32(-nan:0xffc00000)
14 from single: f32(-inf:0xff800000)
20 from single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
26 from single: f32(-0x1.1874b200000000000000p+103:0xf30c3a59)
32 from single: f32(-0x1.c0bab600000000000000p+99:0xf1605d5b)
38 from single: f32(-0x1.31f75000000000000000p-40:0xab98fba8)
44 from single: f32(-0x1.50544400000000000000p-66:0x9ea82a22)
50 from single: f32(-0x1.00000000000000000000p-126:0x80800000)
56 from single: f32(0x0.00000000000000000000p+0:0000000000)
[all …]
|
| /qemu/linux-user/arm/nwfpe/ |
| H A D | fpopcode.c | 52 const_float32(0x00000000), /* single 0.0 */
53 const_float32(0x3f800000), /* single 1.0 */
54 const_float32(0x40000000), /* single 2.0 */
55 const_float32(0x40400000), /* single 3.0 */
56 const_float32(0x40800000), /* single 4.0 */
57 const_float32(0x40a00000), /* single 5.0 */
58 const_float32(0x3f000000), /* single 0.5 */
59 const_float32(0x41200000) /* single 10.0 */
|
| /qemu/include/exec/ |
| H A D | memop.h | 77 * MO_ATOM_IFALIGN: the operation must be single-copy atomic if it
81 * for convenience, with single-copy atomicity on each half if
84 * MO_ATOM_WITHIN16: the operation is single-copy atomic, even if it
88 * MO_ATOM_WITHIN16_PAIR: the entire operation is single-copy atomic,
91 * Depending on alignment, one or both will be single-copy atomic.
93 * MO_ATOM_SUBALIGN: the operation is single-copy atomic by parts
96 * single-copy atomic; otherwise, if it is accessed at 0 mod 4
97 * then each 4-byte subobject is single-copy atomic; otherwise
99 * are single-copy atomic.
103 * Note the default (i.e. 0) value is single
[all...] |
| H A D | memopidx.h | 2 * Combine the MemOp and mmu_idx parameters into a single value.
23 * Encode these values into a single parameter.
|
| /qemu/docs/system/ |
| H A D | gdb.rst | 91 single cluster which has all the CPUs in it. A few machine types are
109 Once connected, gdb will have a single inferior, for the
163 Changing single-stepping behaviour
166 The default single stepping behavior is step with the IRQs and timer
168 single step it expects to advance beyond the current instruction. With
169 the IRQs and timer service routines on, a single step might jump into
173 Because there are rare circumstances where you want to single step into
175 three commands you can query and set the single step behavior:
178 This will display the MASK bits used to control the single stepping
188 This will display the current value of the mask used when single
[all …]
|
| /qemu/python/qemu/utils/ |
| H A D | __init__.py | 68 This function assumes that the text decoration characters are single
69 characters that display using a single monospace column.
88 :param upper_left: Upper-left single-width text decoration character.
89 :param lower_left: Lower-left single-width text decoration character.
90 :param horizontal: Horizontal single-width text decoration character.
91 :param vertical: Vertical single-width text decoration character.
|
| /qemu/util/ |
| H A D | error-report.c | 183 * a single phrase, with no newline or trailing punctuation.
222 * a single phrase, with no newline or trailing punctuation.
234 * a single phrase, with no newline or trailing punctuation.
246 * a single phrase, with no newline or trailing punctuation.
257 * a single phrase, with no newline or trailing punctuation.
273 * single phrase, with no newline or trailing punctuation.
289 * single phrase, with no newline or trailing punctuation.
|
| /qemu/accel/tcg/ |
| H A D | tcg-accel-ops-rr.c | 2 * QEMU TCG Single Threaded vCPUs implementation
53 * The kick timer is responsible for moving single threaded vCPU
146 * Calculate the number of CPUs that we will process in a single iteration of
173 * In the single-threaded case each vCPU is simulated in turn. If
174 * there is more than a single vCPU we create a simple timer to kick
321 /* share a single thread for all cpus with TCG */ in rr_start_vcpu_thread()
|
| /qemu/scripts/ |
| H A D | make-release | 21 # have a single section only. There should be only one section
53 git clone --single-branch -b "v${version}" -c advice.detachedHead=false \
58 git submodule update --init --single-branch
|
| /qemu/include/hw/mem/ |
| H A D | memory-device.h | 46 * be provided. Scattered memory regions are not supported for single
50 * single RAM memory region or a memory region container with subregions
117 * Optional for memory devices that require only a single memslot,
157 * support automatically deciding how many memslots to use to only use a single
|
| /qemu/docs/devel/ |
| H A D | rcu.rst | 9 RCU supports concurrency between a single writer and multiple readers,
12 restricting updates to a single task). In QEMU, when a lock is used,
14 lock" (BQL). Also, restricting updates to a single task is done in
27 the system will have a single instance of the RCU mechanism; a single
132 ``qatomic_rcu_read`` assumes that whenever a single RCU critical
145 data structure in a single direction, opposite to the direction
|