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/linux-6.8/Documentation/devicetree/bindings/mailbox/
D	apple,mailbox.yaml	`1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Hector Martin <marcan@marcan.st> 11 - Sven Peter <sven@svenpeter.dev> 15 messages between the main CPU and a co-processor. Multiple instances 17 One of the two FIFOs is used to send data to a co-processor while the other 25 - description: 30 - enum: 31 - apple,t8103-asc-mailbox [all …]`
/linux-6.8/tools/perf/pmu-events/arch/x86/ivytown/
D	uncore-interconnect.json	16 … had an address match with another request in the write cache.; When it is not possible to merge t… 25 …not yet returned their data to the uncore. These writes are generally queued up in the switch try… 34 …": "Accumulates the number of writes that have acquired ownership but have not yet returned their … 52 …Q register. This register allows one to select one specific queue. It is not possible to monitor… 70 …Q register. This register allows one to select one specific queue. It is not possible to monitor… 88 …Q register. This register allows one to select one specific queue. It is not possible to monitor… 106 …Q register. This register allows one to select one specific queue. It is not possible to monitor… 147 "BriefDescription": "BL Ingress Occupancy - DRS", 169 "BriefDescription": "BL Ingress Occupancy - NCB", 191 "BriefDescription": "BL Ingress Occupancy - NCS", [all …]
D	uncore-cache.json	13 …ed in Counter 0. The filtering available is found in the control register - threshold, invert an… 21 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa… 30 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 39 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 48 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 57 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa… 188 "BriefDescription": "LRU Queue; Non-0 Aged Victim", 192 "PublicDescription": "How often we picked a victim that had a non-zero age", 201 …not include when packets are being sent from the ring stop. We really have two rings in JKT -- a … 210 …not include when packets are being sent from the ring stop. We really have two rings in JKT -- a … [all …]
/linux-6.8/tools/perf/pmu-events/arch/x86/emeraldrapids/
D	uncore-interconnect.json	27 "BriefDescription": "FAF - request insert from TC.", 41 "BriefDescription": "FAF allocation -- sent to ADQ", 72 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary", 80 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary", 88 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary", 96 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects", 104 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests", 112 … "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers From Primary to Secondary", 120 … "BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints From Primary to Secondary", 128 "BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn't find prefetch", [all …]
/linux-6.8/tools/perf/pmu-events/arch/x86/sapphirerapids/
D	uncore-interconnect.json	27 "BriefDescription": "FAF - request insert from TC.", 41 "BriefDescription": "FAF allocation -- sent to ADQ", 72 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary", 80 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary", 88 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary", 96 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects", 104 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests", 112 … "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers From Primary to Secondary", 120 … "BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints From Primary to Secondary", 128 "BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn't find prefetch", [all …]
/linux-6.8/tools/perf/pmu-events/arch/x86/haswellx/
D	uncore-interconnect.json	6 …-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along wi… 15 …-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along wi… 34 …Q register. This register allows one to select one specific queue. It is not possible to monitor… 118 … "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary", 122 …"PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary", 127 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary", 131 … "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary", 136 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary", 140 … "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary", 145 "BriefDescription": "Misc Events - Set 0; Fastpath Rejects", [all …]
D	uncore-cache.json	25 …"BriefDescription": "LLC misses - demand and prefetch data reads - excludes LLC prefetches. Derive… 102 …"BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_c_tor_inserts.mi… 195 …ed in Counter 0. The filtering available is found in the control register - threshold, invert an… 207 … "BriefDescription": "All LLC Misses (code+ data rd + data wr - including demand and prefetch)", 212 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa… 222 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 231 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 240 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 249 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 258 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa… [all …]
/linux-6.8/tools/perf/pmu-events/arch/x86/broadwellx/
D	uncore-interconnect.json	6 …-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along wi… 15 …-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along wi… 34 …Q register. This register allows one to select one specific queue. It is not possible to monitor… 118 … "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary", 122 …"PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary", 127 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary", 131 … "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary", 136 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary", 140 … "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary", 145 "BriefDescription": "Misc Events - Set 0; Fastpath Rejects", [all …]
D	uncore-cache.json	25 …"BriefDescription": "LLC misses - demand and prefetch data reads - excludes LLC prefetches. Derive… 102 …"BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_c_tor_inserts.mi… 195 …ed in Counter 0. The filtering available is found in the control register - threshold, invert an… 207 … "BriefDescription": "All LLC Misses (code+ data rd + data wr - including demand and prefetch)", 212 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa… 222 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 231 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 240 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 249 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 258 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa… [all …]
/linux-6.8/arch/arm64/boot/dts/apple/
D	t600x-nvme.dtsi	`1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 9 compatible = "apple,t6000-asc-mailbox", "apple,asc-mailbox-v4"; 11 interrupt-parent = <&aic>; 16 interrupt-names = "send-empty", "send-not-empty", 17 "recv-empty", "recv-not-empty"; 18 power-domains = <&DIE_NODE(ps_ans2)>; 19 #mbox-cells = <0>; 23 compatible = "apple,t6000-sart"; 25 power-domains = <&DIE_NODE(ps_ans2)>; 29 compatible = "apple,t6000-nvme-ans2", "apple,nvme-ans2"; [all …]`
/linux-6.8/tools/perf/pmu-events/arch/x86/skylakex/
D	uncore-interconnect.json	86 …date to Modified command that requests ownership of the cacheline and does not move data from the … 132 "BriefDescription": "FAF allocation -- sent to ADQ", 155 … "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary", 163 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary", 171 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary", 179 "BriefDescription": "Misc Events - Set 0; Fastpath Rejects", 187 "BriefDescription": "Misc Events - Set 0; Fastpath Requests", 195 "BriefDescription": "Misc Events - Set 0; Fastpath Transfers From Primary to Secondary", 203 "BriefDescription": "Misc Events - Set 0; Prefetch Ack Hints From Primary to Secondary", 211 "BriefDescription": "Misc Events - Set 0", [all …]
/linux-6.8/tools/perf/pmu-events/arch/x86/cascadelakex/
D	uncore-interconnect.json	86 …date to Modified command that requests ownership of the cacheline and does not move data from the … 132 "BriefDescription": "FAF allocation -- sent to ADQ", 155 … "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary", 163 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary", 171 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary", 179 "BriefDescription": "Misc Events - Set 0; Fastpath Rejects", 187 "BriefDescription": "Misc Events - Set 0; Fastpath Requests", 195 "BriefDescription": "Misc Events - Set 0; Fastpath Transfers From Primary to Secondary", 203 "BriefDescription": "Misc Events - Set 0; Prefetch Ack Hints From Primary to Secondary", 211 "BriefDescription": "Misc Events - Set 0", [all …]
/linux-6.8/tools/perf/pmu-events/arch/x86/icelakex/
D	uncore-interconnect.json	50 …date to Modified command that requests ownership of the cacheline and does not move data from the … 96 "BriefDescription": "FAF allocation -- sent to ADQ", 127 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary", 135 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary", 143 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary", 151 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects", 159 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests", 167 … "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers From Primary to Secondary", 175 … "BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints From Primary to Secondary", 183 "BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn't find prefetch", [all …]
D	uncore-cache.json	871 …system. This can be filtered by when the bypass was taken and when it was not. : Filter for trans… 876 "BriefDescription": "CHA to iMC Bypass : Not Taken", 880 …Not Taken : Counts the number of times when the CHA was able to bypass HA pipe on the way to iMC. … 889 …system. This can be filtered by when the bypass was taken and when it was not. : Filter for trans… 911 …s are set on a data read, the cores must have the data in S state so it is not necessary to snoop … 920 …s are set on a data read, the cores must have the data in S state so it is not necessary to snoop … 929 …s are set on a data read, the cores must have the data in S state so it is not necessary to snoop … 938 …s are set on a data read, the cores must have the data in S state so it is not necessary to snoop … 947 …s are set on a data read, the cores must have the data in S state so it is not necessary to snoop … 956 …s are set on a data read, the cores must have the data in S state so it is not necessary to snoop … [all …]
/linux-6.8/Documentation/networking/caif/
D	caif.rst	1 .. SPDX-License-Identifier: GPL-2.0 10 :Copyright: \|copy\| ST-Ericsson AB 2010 40 The use of Start-of-frame-extension (STX) must also be set as 59 /sys/kernel/debug/caif_serial/<tty-name>/ 61 * ser_state: Prints the bit-mask status where 63 - 0x02 means SENDING, this is a transient state. 64 - 0x10 means FLOW_OFF_SENT, i.e. the previous frame has not been sent 65 and is blocking further send operation. Flow OFF has been propagated 68 * tty_status: Prints the bit-mask tty status information 70 - 0x01 - tty->warned is on. [all …]
/linux-6.8/tools/perf/pmu-events/arch/arm64/arm/neoverse-n1/
D	stall.json	`4 …not send any micro-operations to the rename stage because of frontend resource stalls caused by fe… 8 …send any micro-operations to the backend of the pipeline because of backend resource constraints. …`
/linux-6.8/tools/perf/pmu-events/arch/x86/jaketown/
D	uncore-cache.json	13 …ed in Counter 0. The filtering available is found in the control register - threshold, invert an… 27 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 36 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 45 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 54 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 144 …not include when packets are being sent from the ring stop. We really have two rings in JKT -- a … 153 …not include when packets are being sent from the ring stop. We really have two rings in JKT -- a … 162 …not include when packets are being sent from the ring stop. We really have two rings in JKT -- a … 171 …not include when packets are being sent from the ring stop. We really have two rings in JKT -- a … 180 …not include when packets are being sent from the ring stop.We really have two rings in JKT -- a cl… [all …]
/linux-6.8/Documentation/virt/hyperv/
D	vmbus.rst	1 .. SPDX-License-Identifier: GPL-2.0 5 VMbus is a software construct provided by Hyper-V to guest VMs. It 7 devices that Hyper-V presents to guest VMs. The control path is 11 and the synthetic device implementation that is part of Hyper-V, and 12 signaling primitives to allow Hyper-V and the guest to interrupt 17 establishes the VMbus control path with the Hyper-V host, then 21 Most synthetic devices offered by Hyper-V have a corresponding Linux 29 * PCI device pass-thru 34 * Key/Value Pair (KVP) exchange with Hyper-V 35 * Hyper-V online backup (a.k.a. VSS) [all …]
/linux-6.8/tools/perf/pmu-events/arch/arm64/arm/neoverse-v1/
D	stall.json	`4 …not send any micro-operations to the rename stage because of frontend resource stalls caused by fe… 8 …send any micro-operations to the backend of the pipeline because of backend resource constraints. …`
/linux-6.8/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/
D	stall.json	`4 …not send any micro-operations to the rename stage because of frontend resource stalls caused by fe… 8 …send any micro-operations to the backend of the pipeline because of backend resource constraints. …`
/linux-6.8/tools/perf/pmu-events/arch/x86/broadwellde/
D	uncore-cache.json	20 …ed in Counter 0. The filtering available is found in the control register - threshold, invert an… 36 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa… 45 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 54 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 63 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 72 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer… 81 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa… 140 "BriefDescription": "Cbo Misc; DRd hitting non-M with raw CV=0", 239 "BriefDescription": "LRU Queue; Non-0 Aged Victim", 243 "PublicDescription": "How often we picked a victim that had a non-zero age", [all …]
/linux-6.8/tools/perf/pmu-events/arch/x86/snowridgex/
D	uncore-cache.json	8 …d into the TOR that match qualifications specified by the subevent. Does not include addressless… 18 …d into the TOR that match qualifications specified by the subevent. Does not include addressless… 23 …"BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_cha_tor_inserts.… 28 …d into the TOR that match qualifications specified by the subevent. Does not include addressless… 38 …d into the TOR that match qualifications specified by the subevent. Does not include addressless… 49 …d into the TOR that match qualifications specified by the subevent. Does not include addressless… 851 …system. This can be filtered by when the bypass was taken and when it was not. : Filter for trans… 856 "BriefDescription": "CHA to iMC Bypass : Not Taken", 860 …Not Taken : Counts the number of times when the CHA was able to bypass HA pipe on the way to iMC. … 869 …system. This can be filtered by when the bypass was taken and when it was not. : Filter for trans… [all …]
D	uncore-interconnect.json	50 …date to Modified command that requests ownership of the cacheline and does not move data from the … 96 "BriefDescription": "FAF allocation -- sent to ADQ", 127 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary", 135 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary", 143 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary", 151 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects", 159 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests", 167 … "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers From Primary to Secondary", 175 … "BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints From Primary to Secondary", 183 "BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn't find prefetch", [all …]
/linux-6.8/drivers/tty/serial/
D	arc_uart.c	1 // SPDX-License-Identifier: GPL-2.0 3 * ARC On-Chip(fpga) UART Driver 5 * Copyright (C) 2010-2012 Synopsys, Inc. (www.synopsys.com) 8 * -Decoupled the driver from arch/arc 10 * +Using early_platform_xxx() for early console (thx to mach-shmobile/xxx) 13 * -Is uart_tx_stopped() not done in tty write path as it has already been 17 * -New Serial Core based ARC UART driver 18 * -Derived largely from blackfin driver albiet with some major tweaks 21 * -check if sysreq works 42 * UART Register set (this is not a Standards Compliant IP) [all …]
/linux-6.8/drivers/block/drbd/
D	drbd_req.h	1 /* SPDX-License-Identifier: GPL-2.0-only / 7 Copyright (C) 2006-2008, LINBIT Information Technologies GmbH. 8 Copyright (C) 2006-2008, Lars Ellenberg <lars.ellenberg@linbit.com>. 9 Copyright (C) 2006-2008, Philipp Reisner <philipp.reisner@linbit.com>. 24 and by the receiver and worker in kernel-thread context. 37 send via the network. 47 * either successfully or with io-error. 60 * corresponding dirty bits in the resync-bitmap may be cleared or set, 72 * these are not "events" but "actions" 78 /* An empty flush is queued as P_BARRIER, [all …]

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