Searched +full:select +full:- +full:gpios (Results 1 – 25 of 377) sorted by relevance
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/linux-6.8/drivers/pinctrl/intel/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 8 select PINCTRL_INTEL 11 platforms. Supports 3 banks with 102, 28 and 44 gpios. 19 select PINCTRL_INTEL 22 allows configuring of SoC pins and using them as GPIOs. 26 select PINCTRL_INTEL 30 using them as GPIOs. 34 select PINMUX 35 select PINCONF 36 select GENERIC_PINCONF [all …]
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D | Kconfig.tng | 1 # SPDX-License-Identifier: GPL-2.0-only 8 select PINMUX 9 select PINCONF 10 select GENERIC_PINCONF 15 If built as a module its name will be pinctrl-tangier. 19 select PINCTRL_TANGIER 21 Intel Merrifield Family-Level Interface Shim (FLIS) driver provides 23 GPIOs. 27 select PINCTRL_TANGIER 29 Intel Moorefield Family-Level Interface Shim (FLIS) driver provides [all …]
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/linux-6.8/drivers/gpio/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 18 int "Maximum number of GPIOs for fast path" 39 select IRQ_DOMAIN 46 from PowerPC. Existing drivers using this interface need to select 47 this symbol, but new drivers should use the generic gpio-regmap 55 These checks help ensure that GPIOs have been properly initialized 57 non-sleeping contexts. They can make bitbanged serial protocols 64 select GPIO_CDEV # We need to encourage the new ABI 66 Say Y here to add the legacy sysfs interface for GPIOs. 78 for GPIOs. The character device allows userspace to control GPIOs [all …]
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/linux-6.8/Documentation/devicetree/bindings/usb/ |
D | gpio-sbu-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/usb/gpio-sbu-mux.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: GPIO-based SBU mux 10 - Bjorn Andersson <andersson@kernel.org> 13 In USB Type-C applications the SBU lines needs to be connected, disconnected 21 - enum: 22 - nxp,cbdtu02043 23 - onnn,fsusb43l10x [all …]
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/linux-6.8/Documentation/devicetree/bindings/spi/ |
D | fsl-spi.txt | 4 - cell-index : QE SPI subblock index. 7 - compatible : should be "fsl,spi" or "aeroflexgaisler,spictrl". 8 - mode : the SPI operation mode, it can be "cpu" or "cpu-qe". 9 - reg : Offset and length of the register set for the device 10 - interrupts : <a b> where a is the interrupt number and b is a 15 - clock-frequency : input clock frequency to non FSL_SOC cores 18 - cs-gpios : specifies the gpio pins to be used for chipselects. 19 The gpios will be referred to as reg = <index> in the SPI child nodes. 20 If unspecified, a single SPI device without a chip select can be used. 21 - fsl,spisel_boot : for the MPC8306 and MPC8309, specifies that the [all …]
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D | spi-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/spi/spi-gpio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: SPI-GPIO 10 - Rob Herring <robh@kernel.org> 13 This represents a group of 3-n GPIO lines used for bit-banged SPI on 17 - $ref: /schemas/spi/spi-controller.yaml# 21 const: spi-gpio 23 sck-gpios: [all …]
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/linux-6.8/Documentation/devicetree/bindings/sound/ |
D | asahi-kasei,ak4458.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/sound/asahi-kasei,ak4458.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shengjiu Wang <shengjiu.wang@nxp.com> 15 - asahi-kasei,ak4458 16 - asahi-kasei,ak4497 21 avdd-supply: 24 dvdd-supply: 27 reset-gpios: [all …]
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D | simple-audio-mux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/simple-audio-mux.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexandre Belloni <aleandre.belloni@bootlin.com> 13 Simple audio multiplexers are driven using gpios, allowing to select which of 17 - $ref: dai-common.yaml# 21 const: simple-audio-mux 23 mux-gpios: 25 GPIOs used to select the input line. [all …]
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/linux-6.8/Documentation/devicetree/bindings/clock/ |
D | gpio-mux-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/gpio-mux-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sergej Sawazki <ce3a@gmx.de> 14 const: gpio-mux-clock 18 - description: First parent clock 19 - description: Second parent clock 21 '#clock-cells': 24 select-gpios: [all …]
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/linux-6.8/drivers/pinctrl/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 19 select PINMUX 26 select PINCONF 38 select GPIOLIB 39 select GPIOLIB_IRQCHIP 40 select PINMUX 41 select PINCONF 42 select GENERIC_PINCONF 55 select PINMUX 56 select GPIOLIB [all …]
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/linux-6.8/Documentation/devicetree/bindings/net/ |
D | sff,sfp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Small Form Factor (SFF) Committee Small Form-factor Pluggable (SFP) 11 - Russell King <linux@armlinux.org.uk> 16 - sff,sfp # for SFP modules 17 - sff,sff # for soldered down SFF modules 19 i2c-bus: 24 maximum-power-milliwatt: 29 allowable by a module in the slot, in milli-Watts. Presently, modules can [all …]
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/linux-6.8/arch/arm/boot/dts/marvell/ |
D | armada-xp-lenovo-ix4-300d.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree file for Lenovo Iomega ix4-300d 8 /dts-v1/; 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include "armada-xp-mv78230.dtsi" 15 model = "Lenovo Iomega ix4-300d"; 16 compatible = "lenovo,ix4-300d", "marvell,armadaxp-mv78230", 17 "marvell,armadaxp", "marvell,armada-370-xp"; 20 stdout-path = "serial0:115200n8"; [all …]
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D | kirkwood-openrd.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 12 #include "kirkwood-6281.dtsi" 22 stdout-path = &uart0; 26 pinctrl: pin-controller@10000 { 27 pinctrl-0 = <&pmx_select28 &pmx_sdio_cd &pmx_select34>; 28 pinctrl-names = "default"; 30 pmx_select28: pmx-select-rs232-rs485 { 34 pmx_sdio_cd: pmx-sdio-cd { 38 pmx_select34: pmx-select-uart-sd { 49 nr-ports = <2>; [all …]
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/linux-6.8/arch/powerpc/platforms/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 28 select EPAPR_PARAVIRT 37 bool "ePAPR para-virtualization support" 39 Enables ePAPR para-virtualization support for guests. 48 a hypervisor. This option is not user-selectable but should 54 select RELOCATABLE if PPC64 65 bool "Device-tree based CPU feature discovery & setup" 82 Select this option if your platform supports SMP and your 114 select EPAPR_PARAVIRT 124 registers are used for inter-processor communication. [all …]
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/linux-6.8/Documentation/devicetree/bindings/iio/resolver/ |
D | adi,ad2s1210.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Analog Devices AD2S1210 Resolver-to-Digital Converter 10 - Michael Hennerich <michael.hennerich@analog.com> 13 The AD2S1210 is a complete 10-bit to 16-bit resolution tracking 14 resolver-to-digital converter, integrating an on-board programmable 29 0 0 Normal mode - position output 30 0 1 Normal mode - velocity output 44 Note on SPI connections: The CS line on the AD2S1210 should hard-wired to [all …]
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/linux-6.8/Documentation/devicetree/bindings/mtd/ |
D | fsl-upm-nand.txt | 4 - compatible : "fsl,upm-nand". 5 - reg : should specify localbus chip select and size used for the chip. 6 - fsl,upm-addr-offset : UPM pattern offset for the address latch. 7 - fsl,upm-cmd-offset : UPM pattern offset for the command latch. 10 - fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support. 11 The corresponding address lines are used to select the chip. 12 - gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins 13 (R/B#). For multi-chip devices, "n" GPIO definitions are required 17 - fsl,upm-wait-flags : add chip-dependent short delays after running the 20 - chip-delay : chip dependent delay for transferring data from array to [all …]
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D | nand-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mtd/nand-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Miquel Raynal <miquel.raynal@bootlin.com> 11 - Richard Weinberger <richard@nod.at> 21 pattern: "^nand-controller(@.*)?" 23 "#address-cells": 26 "#size-cells": 31 cs-gpios: [all …]
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/linux-6.8/Documentation/devicetree/bindings/misc/ |
D | ifm-csi.txt | 4 - compatible: "ifm,o2d-csi" 5 - reg: specifies sensor chip select number and associated address range 6 - interrupts: external interrupt line number and interrupt sense mode 8 - gpios: three gpio-specifiers for "capture", "reset" and "master enable" 9 GPIOs (strictly in this order). 10 - ifm,csi-clk-handle: the phandle to a node in the DT describing the sensor 12 - ifm,csi-addr-bus-width: address bus width (valid values are 16, 24, 25) 13 - ifm,csi-data-bus-width: data bus width (valid values are 8 and 16) 14 - ifm,csi-wait-cycles: sensor bus wait cycles 17 - ifm,csi-byte-swap: if this property is present, the byte swapping on [all …]
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/linux-6.8/Documentation/devicetree/bindings/eeprom/ |
D | microchip,93lc46b.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Cory Tusar <cory.tusar@pid1solutions.com> 15 - atmel,at93c46 16 - atmel,at93c46d 17 - atmel,at93c56 18 - atmel,at93c66 19 - eeprom-93xx46 20 - microchip,93lc46b [all …]
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/linux-6.8/Documentation/devicetree/bindings/gpio/ |
D | gpio-consumer-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/gpio/gpio-consumer-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bartosz Golaszewski <brgl@bgdev.pl> 11 - Linus Walleij <linus.walleij@linaro.org> 14 Pay attention to using proper GPIO flag (e.g. GPIO_ACTIVE_LOW) for the GPIOs 17 select: true 20 enable-gpios: 25 reset-gpios: [all …]
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D | spear_spics.txt | 10 Chipselects can be controlled by software by turning them as GPIOs. SPEAr 17 * compatible: should be defined as "st,spear-spics-gpio" 19 * st-spics,peripcfg-reg: peripheral configuration register offset 20 * st-spics,sw-enable-bit: bit offset to enable sw control 21 * st-spics,cs-value-bit: bit offset to drive chipselect low or high 22 * st-spics,cs-enable-mask: chip select number bit mask 23 * st-spics,cs-enable-shift: chip select number program offset 24 * gpio-controller: Marks the device node as gpio controller 25 * #gpio-cells: should be 1 and will mention chip select number 30 ------- [all …]
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D | gpio-max3191x.txt | 4 - compatible: Must be one of: 11 - reg: Chip select number. 12 - gpio-controller: Marks the device node as a GPIO controller. 13 - #gpio-cells: Should be two. For consumer use see gpio.txt. 16 - #daisy-chained-devices: 17 Number of chips in the daisy-chain (default is 1). 18 - maxim,modesel-gpios: GPIO pins to configure modesel of each chip. 19 The number of GPIOs must equal "#daisy-chained-devices" 22 - maxim,fault-gpios: GPIO pins to read fault of each chip. 23 The number of GPIOs must equal "#daisy-chained-devices" [all …]
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/linux-6.8/Documentation/devicetree/bindings/regulator/ |
D | richtek,rt6245-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/regulator/richtek,rt6245-regulator.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - ChiYuan Huang <cy_huang@richtek.com> 13 The RT6245 is a high-performance, synchronous step-down converter 18 - $ref: regulator.yaml# 23 - richtek,rt6245 28 enable-gpios: 31 it will be treat as a default-on power. [all …]
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/linux-6.8/Documentation/devicetree/bindings/fpga/ |
D | altera-passive-serial.txt | 11 - compatible: Must be one of the following: 12 "altr,fpga-passive-serial", 13 "altr,fpga-arria10-passive-serial" 14 - reg: SPI chip select of the FPGA 15 - nconfig-gpios: config pin (referred to as nCONFIG in the manual) 16 - nstat-gpios: status pin (referred to as nSTATUS in the manual) 19 - confd-gpios: confd pin (referred to as CONF_DONE in the manual) 23 compatible = "altr,fpga-passive-serial"; 24 spi-max-frequency = <20000000>; 26 nconfig-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>; [all …]
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D | lattice-ice40-fpga-mgr.txt | 4 - compatible: Should contain "lattice,ice40-fpga-mgr" 5 - reg: SPI chip select 6 - spi-max-frequency: Maximum SPI frequency (>=1000000, <=25000000) 7 - cdone-gpios: GPIO input connected to CDONE pin 8 - reset-gpios: Active-low GPIO output connected to CRESET_B pin. Note 16 compatible = "lattice,ice40-fpga-mgr"; 18 spi-max-frequency = <1000000>; 19 cdone-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>; 20 reset-gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
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