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Searched +full:sdx75 +full:- +full:gcc (Results 1 – 12 of 12) sorted by relevance

/linux-6.8/Documentation/devicetree/bindings/clock/
Dqcom,sdx75-gcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sdx75-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller on SDX75
10 - Imran Shaik <quic_imrashai@quicinc.com>
11 - Taniya Das <quic_tdas@quicinc.com>
15 domains on SDX75
17 See also:: include/dt-bindings/clock/qcom,sdx75-gcc.h
21 const: qcom,sdx75-gcc
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Dqcom,rpmhcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Taniya Das <quic_tdas@quicinc.com>
20 - qcom,qdu1000-rpmh-clk
21 - qcom,sa8775p-rpmh-clk
22 - qcom,sc7180-rpmh-clk
23 - qcom,sc7280-rpmh-clk
24 - qcom,sc8180x-rpmh-clk
25 - qcom,sc8280xp-rpmh-clk
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/linux-6.8/arch/arm64/boot/dts/qcom/
Dsdx75.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * SDX75 SoC device tree source
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/clock/qcom,sdx75-gcc.h>
11 #include <dt-bindings/interconnect/qcom,icc.h>
12 #include <dt-bindings/interconnect/qcom,sdx75.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/power/qcom,rpmhpd.h>
15 #include <dt-bindings/power/qcom-rpmpd.h>
16 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
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/linux-6.8/Documentation/devicetree/bindings/phy/
Dqcom,sc8280xp-qmp-usb3-uni-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
19 - qcom,ipq6018-qmp-usb3-phy
20 - qcom,ipq8074-qmp-usb3-phy
21 - qcom,ipq9574-qmp-usb3-phy
22 - qcom,msm8996-qmp-usb3-phy
23 - qcom,msm8998-qmp-usb3-phy
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Dqcom,snps-eusb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,snps-eusb2-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Abel Vesa <abel.vesa@linaro.org>
18 - items:
19 - enum:
20 - qcom,sdx75-snps-eusb2-phy
21 - qcom,sm8650-snps-eusb2-phy
22 - qcom,x1e80100-snps-eusb2-phy
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/linux-6.8/Documentation/devicetree/bindings/usb/
Dqcom,dwc3.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wesley Cheng <quic_wcheng@quicinc.com>
15 - enum:
16 - qcom,ipq4019-dwc3
17 - qcom,ipq5018-dwc3
18 - qcom,ipq5332-dwc3
19 - qcom,ipq6018-dwc3
20 - qcom,ipq8064-dwc3
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/linux-6.8/Documentation/devicetree/bindings/firmware/
Dqcom,scm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Bjorn Andersson <bjorn.andersson@linaro.org>
17 - Robert Marko <robimarko@gmail.com>
18 - Guru Das Srinagesh <quic_gurus@quicinc.com>
23 - enum:
24 - qcom,scm-apq8064
25 - qcom,scm-apq8084
26 - qcom,scm-ipq4019
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/linux-6.8/drivers/clk/qcom/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o
4 clk-qcom-y += common.o
5 clk-qcom-y += clk-regmap.o
6 clk-qcom-y += clk-alpha-pll.o
7 clk-qcom-y += clk-pll.o
8 clk-qcom-y += clk-rcg.o
9 clk-qcom-y += clk-rcg2.o
10 clk-qcom-y += clk-branch.o
11 clk-qcom-y += clk-regmap-divider.o
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Dgcc-sdx75.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved.
6 #include <linux/clk-provider.h>
12 #include <dt-bindings/clock/qcom,sdx75-gcc.h>
14 #include "clk-alpha-pll.h"
15 #include "clk-branch.h"
16 #include "clk-rcg.h"
17 #include "clk-regmap.h"
18 #include "clk-regmap-divider.h"
19 #include "clk-regmap-mux.h"
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
765 tristate "SDX75 Global Clock Controller"
768 Support for the global clock controller on SDX75 devices.
1145 tristate "High-Frequency PLL (HFPLL) Clock Controller"
1147 Support for the high-frequency PLLs present on Qualcomm devices.
1154 Support for the Krait ACC and GCC clock controllers. Say Y
/linux-6.8/Documentation/devicetree/bindings/cpufreq/
Dcpufreq-qcom-hw.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/cpufreq/cpufreq-qcom-hw.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
21 - description: v1 of CPUFREQ HW
23 - enum:
24 - qcom,qcm2290-cpufreq-hw
25 - qcom,sc7180-cpufreq-hw
26 - qcom,sdm670-cpufreq-hw
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/linux-6.8/drivers/phy/qualcomm/
Dphy-qcom-qmp-usb.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
22 #include "phy-qcom-qmp.h"
23 #include "phy-qcom-qmp-pcs-misc-v3.h"
24 #include "phy-qcom-qmp-pcs-misc-v4.h"
25 #include "phy-qcom-qmp-pcs-usb-v4.h"
26 #include "phy-qcom-qmp-pcs-usb-v5.h"
27 #include "phy-qcom-qmp-pcs-usb-v6.h"
28 #include "phy-qcom-qmp-pcs-usb-v7.h"
91 /* set of registers with offsets different per-PHY */
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