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/linux/arch/arm/boot/dts/st/
H A Dste-dbx5x0-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include "ste-nomadik-pinctrl.dtsi"
17 pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
21 pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */
28 pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
32 pins = "GPIO1_AJ3"; /* RTS */
36 pins = "GPIO3_AH3"; /* TXD */
49 pins = "GPIO4_AH6"; /* RXD */
53 pins = "GPIO5_AG6"; /* TXD */
60 pins = "GPIO4_AH6"; /* RXD */
[all …]
/linux/arch/riscv/boot/dts/starfive/
H A Djh7100-common.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/pinctrl-starfive-jh7100.h>
21 stdout-path = "serial0:115200n8";
25 timebase-frequency = <6250000>;
34 compatible = "gpio-leds";
36 led-ack {
40 linux,default-trigger = "heartbeat";
[all …]
H A Djh7110-common.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include "jh7110-pinfunc.h"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/pinctrl/starfive,jh7110-pinctrl.h>
27 stdout-path = "serial0:115200n8";
33 bootph-pre-ram;
36 gpio-restart {
37 compatible = "gpio-restart";
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Dexynos5250-spring.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/clock/samsung,s2mps11.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/input/input.h>
19 chassis-type = "laptop";
33 stdout-path = "serial3:115200n8";
36 gpio-keys {
37 compatible = "gpio-keys";
[all …]
H A Ds5pv210-aries.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
32 reserved-memory {
33 #address-cells = <1>;
34 #size-cells = <1>;
38 compatible = "shared-dma-pool";
39 no-map;
44 compatible = "shared-dma-pool";
[all …]
H A Dexynos5250-snow-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/maxim,max77686.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/sound/samsung-i2s.h>
30 stdout-path = "serial3:115200n8";
33 gpio-keys {
34 compatible = "gpio-keys";
35 pinctrl-names = "default";
[all …]
H A Dexynos4210-i9100.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4210 based Galaxy S2 (GT-I9100 version) device tree
11 /dts-v1/;
13 #include "exynos4412-ppmu-common.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/linux-event-codes.h>
19 model = "Samsung Galaxy S2 (GT-I9100)";
21 chassis-type = "handset";
35 stdout-path = "serial2:115200n8";
38 vemmc_reg: regulator-0 {
[all …]
/linux/drivers/staging/sm750fb/
H A Dddk750_swi2c.c1 // SPDX-License-Identifier: GPL-2.0
5 * swi2c.c --- SM750/SM718 DDK
19 * a point in time where the SCL or SDA may be changed.
22 * +-------------+-------------+-------------+-------------+
29 * the SDA may only be changed in section 2. and section 4. The table
37 * ---------------+---+---+---+---+
38 * Tx Start SDA | | H | | L |
40 * ---------------+---+---+---+---+
41 * Tx Stop SDA | | L | | H |
43 * ---------------+---+---+---+---+
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-nitrogen-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 compatible = "boundary,imx8mp-nitrogen-som", "fsl,imx8mp";
13 rfkill-bt {
14 compatible = "rfkill-gpio";
15 label = "rfkill-bluetooth";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_rfkill_bt>;
18 radio-type = "bluetooth";
19 shutdown-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
22 rfkill-wlan {
[all …]
H A Dimx8mp-phycore-fpsc.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
6 #include <dt-bindings/net/ti-dp83867.h>
10 compatible = "phytec,imx8mp-phycore-fpsc", "fsl,imx8mp";
11 model = "PHYTEC phyCORE-i.MX8MP FPSC";
23 reg_usdhc2_vmmc: regulator-usdhc2 {
24 compatible = "regulator-fixed";
25 off-on-delay-us = <12000>;
26 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
27 pinctrl-names = "default";
28 regulator-max-microvolt = <3300000>;
[all …]
H A Dimx8mm-innocomm-wb15.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 reg_modem: regulator-modem {
11 compatible = "regulator-fixed";
12 pinctrl-names = "default";
13 pinctrl-0 = <&pinctrl_modem_regulator>;
14 regulator-min-microvolt = <3300000>;
15 regulator-max-microvolt = <3300000>;
16 regulator-name = "epdev_on";
18 enable-active-high;
[all …]
H A Dimx8mm-phygate-tauri-l.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/input/linux-event-codes.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/phy/phy-imx8-pcie.h>
11 #include "imx8mm-phycore-som.dtsi"
14 model = "PHYTEC phyGATE-Tauri-L-iMX8MM";
15 compatible = "phytec,imx8mm-phygate-tauri-l",
16 "phytec,imx8mm-phycore-som", "fsl,imx8mm";
19 stdout-path = &uart3;
[all …]
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dcirrus,lochnagar.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
15 Logic devices on mini-cards, as well as allowing connection of various
26 [2] Pinctrl: ../pinctrl/pinctrl-bindings.txt
29 [3] include/dt-bindings/pinctrl/lochnagar.h
37 - cirrus,lochnagar-pinctrl
39 gpio-controller: true
41 '#gpio-cells':
[all …]
H A Dmarvell,armada-39x-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6920-pinctrl", "marvell,88f6925-pinctrl" or
8 "marvell,88f6928-pinctrl" depending on the specific variant of the
10 - reg: register specifier of MPP registers
12 Available mpp pins/groups and functions:
16 name pins functions
21 mpp3 3 gpio, i2c0(sda)
34 mpp16 16 gpio, dram(deccerr), spi0(miso), pcie0(clkreq), i2c1(sda)
37 mpp19 19 gpio, sata1(prsnt) [1], ua0(cts), ua1(rxd), i2c2(sda)
46 mpp27 27 gpio, spi0(cs3), i2c1(sda), sd0(d7), dev(cs2), ge(txclkout)
[all …]
H A Dmarvell,kirkwood-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6180-pinctrl",
8 "marvell,88f6190-pinctrl", "marvell,88f6192-pinctrl",
9 "marvell,88f6281-pinctrl", "marvell,88f6282-pinctrl",
10 "marvell,98dx4122-pinctrl", "marvell,98dx1135-pinctrl"
11 - reg: register specifier of MPP registers
14 It also support the 88f6281-based variant in the 98dx412x Bobcat SoCs.
16 Available mpp pins/groups and functions:
22 name pins functions
32 mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), ptp(clk),
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8916-samsung-j3ltetw.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 /dts-v1/;
5 #include "msm8916-samsung-j3-common.dtsi"
8 model = "Samsung Galaxy J3 (2016) (SM-J320YZ)";
10 chassis-type = "handset";
14 sda-gpios = <&tlmm 0 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
15 scl-gpios = <&tlmm 1 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
20 sda-gpios = <&tlmm 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
21 scl-gpios = <&tlmm 7 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
25 pins = "gpio0", "gpio1";
[all …]
H A Dsm8750.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm8750-gcc.h>
8 #include <dt-bindings/clock/qcom,sm8750-tcsr.h>
9 #include <dt-bindings/dma/qcom-gpi.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interconnect/qcom,icc.h>
12 #include <dt-bindings/interconnect/qcom,sm8750-rpmh.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/mailbox/qcom-ipcc.h>
[all …]
H A Dmsm8939-samsung-a7.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 /dts-v1/;
5 #include "msm8939-pm8916.dtsi"
6 #include "msm8916-modem-qdsp6.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/sound/apq8016-lpass.h>
16 chassis-type = "handset";
25 stdout-path = "serial0";
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-kontron-samx6i.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/sound/fsl-imx-audmux.h>
14 reg_1p0v_s0: regulator-1p0v-s0 {
15 compatible = "regulator-fixed";
16 regulator-name = "V_1V0_S0";
17 regulator-min-microvolt = <1000000>;
18 regulator-max-microvolt = <1000000>;
19 regulator-always-on;
20 regulator-boot-on;
[all …]
H A Dimx6ull-phytec-tauri.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "imx6ull-phytec-phycore-som.dtsi"
17 gpio_keys: gpio-keys {
18 compatible = "gpio-key";
19 pinctrl-names = "default";
20 pinctrl-0 = <&pinctrl_gpio_keys>;
23 label = "KEY-A";
26 wakeup-source;
30 reg_adc1_vref_3v3: regulator-vref-3v3 {
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood-km_common.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 stdout-path = &uart0;
9 pinctrl: pin-controller@10000 {
10 pinctrl-0 = < &pmx_i2c_gpio_sda &pmx_i2c_gpio_scl >;
11 pinctrl-names = "default";
13 pmx_i2c_gpio_sda: pmx-gpio-sda {
14 marvell,pins = "mpp8";
17 pmx_i2c_gpio_scl: pmx-gpio-scl {
18 marvell,pins = "mpp9";
29 compatible = "i2c-gpio";
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dlan966x-kontron-kswitch-d10-mmt-6g-2gs.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for the Kontron KSwitch D10 MMT 6G-2GS
6 /dts-v1/;
7 #include "lan966x-kontron-kswitch-d10-mmt.dtsi"
10 model = "Kontron KSwitch D10 MMT 6G-2GS";
11 compatible = "kontron,kswitch-d10-mmt-6g-2gs", "kontron,s1921",
21 i2c-bus = <&i2c4>;
22 los-gpios = <&sgpio_in 1 0 GPIO_ACTIVE_HIGH>;
23 mod-def0-gpios = <&sgpio_in 1 1 GPIO_ACTIVE_LOW>;
24 maximum-power-milliwatt = <2500>;
[all …]
H A Dlan966x-pcb8309.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * lan966x_pcb8309.dts - Device Tree file for PCB8309
5 /dts-v1/;
7 #include "dt-bindings/phy/phy-lan966x-serdes.h"
10 model = "Microchip EVB - LAN9662";
11 compatible = "microchip,lan9662-pcb8309", "microchip,lan9662", "microchip,lan966";
20 stdout-path = "serial0:115200n8";
23 gpio-restart {
24 compatible = "gpio-restart";
29 i2c-mux {
[all …]
/linux/Documentation/i2c/muxes/
H A Di2c-mux-gpio.rst2 Kernel driver i2c-mux-gpio
8 -----------
10 i2c-mux-gpio is an i2c mux driver providing access to I2C bus segments
11 from a master I2C bus and a hardware MUX controlled through GPIO pins.
15 ---------- ---------- Bus segment 1 - - - - -
16 | | SCL/SDA | |-------------- | |
17 | |------------| |
19 | Linux | GPIO 1..N | MUX |--------------- Devices
20 | |------------| | | |
22 | | | |---------------| |
[all …]

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