Searched +full:sar2130p +full:- +full:gpucc (Results 1 – 4 of 4) sorted by relevance
| /linux-6.15/Documentation/devicetree/bindings/clock/ |
| D | qcom,sm8450-gpucc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sm8450-gpucc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Konrad Dybcio <konradybcio@kernel.org>
17 include/dt-bindings/clock/qcom,sar2130p-gpucc.h
18 include/dt-bindings/clock/qcom,sm4450-gpucc.h
19 include/dt-bindings/clock/qcom,sm8450-gpucc.h
20 include/dt-bindings/clock/qcom,sm8550-gpucc.h
21 include/dt-bindings/reset/qcom,sm8450-gpucc.h
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| /linux-6.15/drivers/clk/qcom/ |
| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o
4 clk-qcom-y += common.o
5 clk-qcom-y += clk-regmap.o
6 clk-qcom-y += clk-alpha-pll.o
7 clk-qcom-y += clk-pll.o
8 clk-qcom-y += clk-rcg.o
9 clk-qcom-y += clk-rcg2.o
10 clk-qcom-y += clk-branch.o
11 clk-qcom-y += clk-regmap-divider.o
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| D | gpucc-sar2130p.c | 1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/qcom,sar2130p-gpucc.h>
15 #include <dt-bindings/reset/qcom,sar2130p-gpucc.h>
17 #include "clk-alpha-pll.h"
18 #include "clk-branch.h"
19 #include "clk-rcg.h"
470 { .compatible = "qcom,sar2130p-gpucc" },
477 struct device *dev = &pdev->dev; in gpu_cc_sar2130p_probe()
487 /* Keep some clocks always-on */ in gpu_cc_sar2130p_probe()
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| /linux-6.15/arch/arm64/boot/dts/qcom/ |
| D | sar2130p.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sar2130p-gcc.h>
8 #include <dt-bindings/clock/qcom,sar2130p-gpucc.h>
9 #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
10 #include <dt-bindings/dma/qcom-gpi.h>
11 #include <dt-bindings/interconnect/qcom,icc.h>
12 #include <dt-bindings/interconnect/qcom,sar2130p-rpmh.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/mailbox/qcom-ipcc.h>
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