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/qemu/target/arm/tcg/
H A Dsme_helper.c53 * so each row is discontiguous within ZA[]. in helper_sme_zero()
68 * are interleaved, so if type T is size N bytes then row 1 of
69 * the tile is N rows away from row 0. The division by N to
83 * each row of the ZA storage has one byte of the vslice data,
84 * and (counting from 0) byte 8 goes in row 8 of the storage
85 * at offset (8 * row-size-in-bytes).
86 * If we have 8 bytes per element then each row of the ZA storage
88 * so byte 8 of the data goes into row 1 of the tile,
89 * which is again row 8 of the storage, so the offset is still
90 * (8 * row-size-in-bytes). Similarly for other element sizes.
[all …]
H A Dtranslate-sme.c82 * (index % (svl / size)) * (size * sizeof(row)) in get_tile_rowcol()
83 * = (index % (svl >> esz)) << (esz + log2(sizeof(row))) in get_tile_rowcol()
88 /* Row slices are always aligned and need no endian adjustment. */ in get_tile_rowcol()
91 /* The tile byte offset within env->zarray is the row. */ in get_tile_rowcol()
/qemu/hw/display/
H A Ddm163.c27 /* Number of frames a row stays visible after being turned off. */
134 for (unsigned row = 0; row < RGB_MATRIX_NUM_ROWS; row++) { in dm163_propagate_outputs() local
135 if (s->activated_rows & (1 << row)) { in dm163_propagate_outputs()
136 s->buffer_idx_of_row[row] = s->last_buffer_idx; in dm163_propagate_outputs()
137 s->redraw |= (1 << row); in dm163_propagate_outputs()
255 static void update_row_persistence_delay(DM163State *s, unsigned row) in update_row_persistence_delay() argument
257 if (s->row_persistence_delay[row]) { in update_row_persistence_delay()
258 s->row_persistence_delay[row]--; in update_row_persistence_delay()
262 * the row is turned off. in update_row_persistence_delay()
264 s->buffer_idx_of_row[row] = TURNED_OFF_ROW; in update_row_persistence_delay()
[all …]
H A Dssd0323.c58 int32_t row; member
81 s->framebuffer[s->col + s->row * 64] = data; in OBJECT_DECLARE_SIMPLE_TYPE()
83 s->row++; in OBJECT_DECLARE_SIMPLE_TYPE()
84 if (s->row > s->row_end) { in OBJECT_DECLARE_SIMPLE_TYPE()
85 s->row = s->row_start; in OBJECT_DECLARE_SIMPLE_TYPE()
94 s->row++; in OBJECT_DECLARE_SIMPLE_TYPE()
97 if (s->row > s->row_end) { in OBJECT_DECLARE_SIMPLE_TYPE()
98 s->row = s->row_start; in OBJECT_DECLARE_SIMPLE_TYPE()
118 case 0x75: /* Set row. */ in OBJECT_DECLARE_SIMPLE_TYPE()
120 s->row = s->row_start = s->cmd_data[0] % 80; in OBJECT_DECLARE_SIMPLE_TYPE()
[all …]
H A Dframebuffer.h44 * @fn: Drawing function to be called for each row that has to be drawn.
46 * @first_row: Pointer to an integer, receives the number of the first row
47 * that was drawn (either the first dirty row, or 0 if @invalidate is true).
48 * @last_row: Pointer to an integer, receives the number of the last row that
49 * was drawn (either the last dirty row, or @rows-1 if @invalidate is true).
H A Dssd0303.c56 int row; member
93 s->framebuffer[s->col + s->row * 132] = data; in ssd0303_send()
149 s->row = data & 7; in ssd0303_send()
285 VMSTATE_INT32(row, ssd0303_state),
/qemu/scripts/simplebench/
H A Dresults_to_text.py24 # We want leading whitespace for difference row cells (see below)
77 row = [case['id']]
81 row.append(result_to_text(res))
82 tab.append(row)
84 # Add row of difference between columns. For each column starting from
86 row = ['', ''] # case name and first column
94 row.append(cell)
111 row.append(cell)
112 tab.append(row)
H A Dtable_templater.py47 def gen(self, column, row): argument
59 result.append(row[j])
H A Dbench-example.py41 # the row, other fields are handled by bench_func.
/qemu/pc-bios/keymaps/
H A Dsv23 # Top row
38 # QWERTY first row
54 # QWERTY second row
68 # QWERTY third row
179 # Top row
224 # QWERTY first row
234 # QWERTY second row
244 # QWERTY third row
H A Dsl23 # Top row
38 # QWERTY first row
54 # QWERTY second row
68 # QWERTY third row
/qemu/hw/nvram/
H A Dbcm2835_otp.c20 uint32_t bcm2835_otp_get_row(BCM2835OTPState *s, unsigned int row) in bcm2835_otp_get_row() argument
22 assert(row <= BCM2835_OTP_ROW_COUNT && row >= 1); in bcm2835_otp_get_row()
24 return s->otp_rows[row - 1]; in bcm2835_otp_get_row()
27 void bcm2835_otp_set_row(BCM2835OTPState *s, unsigned int row, in bcm2835_otp_set_row() argument
30 assert(row <= BCM2835_OTP_ROW_COUNT && row >= 1); in bcm2835_otp_set_row()
33 s->otp_rows[row - 1] |= value; in bcm2835_otp_set_row()
H A Dxlnx-versal-efuse-ctrl.c58 FIELD(EFUSE_PGM_ADDR, ROW, 5, 8)
62 FIELD(EFUSE_RD_ADDR, ROW, 5, 8)
223 uint16_t row; member
280 uint32_t row = 0, bit; in efuse_anchor_bits_check() local
282 row = FIELD_DP32(row, EFUSE_PGM_ADDR, PAGE, page); in efuse_anchor_bits_check()
283 row = FIELD_DP32(row, EFUSE_PGM_ADDR, ROW, EFUSE_ANCHOR_ROW); in efuse_anchor_bits_check()
285 bit = FIELD_DP32(row, EFUSE_PGM_ADDR, COLUMN, EFUSE_ANCHOR_3_COL); in efuse_anchor_bits_check()
290 bit = FIELD_DP32(row, EFUSE_PGM_ADDR, COLUMN, EFUSE_ANCHOR_1_COL); in efuse_anchor_bits_check()
325 uint16_t r1 = ((const XlnxEFuseLkSpec *)a)->row; in efuse_lk_spec_cmp()
326 uint16_t r2 = ((const XlnxEFuseLkSpec *)b)->row; in efuse_lk_spec_cmp()
[all …]
H A Dxlnx-efuse.c86 /* Convert from little-endian backstore for each 32-bit row */ in efuse_bdrv_read()
146 uint32_t set, *row; in xlnx_efuse_set_bit() local
158 row = &s->fuse32[bit / 32]; in xlnx_efuse_set_bit()
160 if (!(set & *row)) { in xlnx_efuse_set_bit()
161 *row |= set; in xlnx_efuse_set_bit()
H A Dxlnx-zynqmp-efuse.c57 FIELD(EFUSE_PGM_ADDR, ROW, 5, 6)
61 FIELD(EFUSE_RD_ADDR, ROW, 5, 6)
196 #define BIT_POS(ROW, COLUMN) (ROW * 32 + COLUMN) argument
515 uint32_t efuse_row = FIELD_EX32(efuse_idx, EFUSE_RD_ADDR, ROW); in zynqmp_efuse_rd_addr_postw()
546 "%s: Denied efuse read from array %u, row %u\n", in zynqmp_efuse_rd_addr_postw()
/qemu/include/hw/nvram/
H A Dbcm2835_otp.h33 /* -- Row 32: Undocumented -- */
40 /* -- Row 36-43: Customer OTP -- */
49 /* -- Row 56-63: Device-specific private key -- */
65 uint32_t bcm2835_otp_get_row(BCM2835OTPState *s, unsigned int row);
66 void bcm2835_otp_set_row(BCM2835OTPState *s, unsigned int row, uint32_t value);
H A Dxlnx-versal-efuse.h62 * @bit: the bit-address within the 32-bit row to be read
63 * @denied: if non-NULL, to receive true if the row is write-only
/qemu/hw/misc/
H A Dallwinner-h3-dramc.c60 * This function simulates row addressing behavior when bootloader in allwinner_h3_dramc_map_rows()
62 * the controller is configured with the widest row addressing available. in allwinner_h3_dramc_map_rows()
63 * Then a pattern is written to RAM at an offset on the row boundary size. in allwinner_h3_dramc_map_rows()
65 * start of RAM, the bootloader knows the amount of row bits. in allwinner_h3_dramc_map_rows()
67 * This function inserts a mirrored memory region when the configured row in allwinner_h3_dramc_map_rows()
73 /* Calculate the actual row bits using the ram_size property */ in allwinner_h3_dramc_map_rows()
82 /* When row bits is the expected value, remove the mirror */ in allwinner_h3_dramc_map_rows()
87 /* Row bits not matching ram_size, install the rows mirror */ in allwinner_h3_dramc_map_rows()
277 /* Setup row mirror mappings */ in allwinner_h3_dramc_realize()
279 "allwinner-h3-dramc.row-mirror", in allwinner_h3_dramc_realize()
[all …]
/qemu/include/hw/display/
H A Ddm163.h24 /* The last row is filled with 0 (turned off row) */
51 /* The last row is filled with 0 (turned off row) */
/qemu/ui/
H A Dvnc-enc-hextile-template.h19 uint8_t *row = vnc_server_fb_ptr(vd, x, y); in CONCAT() local
20 pixel_t *irow = (pixel_t *)row; in CONCAT()
94 irow = (pixel_t *)row; in CONCAT()
120 irow = (pixel_t *)row; in CONCAT()
207 vs->write_pixels(vs, row, w * 4); in CONCAT()
208 row += vnc_server_fb_stride(vd); in CONCAT()
/qemu/hw/i2c/
H A Dsmbus_eeprom.c258 spd[3] = 13; /* row address bits */ in spd_data_generate()
282 spd[27] = 20; /* min. row precharge time */ in spd_data_generate()
283 spd[28] = 15; /* min. row active row delay */ in spd_data_generate()
/qemu/tests/tcg/i386/
H A Dtest-mmx.py227 for row in csv.reader(strip_comments(csvfile)):
228 insn = row[0].replace(',', '').split()
231 cpuid = row[6]
H A Dtest-avx.py359 for row in csv.reader(strip_comments(csvfile)):
360 insn = row[0].replace(',', '').split()
363 cpuid = row[6]
/qemu/tests/unit/
H A Dtest-util-sockets.c243 abstract_socket_matrix_row *row = user_data; in unix_client_thread_func() local
248 if (row->expect_connect[i]) { in unix_client_thread_func()
249 fd = socket_connect(row->client[i], &error_abort); in unix_client_thread_func()
252 fd = socket_connect(row->client[i], &err); in unix_client_thread_func()
/qemu/hw/mem/
H A Dcxl_type3_stubs.c34 bool has_row, uint32_t row, in qmp_cxl_inject_dram_event() argument

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