Searched +full:riscv +full:- +full:zacas (Results 1 – 4 of 4) sorted by relevance
/linux-6.8/Documentation/devicetree/bindings/riscv/ |
D | extensions.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 --- 4 $id: http://devicetree.org/schemas/riscv/extensions.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: RISC-V ISA extensions 10 - Paul Walmsley <paul.walmsley@sifive.com> 11 - Palmer Dabbelt <palmer@sifive.com> 12 - Conor Dooley <conor@kernel.org> 15 RISC-V has a large number of extensions, some of which are "standard" 16 extensions, meaning they are ratified by RISC-V International, and others [all …]
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/linux-6.8/Documentation/arch/riscv/ |
D | hwprobe.rst | 1 .. SPDX-License-Identifier: GPL-2.0 3 RISC-V Hardware Probing Interface 4 --------------------------------- 6 The RISC-V hardware probing interface is based around a single syscall, which 18 The arguments are split into three groups: an array of key-value pairs, a CPU 19 set, and some flags. The key-value pairs are supplied with a count. Userspace 22 will be cleared to -1, and its value set to 0. The CPU set is defined by 23 CPU_SET(3) with size ``cpusetsize`` bytes. For value-like keys (eg. vendor, 25 have the same value. Otherwise -1 will be returned. For boolean-like keys, the 33 by sys_riscv_hwprobe() to only those which match each of the key-value pairs. [all …]
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/linux-6.8/arch/riscv/kernel/ |
D | sys_hwprobe.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * are supported by the hardware. See Documentation/arch/riscv/hwprobe.rst for 22 u64 id = -1ULL; in hwprobe_arch_id() 29 switch (pair->key) { in hwprobe_arch_id() 47 * If there's a mismatch for the given set, return -1 in the in hwprobe_arch_id() 51 id = -1ULL; in hwprobe_arch_id() 56 pair->value = id; in hwprobe_arch_id() 65 pair->value = 0; in hwprobe_isa_ext0() 67 pair->value |= RISCV_HWPROBE_IMA_FD; in hwprobe_isa_ext0() 70 pair->value |= RISCV_HWPROBE_IMA_C; in hwprobe_isa_ext0() [all …]
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D | cpufeature.c | 1 // SPDX-License-Identifier: GPL-2.0-only 30 #include "copy-unaligned.h" 32 #define NUM_ALPHA_EXTS ('z' - 'a' + 1) 37 #define MISALIGNED_COPY_SIZE ((MISALIGNED_BUFFER_SIZE / 2) - 0x80) 44 /* Per-cpu ISA extensions. */ 53 * riscv_isa_extension_base() - Get base extension word 69 * __riscv_isa_extension_available() - Check whether given extension 94 pr_err("Zicbom detected in ISA string, disabling as no cbom-block-size found\n"); in riscv_isa_extension_check() 97 pr_err("Zicbom disabled as cbom-block-size present, but is not a power-of-2\n"); in riscv_isa_extension_check() 103 pr_err("Zicboz detected in ISA string, disabling as no cboz-block-size found\n"); in riscv_isa_extension_check() [all …]
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