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/linux-5.10/Documentation/devicetree/bindings/net/
Dsmsc911x.txt1 * Smart Mixed-Signal Connectivity (SMSC) LAN911x/912x Controller
4 - compatible : Should be "smsc,lan<model>", "smsc,lan9115"
5 - reg : Address and length of the io space for SMSC LAN
6 - interrupts : one or two interrupt specifiers
7 - The first interrupt is the SMSC LAN interrupt line
8 - The second interrupt (if present) is the PME (power
9 management event) interrupt that is able to wake up the host
10 system with a 50ms pulse on network activity
11 - phy-mode : See ethernet.txt file in the same directory
14 - reg-shift : Specify the quantity to shift the register offsets by
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/linux-5.10/drivers/phy/motorola/
Dphy-mapphone-mdm6600.c1 // SPDX-License-Identifier: GPL-2.0
3 * Motorola Mapphone MDM6600 modem GPIO controlled USB PHY driver
18 #include <linux/phy/phy.h>
21 #define PHY_MDM6600_PHY_DELAY_MS 4000 /* PHY enable 2.2s to 3.5s */
23 #define PHY_MDM6600_WAKE_KICK_MS 600 /* time on after GPIO toggle */
28 PHY_MDM6600_ENABLE, /* USB PHY enable */
30 PHY_MDM6600_RESET, /* Device reset */
35 PHY_MDM6600_MODE0, /* out USB mode0 and OOB wake */
36 PHY_MDM6600_MODE1, /* out USB mode1, in OOB wake */
55 * MDM6600 command codes. These are based on Motorola Mapphone Linux
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/linux-5.10/Documentation/devicetree/bindings/usb/
Ddwc2.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
15 - const: brcm,bcm2835-usb
16 - const: hisilicon,hi6220-usb
17 - items:
18 - const: rockchip,rk3066-usb
19 - const: snps,dwc2
20 - items:
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Dam33xx-usb.txt3 - compatible: ti,am33xx-usb
4 - reg: offset and length of the usbss register sets
5 - ti,hwmods : must be "usb_otg_hs"
8 at least a control module node, USB node and a PHY node. The second USB
9 node and its PHY node are optional. The DMA node is also optional.
11 Reset module
13 - compatible: ti,am335x-usb-ctrl-module
14 - reg: offset and length of the "USB control registers" in the "Control
15 Module" block. A second offset and length for the USB wake up control
17 - reg-names: "phy_ctrl" for the "USB control registers" and "wakeup" for
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/linux-5.10/drivers/char/tpm/
Dtpm_tis_spi_cr50.c1 // SPDX-License-Identifier: GPL-2.0
7 * It is based on tpm_tis_spi driver by Peter Huewe and Christophe Ricard.
23 * - can go to sleep not earlier than after CR50_SLEEP_DELAY_MSEC.
24 * - needs up to CR50_WAKE_START_DELAY_USEC to wake after sleep.
25 * - requires waiting for "ready" IRQ, if supported; or waiting for at least
27 * - waits for up to CR50_FLOW_CONTROL for flow control 'ready' indication.
52 static inline struct cr50_spi_phy *to_cr50_spi_phy(struct tpm_tis_spi_phy *phy) in to_cr50_spi_phy() argument
54 return container_of(phy, struct cr50_spi_phy, spi_phy); in to_cr50_spi_phy()
66 cr50_phy->irq_confirmed = true; in cr50_spi_irq_handler()
67 complete(&cr50_phy->spi_phy.ready); in cr50_spi_irq_handler()
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/linux-5.10/drivers/net/ethernet/intel/igc/
Digc_defines.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 /* Wake Up Control */
17 /* Wake Up Filter Control */
26 /* Wake Up Status */
33 /* Packet types that are enabled for wake packet delivery */
41 /* Wake Up Packet Length */
44 /* Wake Up Packet Memory stores the first 128 bytes of the wake up packet */
47 /* Loop limit on how long we wait for auto-negotiation to complete */
89 #define IGC_CTRL_DEV_RST 0x20000000 /* Device reset */
91 #define IGC_CTRL_PHY_RST 0x80000000 /* PHY Reset */
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Digc_base.c1 // SPDX-License-Identifier: GPL-2.0
13 * igc_reset_hw_base - Reset hardware
24 /* Prevent the PCI-E bus from sticking if there is no TLP connection in igc_reset_hw_base()
25 * on the last TLP read/write transaction when MAC is reset. in igc_reset_hw_base()
29 hw_dbg("PCI-E Master disable polling has failed\n"); in igc_reset_hw_base()
42 hw_dbg("Issuing a global reset to MAC\n"); in igc_reset_hw_base()
62 * igc_init_nvm_params_base - Init NVM func ptrs.
67 struct igc_nvm_info *nvm = &hw->nvm; in igc_init_nvm_params_base()
74 /* Added to a constant, "size" becomes the left-shift value in igc_init_nvm_params_base()
85 nvm->type = igc_nvm_eeprom_spi; in igc_init_nvm_params_base()
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/linux-5.10/arch/arm/boot/dts/
Drk3288-veyron-fievel.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron.dtsi"
10 #include "rk3288-veyron-analog-audio.dtsi"
14 compatible = "google,veyron-fievel-rev8", "google,veyron-fievel-rev7",
15 "google,veyron-fievel-rev6", "google,veyron-fievel-rev5",
16 "google,veyron-fievel-rev4", "google,veyron-fievel-rev3",
17 "google,veyron-fievel-rev2", "google,veyron-fievel-rev1",
18 "google,veyron-fievel-rev0", "google,veyron-fievel",
22 compatible = "regulator-fixed";
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Drk3288-veyron.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
14 stdout-path = "serial2:115200n8";
18 * The default coreboot on veyron devices ignores memory@0 nodes
27 power_button: power-button {
28 compatible = "gpio-keys";
29 pinctrl-names = "default";
30 pinctrl-0 = <&pwr_key_l>;
36 debounce-interval = <100>;
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Dsun6i-a31s-sinovoip-bpi-m2.dts4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
44 #include "sun6i-a31s.dtsi"
45 #include <dt-bindings/gpio/gpio.h>
48 model = "Sinovoip BPI-M2";
49 compatible = "sinovoip,bpi-m2", "allwinner,sun6i-a31s";
56 stdout-path = "serial0:115200n8";
60 compatible = "gpio-leds";
63 label = "bpi-m2:blue:usr";
68 label = "bpi-m2:green:usr";
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/linux-5.10/drivers/net/usb/
Dsmsc95xx.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 2007-2008 SMSC
38 /* SCSRs - System Control and Status Registers */
52 #define INT_STS_MAC_RTO_ (0x00040000) /* MAC Reset Time Out */
55 #define INT_STS_PHY_INT_ (0x00008000) /* PHY Interrupt */
83 #define HW_CFG_LRST_ (0x00000008) /* Soft Lite Reset */
84 #define HW_CFG_PSEL_ (0x00000004) /* External PHY Select */
86 #define HW_CFG_SRST_ (0x00000001) /* Soft Reset */
106 #define PM_CTL_PHY_RST_ (0x00000010) /* PHY Reset */
107 #define PM_CTL_WOL_EN_ (0x00000008) /* Wake On Lan Enable */
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/linux-5.10/drivers/usb/dwc2/
Dplatform.c1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * platform.c - DesignWare HS OTG Controller platform driver
16 * 3. The names of the above-listed copyright holders may not be used
32 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
43 #include <linux/dma-mapping.h>
47 #include <linux/phy/phy.h>
48 #include <linux/platform_data/s3c-hsotg.h>
49 #include <linux/reset.h>
69 * ------------------------------
71 * HST DEV any : ---
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/linux-5.10/drivers/net/ethernet/oki-semi/pch_gbe/
Dpch_gbe.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 1999 - 2010 Intel Corporation.
26 * pch_gbe_regs_mac_adr - Structure holding values of mac address registers
35 * pch_udc_regs - Structure holding values of MAC registers
41 u32 RESET; member
105 #define PCH_GBE_INT_PHY_INT 0x00100000 /* Interruption from PHY */
106 #define PCH_GBE_INT_WOL_DET 0x01000000 /* Wake On LAN Event detection. */
116 /* Reset */
117 #define PCH_GBE_ALL_RST 0x80000000 /* All reset */
118 #define PCH_GBE_TX_RST 0x00008000 /* TX MAC, TX FIFO, TX DMA reset */
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/linux-5.10/drivers/net/ethernet/intel/igb/
De1000_defines.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
12 /* Wake Up Control */
15 /* Wake Up Filter Control */
22 /* Wake Up Status */
29 /* Packet types that are enabled for wake packet delivery */
37 /* Wake Up Packet Length */
40 /* Wake Up Packet Memory stores the first 128 bytes of the wake up packet */
49 /* Physical Func Reset Done Indication */
62 /* Interrupt acknowledge Auto-mask */
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/linux-5.10/arch/arm64/boot/dts/rockchip/
Drk3328-a1.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
2 // Copyright (c) 2017-2019 Arm Ltd.
4 /dts-v1/;
9 compatible = "azw,beelink-a1", "rockchip,rk3328";
15 * /-------
16 * L / o <- Gnd
17 * e / o <-- Rx
18 * f / o <--- Tx
19 * t / o <---- +3.3v
23 stdout-path = "serial2:1500000n8";
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Drk3399-orangepi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "dt-bindings/pwm/pwm.h"
9 #include "dt-bindings/input/input.h"
11 #include "rk3399-opp.dtsi"
15 compatible = "rockchip,rk3399-orangepi", "rockchip,rk3399";
18 stdout-path = "serial2:1500000n8";
21 clkin_gmac: external-gmac-clock {
22 compatible = "fixed-clock";
23 clock-frequency = <125000000>;
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Drk3399-leez-p710.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/pwm/pwm.h>
10 #include "rk3399-opp.dtsi"
17 stdout-path = "serial2:1500000n8";
20 clkin_gmac: external-gmac-clock {
21 compatible = "fixed-clock";
22 clock-frequency = <125000000>;
23 clock-output-names = "clkin_gmac";
[all …]
Drk3399-hugsun-x99.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /dts-v1/;
3 #include <dt-bindings/pwm/pwm.h>
4 #include <dt-bindings/input/input.h>
6 #include "rk3399-opp.dtsi"
13 stdout-path = "serial2:1500000n8";
16 clkin_gmac: external-gmac-clock {
17 compatible = "fixed-clock";
18 clock-frequency = <125000000>;
19 clock-output-names = "clkin_gmac";
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Drk3399-rock-pi-4.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/input/linux-event-codes.h>
9 #include <dt-bindings/pwm/pwm.h>
11 #include "rk3399-opp.dtsi"
15 stdout-path = "serial2:1500000n8";
18 clkin_gmac: external-gmac-clock {
19 compatible = "fixed-clock";
20 clock-frequency = <125000000>;
21 clock-output-names = "clkin_gmac";
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/linux-5.10/arch/arm64/boot/dts/amlogic/
Dmeson-gxbb-nanopi-k2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-gxbb.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
12 compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb";
21 stdout-path = "serial0:115200n8";
30 compatible = "gpio-leds";
32 led-stat {
33 label = "nanopi-k2:blue:stat";
35 default-state = "on";
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/linux-5.10/arch/mips/boot/dts/ingenic/
Dcu1830-neo.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/clock/ingenic,tcu.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "yna,cu1830-neo", "ingenic,x1830";
11 model = "YSH & ATIL General Board CU1830-Neo";
18 stdout-path = "serial1:115200n8";
27 compatible = "gpio-leds";
28 led-0 {
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Dcu1000-neo.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/clock/ingenic,tcu.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "yna,cu1000-neo", "ingenic,x1000e";
11 model = "YSH & ATIL General Board CU1000-Neo";
18 stdout-path = "serial2:115200n8";
27 compatible = "gpio-leds";
28 led-0 {
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/linux-5.10/drivers/net/phy/
Dmicrochip_t1.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/phy.h>
41 #define DRIVER_DESC "Microchip LAN87XX T1 PHY driver"
58 return -EINVAL; in access_ereg()
95 return -EINVAL; in access_ereg_modify_changed()
119 /* Turn on TC10 Ring Oscillator (ROSC) */ in lan87xx_phy_init()
128 /* Enable Auto Wake Forward to Wake_Out, ROSC on, Sleep, in lan87xx_phy_init()
129 * and Wake_In to wake PHY in lan87xx_phy_init()
133 /* Enable WUP Auto Fwd, Enable Wake on MDI, Wakeup Debouncer in lan87xx_phy_init()
150 /* Soft Reset the SMI block */ in lan87xx_phy_init()
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/linux-5.10/Documentation/networking/dsa/
Ddsa.rst22 An Ethernet switch is typically comprised of multiple front-panel ports, and one
23 or more CPU or management port. The DSA subsystem currently relies on the
27 gateways, or even top-of-the rack switches. This host Ethernet controller will
31 with the ability to configure and manage cascaded switches on top of each other
36 For each front-panel port, DSA will create specialized network devices which are
37 used as controlling and data-flowing endpoints for use by the Linux networking
46 - what port is this frame coming from
47 - what was the reason why this frame got forwarded
48 - how to send CPU originated traffic to specific ports
52 on Port-based VLAN IDs).
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/linux-5.10/drivers/net/ethernet/sis/
Dsis900.c9 Drivers based on this skeleton fall under the GPL and must retain
17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
21 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support
25 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
28 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
29 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
30 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
31 …Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kerne…
32 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
34 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support
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