Home
last modified time | relevance | path

Searched full:reg (Results 101 – 125 of 15649) sorted by relevance

12345678910>>...626

/linux/drivers/phy/ingenic/
H A Dphy-ingenic-usb.c103 u32 reg; in ingenic_usb_phy_init() local
115 reg = readl(priv->base + REG_USBPCR_OFFSET); in ingenic_usb_phy_init()
116 writel(reg & ~USBPCR_POR, priv->base + REG_USBPCR_OFFSET); in ingenic_usb_phy_init()
159 u32 reg; in ingenic_usb_phy_set_mode() local
163 reg = readl(priv->base + REG_USBPCR_OFFSET); in ingenic_usb_phy_set_mode()
164 u32p_replace_bits(&reg, 1, USBPCR_USB_MODE); in ingenic_usb_phy_set_mode()
165 u32p_replace_bits(&reg, 0, USBPCR_VBUSVLDEXT); in ingenic_usb_phy_set_mode()
166 u32p_replace_bits(&reg, 0, USBPCR_VBUSVLDEXTSEL); in ingenic_usb_phy_set_mode()
167 u32p_replace_bits(&reg, 0, USBPCR_OTG_DISABLE); in ingenic_usb_phy_set_mode()
168 writel(reg, priv->base + REG_USBPCR_OFFSET); in ingenic_usb_phy_set_mode()
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Dmmp3.dtsi23 reg = <0>;
30 reg = <1>;
45 reg = <0xd4200000 0x00200000>;
52 reg = <0xd4282000 0x1000>,
62 reg = <0x150 0x4>, <0x168 0x4>;
63 reg-names = "mux status", "mux mask";
72 reg = <0x154 0x4>, <0x16c 0x4>;
73 reg-names = "mux status", "mux mask";
82 reg = <0x1bc 0x4>, <0x1a4 0x4>;
83 reg-names = "mux status", "mux mask";
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-lx2160a-bluebox3.dts105 reg = <0x0>;
112 reg = <0x8>;
120 reg = <0x5>;
127 reg = <0x6>;
137 reg = <0x0>;
144 reg = <0x8>;
172 reg = <0>;
183 reg = <1>;
196 reg = <0x77>;
203 reg = <0x2>;
[all …]
/linux/drivers/regulator/
H A Drn5t618-regulator.c25 #define REG(rid, ereg, emask, vreg, vmask, min, max, step) \ macro
45 REG(DCDC1, DC1CTL, BIT(0), DC1DAC, 0xff, 600000, 3500000, 12500),
46 REG(DCDC2, DC2CTL, BIT(0), DC2DAC, 0xff, 600000, 3500000, 12500),
47 REG(DCDC3, DC3CTL, BIT(0), DC3DAC, 0xff, 600000, 3500000, 12500),
48 REG(DCDC4, DC4CTL, BIT(0), DC4DAC, 0xff, 600000, 3500000, 12500),
50 REG(LDO1, LDOEN1, BIT(0), LDO1DAC, 0x7f, 900000, 3500000, 25000),
51 REG(LDO2, LDOEN1, BIT(1), LDO2DAC, 0x7f, 900000, 3500000, 25000),
52 REG(LDO3, LDOEN1, BIT(2), LDO3DAC, 0x7f, 600000, 3500000, 25000),
53 REG(LDO4, LDOEN1, BIT(3), LDO4DAC, 0x7f, 900000, 3500000, 25000),
54 REG(LDO5, LDOEN1, BIT(4), LDO5DAC, 0x7f, 900000, 3500000, 25000),
[all …]
/linux/sound/pci/
H A Dad1889.c68 u16 reg; /* reg setup */ member
97 ad1889_readw(struct snd_ad1889 *chip, unsigned reg) in ad1889_readw() argument
99 return readw(chip->iobase + reg); in ad1889_readw()
103 ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val) in ad1889_writew() argument
105 writew(val, chip->iobase + reg); in ad1889_writew()
109 ad1889_readl(struct snd_ad1889 *chip, unsigned reg) in ad1889_readl() argument
111 return readl(chip->iobase + reg); in ad1889_readl()
115 ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val) in ad1889_writel() argument
117 writel(val, chip->iobase + reg); in ad1889_writel()
184 u16 reg; in ad1889_channel_reset() local
[all …]
/linux/drivers/crypto/intel/qat/qat_common/
H A Dadf_gen6_ras.c50 u32 reg, mask; in enable_ti_ri_error_reporting() local
60 reg = ADF_CSR_RD(csr, ADF_GEN6_TI_CI_PAR_ERR_MASK); in enable_ti_ri_error_reporting()
61 reg &= ~ADF_GEN6_TI_CI_PAR_STS_MASK; in enable_ti_ri_error_reporting()
62 ADF_CSR_WR(csr, ADF_GEN6_TI_CI_PAR_ERR_MASK, reg); in enable_ti_ri_error_reporting()
64 reg = ADF_CSR_RD(csr, ADF_GEN6_TI_PULL0FUB_PAR_ERR_MASK); in enable_ti_ri_error_reporting()
65 reg &= ~ADF_GEN6_TI_PULL0FUB_PAR_STS_MASK; in enable_ti_ri_error_reporting()
66 ADF_CSR_WR(csr, ADF_GEN6_TI_PULL0FUB_PAR_ERR_MASK, reg); in enable_ti_ri_error_reporting()
68 reg = ADF_CSR_RD(csr, ADF_GEN6_TI_PUSHFUB_PAR_ERR_MASK); in enable_ti_ri_error_reporting()
69 reg &= ~ADF_GEN6_TI_PUSHFUB_PAR_STS_MASK; in enable_ti_ri_error_reporting()
70 ADF_CSR_WR(csr, ADF_GEN6_TI_PUSHFUB_PAR_ERR_MASK, reg); in enable_ti_ri_error_reporting()
[all …]
/linux/arch/mips/boot/dts/cavium-octeon/
H A Docteon_3xxx.dts17 marvell,reg-init =
19 <2 0x15 0xffcf 0>, /* Reg 2,21 Clear bits 4, 5 */
21 <3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */
23 <3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */
24 reg = <0>;
29 marvell,reg-init =
31 <2 0x15 0xffcf 0>, /* Reg 2,21 Clear bits 4, 5 */
33 <3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */
35 <3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */
36 reg = <1>;
[all …]
H A Docteon_68xx.dts31 reg = <0x10701 0x00000000 0x0 0x4000000>;
37 reg = <0x10700 0x00000800 0x0 0x100>;
59 reg = <0x11800 0x00003800 0x0 0x40>;
63 marvell,reg-init =
65 <2 0x15 0xffcf 0>, /* Reg 2,21 Clear bits 4, 5 */
67 <3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */
69 <3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */
70 reg = <6>;
75 reg = <1>;
77 marvell,reg-init = <3 0x10 0 0x5777>,
[all …]
/linux/sound/soc/tegra/
H A Dtegra30_ahub.c25 static inline void tegra30_apbif_write(u32 reg, u32 val) in tegra30_apbif_write() argument
27 regmap_write(ahub->regmap_apbif, reg, val); in tegra30_apbif_write()
30 static inline u32 tegra30_apbif_read(u32 reg) in tegra30_apbif_read() argument
34 regmap_read(ahub->regmap_apbif, reg, &val); in tegra30_apbif_read()
38 static inline void tegra30_audio_write(u32 reg, u32 val) in tegra30_audio_write() argument
40 regmap_write(ahub->regmap_ahub, reg, val); in tegra30_audio_write()
108 u32 reg, val; in tegra30_ahub_allocate_rx_fifo() local
125 reg = TEGRA30_AHUB_CHANNEL_CTRL + in tegra30_ahub_allocate_rx_fifo()
127 val = tegra30_apbif_read(reg); in tegra30_ahub_allocate_rx_fifo()
133 tegra30_apbif_write(reg, val); in tegra30_ahub_allocate_rx_fifo()
[all …]
H A Dtegra210_admaif.c21 #define CH_REG(offset, reg, id) \ argument
22 ((offset) + (reg) + (TEGRA_ADMAIF_CHANNEL_REG_STRIDE * (id)))
24 #define CH_TX_REG(reg, id) CH_REG(admaif->soc_data->tx_base, reg, id) argument
26 #define CH_RX_REG(reg, id) CH_REG(admaif->soc_data->rx_base, reg, id) argument
118 static bool tegra_admaif_wr_reg(struct device *dev, unsigned int reg) in tegra_admaif_wr_reg() argument
130 if ((reg >= rx_base) && (reg < rx_max)) { in tegra_admaif_wr_reg()
131 reg = (reg - rx_base) % ch_stride; in tegra_admaif_wr_reg()
132 if ((reg == TEGRA_ADMAIF_RX_ENABLE) || in tegra_admaif_wr_reg()
133 (reg == TEGRA_ADMAIF_RX_FIFO_CTRL) || in tegra_admaif_wr_reg()
134 (reg == TEGRA_ADMAIF_RX_SOFT_RESET) || in tegra_admaif_wr_reg()
[all …]
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-apq8084.dtsi21 reg = <0xfa00000 0x200000>;
33 reg = <0>;
44 reg = <1>;
55 reg = <2>;
66 reg = <3>;
94 reg = <0x0 0x0>;
234 reg = <0xf9000000 0x1000>,
240 reg = <0xf9011000 0x1000>;
245 reg = <0xfc190000 0x10000>;
250 reg = <0xfc4bc000 0x1000>;
[all …]
/linux/arch/arm64/boot/dts/apm/
H A Dapm-storm.dtsi21 reg = <0x0 0x000>;
29 reg = <0x0 0x001>;
37 reg = <0x0 0x100>;
45 reg = <0x0 0x101>;
53 reg = <0x0 0x200>;
61 reg = <0x0 0x201>;
69 reg = <0x0 0x300>;
77 reg = <0x0 0x301>;
108 reg = <0x0 0x78010000 0x0 0x1000>, /* GIC Dist */
153 reg = <0x0 0x17000100 0x0 0x1000>;
[all …]
H A Dapm-shadowcat.dtsi21 reg = <0x0 0x000>;
31 reg = <0x0 0x001>;
41 reg = <0x0 0x100>;
51 reg = <0x0 0x101>;
61 reg = <0x0 0x200>;
71 reg = <0x0 0x201>;
81 reg = <0x0 0x300>;
91 reg = <0x0 0x301>;
128 reg = <0x0 0x78090000 0x0 0x10000>, /* GIC Dist */
135 reg = <0x0 0x0 0x0 0x1000>;
[all …]
/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-g6.dtsi54 reg = <0xf00>;
60 reg = <0xf01>;
78 reg = <0x1e6e0000 0x174>;
95 reg = <0x40461000 0x1000>,
103 reg = <0x1e600000 0x100>;
107 reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>;
115 reg = < 0 >;
122 reg = < 1 >;
129 reg = < 2 >;
138 reg = <0x1e630000 0xc4>, <0x30000000 0x10000000>;
[all …]
/linux/sound/firewire/tascam/
H A Dtascam-stream.c19 __be32 reg; in get_clock() local
25 &reg, sizeof(reg), 0); in get_clock()
29 *data = be32_to_cpu(reg); in get_clock()
48 __be32 reg; in set_clock() local
79 reg = cpu_to_be32(data); in set_clock()
83 &reg, sizeof(reg), 0); in set_clock()
88 reg = cpu_to_be32(0x0000001a); in set_clock()
90 reg = cpu_to_be32(0x0000000d); in set_clock()
94 &reg, sizeof(reg), 0); in set_clock()
143 __be32 reg; in enable_data_channels() local
[all …]
/linux/drivers/fsi/
H A Dfsi-master-hub.c85 __be32 reg; in hub_master_link_enable() local
91 reg = cpu_to_be32(0x80000000 >> bit); in hub_master_link_enable()
95 &reg, 4); in hub_master_link_enable()
97 rc = fsi_device_write(hub->upstream, FSI_MSENP0 + (4 * idx), &reg, 4); in hub_master_link_enable()
127 __be32 reg; in hub_master_init() local
130 reg = cpu_to_be32(FSI_MRESP_RST_ALL_MASTER | FSI_MRESP_RST_ALL_LINK in hub_master_init()
132 rc = fsi_device_write(dev, FSI_MRESP0, &reg, sizeof(reg)); in hub_master_init()
137 reg = cpu_to_be32(FSI_MRESP_RST_ALL_MASTER | FSI_MRESP_RST_ALL_LINK in hub_master_init()
139 rc = fsi_device_write(dev, FSI_MRESP0, &reg, sizeof(reg)); in hub_master_init()
143 reg = cpu_to_be32(FSI_MECTRL_EOAE | FSI_MECTRL_P8_AUTO_TERM); in hub_master_init()
[all …]
/linux/drivers/usb/dwc3/
H A Ddrd.c21 u32 reg = dwc3_readl(dwc->regs, DWC3_OEVTEN); in dwc3_otg_disable_events() local
23 reg &= ~(disable_mask); in dwc3_otg_disable_events()
24 dwc3_writel(dwc->regs, DWC3_OEVTEN, reg); in dwc3_otg_disable_events()
29 u32 reg = dwc3_readl(dwc->regs, DWC3_OEVTEN); in dwc3_otg_enable_events() local
31 reg |= (enable_mask); in dwc3_otg_enable_events()
32 dwc3_writel(dwc->regs, DWC3_OEVTEN, reg); in dwc3_otg_enable_events()
37 u32 reg = dwc3_readl(dwc->regs, DWC3_OEVT); in dwc3_otg_clear_events() local
39 dwc3_writel(dwc->regs, DWC3_OEVTEN, reg); in dwc3_otg_clear_events()
71 u32 reg; in dwc3_otg_irq() local
75 reg = dwc3_readl(dwc->regs, DWC3_OEVT); in dwc3_otg_irq()
[all …]
/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx28.dtsi48 reg = <0>;
56 reg = <0x80000000 0x80000>;
63 reg = <0x80000000 0x3c900>;
70 reg = <0x80000000 0x2000>;
74 reg = <0x80002000 0x2000>;
83 reg = <0x80004000 0x2000>;
94 reg = <0x80006000 0x800>;
103 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
104 reg-names = "gpmi-nand", "bch";
119 reg = <0x80010000 0x2000>;
[all …]
/linux/arch/arm64/boot/dts/cavium/
H A Dthunder-88xx.dtsi68 reg = <0x0 0x000>;
74 reg = <0x0 0x001>;
80 reg = <0x0 0x002>;
86 reg = <0x0 0x003>;
92 reg = <0x0 0x004>;
98 reg = <0x0 0x005>;
104 reg = <0x0 0x006>;
110 reg = <0x0 0x007>;
116 reg = <0x0 0x008>;
122 reg = <0x0 0x009>;
[all …]
/linux/arch/powerpc/boot/dts/fsl/
H A Dp5040ds.dts107 reg = <0xf 0xfe000000 0 0x00001000>;
113 reg = <0>;
117 reg = <0x00000000 0x00100000>;
121 reg = <0x00100000 0x00500000>;
125 reg = <0x00600000 0x00100000>;
129 reg = <0x00700000 0x00900000>;
137 reg = <0x51>;
141 reg = <0x52>;
148 reg = <0x68>;
153 reg = <0x40>;
[all …]
/linux/drivers/infiniband/core/
H A Drw.c74 static inline int rdma_rw_inv_key(struct rdma_rw_reg_ctx *reg) in rdma_rw_inv_key() argument
78 if (reg->mr->need_inval) { in rdma_rw_inv_key()
79 reg->inv_wr.opcode = IB_WR_LOCAL_INV; in rdma_rw_inv_key()
80 reg->inv_wr.ex.invalidate_rkey = reg->mr->lkey; in rdma_rw_inv_key()
81 reg->inv_wr.next = &reg->reg_wr.wr; in rdma_rw_inv_key()
84 reg->inv_wr.next = NULL; in rdma_rw_inv_key()
90 /* Caller must have zero-initialized *reg. */
92 struct rdma_rw_reg_ctx *reg, struct scatterlist *sg, in rdma_rw_init_one_mr() argument
100 reg->mr = ib_mr_pool_get(qp, &qp->rdma_mrs); in rdma_rw_init_one_mr()
101 if (!reg->mr) in rdma_rw_init_one_mr()
[all …]
/linux/arch/mips/boot/dts/brcm/
H A Dbcm7346.dtsi16 reg = <0>;
22 reg = <1>;
61 reg = <0x411400 0x30>, <0x411600 0x30>;
72 reg = <0x403000 0x30>;
81 reg = <0x400000 0xdc>;
93 reg = <0x406780 0x8>;
108 reg = <0x408b80 0x8>;
125 reg = <0x404000 0x51c>;
136 reg = <0x406900 0x20>;
137 reg-io-width = <0x4>;
[all …]
H A Dbcm7435.dtsi16 reg = <0>;
22 reg = <1>;
28 reg = <2>;
34 reg = <3>;
73 reg = <0x41b500 0x40>, <0x41b600 0x40>,
85 reg = <0x403000 0x30>;
94 reg = <0x400000 0xdc>;
110 reg = <0x406780 0x8>;
125 reg = <0x409480 0x8>;
142 reg = <0x404000 0x51c>;
[all …]
/linux/tools/testing/selftests/user_events/
H A Dftrace_test.c160 struct user_reg reg = {0}; in check_print_fmt() local
176 reg.size = sizeof(reg); in check_print_fmt()
177 reg.name_args = (__u64)event; in check_print_fmt()
178 reg.enable_bit = 31; in check_print_fmt()
179 reg.enable_addr = (__u64)check; in check_print_fmt()
180 reg.enable_size = sizeof(*check); in check_print_fmt()
183 ret = ioctl(fd, DIAG_IOCSREG, &reg); in check_print_fmt()
187 printf("Reg failed in fmt\n"); in check_print_fmt()
238 struct user_reg reg = {0}; in TEST_F() local
241 reg.size = sizeof(reg); in TEST_F()
[all …]
/linux/Documentation/devicetree/bindings/leds/
H A Dleds-bcm6328.yaml40 reg:
76 reg:
108 - reg
113 - reg
126 reg = <0x10000800 0x24>;
129 reg = <2>;
135 reg = <3>;
141 reg = <4>;
148 reg = <17>;
153 reg = <18>;
[all …]

12345678910>>...626