Searched +full:reg +full:- +full:names (Results 926 – 950 of 2701) sorted by relevance
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| /linux-5.10/arch/arm/boot/dts/ |
| D | imx6qdl-wandboard.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
12 stdout-path = &uart1;
16 compatible = "fsl,imx6-wandboard-sgtl5000",
17 "fsl,imx-audio-sgtl5000";
18 model = "imx6-wandboard-sgtl5000";
19 ssi-controller = <&ssi1>;
20 audio-codec = <&codec>;
21 audio-routing =
25 mux-int-port = <1>;
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| D | ste-href-stuib.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2012 ST-Ericsson AB
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "gpio-keys";
11 #address-cells = <1>;
12 #size-cells = <0>;
13 vdd-supply = <&ab8500_ldo_aux1_reg>;
14 pinctrl-names = "default";
15 pinctrl-0 = <&prox_stuib_mode>, <&hall_stuib_mode>;
35 reg = <0x40>;
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| D | imx53-tx53.dtsi | 2 * Copyright 2012-2017 <LW@KARO-electronics.de>
3 * based on imx53-qsb.dts
7 * This file is dual-licensed: you can use it either under the terms
46 #include <dt-bindings/gpio/gpio.h>
49 model = "Ka-Ro electronics TX53 module";
55 reg = <0x70000000 0>;
62 reg-can-xcvr = ®_can_xcvr;
69 clock-frequency = <0>;
73 mclk: clock-mclk {
74 compatible = "fixed-clock";
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| D | aspeed-bmc-microsoft-olympus.dts | 1 //SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "aspeed-g4.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
10 compatible = "microsoft,olympus-bmc", "aspeed,ast2400";
13 stdout-path = &uart5;
18 reg = <0x40000000 0x20000000>;
21 reserved-memory {
22 #address-cells = <1>;
23 #size-cells = <1>;
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| D | am335x-pdu001.dts | 6 * Copyright (C) 2018 EETS GmbH - http://www.eets.ch/
8 * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/
10 * SPDX-License-Identifier: GPL-2.0+
13 /dts-v1/;
16 #include <dt-bindings/interrupt-controller/irq.h>
17 #include <dt-bindings/leds/leds-pca9532.h>
24 stdout-path = &uart3;
29 cpu0-supply = <&vdd1_reg>;
35 reg = <0x80000000 0x10000000>; /* 256 MB */
39 compatible = "regulator-fixed";
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| D | armada-38x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
32 compatible = "arm,cortex-a9-pmu";
33 interrupts-extended = <&mpic 3>;
37 compatible = "marvell,armada380-mbus", "simple-bus";
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| D | am335x-nano.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Newflow Ltd - http://www.newflow.co.uk/
5 /dts-v1/;
15 cpu0-supply = <&dcdc2_reg>;
21 reg = <0x80000000 0x10000000>; /* 256 MB */
25 compatible = "gpio-leds";
30 default-state = "off";
36 pinctrl-names = "default";
37 pinctrl-0 = <&misc_pins>;
40 pinctrl-single,pins = <
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| /linux-5.10/Documentation/devicetree/bindings/timer/ |
| D | samsung,exynos4210-mct.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
14 global timer and CPU local timers. The global timer is a 64-bit free running
15 up-counter and can generate 4 interrupts when the counter reaches one of the
16 four preset counter values. The CPU local timers are 32-bit free running
17 down-counters and generate an interrupt when the counter expires. There is
23 - samsung,exynos4210-mct
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| /linux-5.10/Documentation/devicetree/bindings/net/can/ |
| D | xilinx_can.txt | 2 ---------------------------------------------------------
5 - compatible : Should be:
6 - "xlnx,zynq-can-1.0" for Zynq CAN controllers
7 - "xlnx,axi-can-1.00.a" for Axi CAN controllers
8 - "xlnx,canfd-1.0" for CAN FD controllers
9 - "xlnx,canfd-2.0" for CAN FD 2.0 controllers
10 - reg : Physical base address and size of the controller
12 - interrupts : Property with a value describing the interrupt
14 - clock-names : List of input clock names
15 - "can_clk", "pclk" (For CANPS),
[all …]
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| /linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | qcom,wcd934x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9340/WCD9341 Codec is a standalone Hi-Fi audio codec IC.
14 It has in-built Soundwire controller, pin controller, interrupt mux and
21 reg:
27 reset-gpios:
31 slim-ifc-dev: true
36 clock-names:
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| D | marvell,mmp-sspa.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/marvell,mmp-sspa.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lubomir Rintel <lkundrak@v3.sk>
14 pattern: "^audio-controller(@.*)?$"
17 const: marvell,mmp-sspa
19 reg:
21 - description: RX block
22 - description: TX block
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| D | samsung-i2s.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/samsung-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
16 samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
18 samsung,s5pv210-i2s: for 8/16/24bit multichannel (5.1) I2S with
22 samsung,exynos5420-i2s: for 8/16/24bit multichannel (5.1) I2S for
29 samsung,exynos7-i2s: with all the available features of Exynos5 I2S.
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| D | img,i2s-out.txt | 5 - compatible : Compatible list, must contain "img,i2s-out"
7 - #sound-dai-cells : Must be equal to 0
9 - reg : Offset and length of the register set for the device
11 - clocks : Contains an entry for each entry in clock-names
13 - clock-names : Must include the following entries:
17 - dmas: Contains an entry for each entry in dma-names.
19 - dma-names: Must include the following entry:
22 - img,i2s-channels : Number of I2S channels instantiated in the I2S out block
24 - resets: Contains a phandle to the I2S out reset signal
26 - reset-names: Contains the reset signal name "rst"
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| /linux-5.10/Documentation/devicetree/bindings/serial/ |
| D | ingenic,uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: /schemas/serial.yaml#
17 pattern: "^serial@[0-9a-f]+$"
21 - enum:
22 - ingenic,jz4740-uart
23 - ingenic,jz4760-uart
24 - ingenic,jz4780-uart
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| /linux-5.10/Documentation/devicetree/bindings/leds/ |
| D | leds-pca955x.txt | 1 * NXP - pca955x LED driver
5 be input or output, and output pins can also be pulse-width controlled.
8 - compatible : should be one of :
14 - #address-cells: must be 1
15 - #size-cells: must be 0
16 - reg: I2C slave address. depends on the model.
19 - gpio-controller: allows pins to be used as GPIOs.
20 - #gpio-cells: must be 2.
21 - gpio-line-names: define the names of the GPIO lines
23 LED sub-node properties:
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| /linux-5.10/Documentation/devicetree/bindings/dsp/ |
| D | fsl,dsp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Daniel Baluta <daniel.baluta@nxp.com>
14 advanced pre- and post- audio processing.
19 - fsl,imx8qxp-dsp
20 - fsl,imx8qm-dsp
21 - fsl,imx8mp-dsp
23 reg:
28 - description: ipg clock
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| /linux-5.10/Documentation/devicetree/bindings/cpufreq/ |
| D | cpufreq-mediatek.txt | 5 - clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock names.
6 - clock-names: Should contain the following:
7 "cpu" - The multiplexer for clock input of CPU cluster.
8 "intermediate" - A parent of "cpu" clock which is used as "intermediate" clock
11 Please refer to Documentation/devicetree/bindings/clock/clock-bindings.txt for
13 - operating-points-v2: Please refer to Documentation/devicetree/bindings/opp/opp.txt
15 - proc-supply: Regulator for Vproc of CPU cluster.
18 - sram-supply: Regulator for Vsram of CPU cluster. When present, the cpufreq driver
23 - #cooling-cells:
25 Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml
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| /linux-5.10/Documentation/devicetree/bindings/mfd/ |
| D | allwinner,sun6i-a31-prcm.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mfd/allwinner,sun6i-a31-prcm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
17 const: allwinner,sun6i-a31-prcm
19 reg:
29 - allwinner,sun4i-a10-mod0-clk
30 - allwinner,sun6i-a31-apb0-clk
[all …]
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| /linux-5.10/Documentation/devicetree/bindings/usb/ |
| D | hisilicon,histb-xhci.txt | 6 - compatible: should be "hisilicon,hi3798cv200-xhci"
7 - reg: specifies physical base address and size of the registers
8 - interrupts : interrupt used by the controller
9 - clocks: a list of phandle + clock-specifier pairs, one for each
10 entry in clock-names
11 - clock-names: must contain
16 - resets: a list of phandle and reset specifier pairs as listed in
17 reset-names property.
18 - reset-names: must contain
20 - phys: a list of phandle + phy specifier pairs
[all …]
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| D | brcm,bcm7445-ehci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/brcm,bcm7445-ehci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: "usb-hcd.yaml"
13 - Al Cooper <alcooperx@gmail.com>
17 const: brcm,bcm7445-ehci
19 reg:
29 clock-names:
35 phy-names:
[all …]
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| /linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | allwinner,sun4i-a10-tcon-ch0-clk.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-tcon-ch0-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 "#clock-cells":
19 "#reset-cells":
24 - allwinner,sun4i-a10-tcon-ch0-clk
25 - allwinner,sun4i-a10-tcon-ch1-clk
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| D | allwinner,sun4i-a10-mmc-clk.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mmc-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 "#clock-cells":
25 - allwinner,sun4i-a10-mmc-clk
26 - allwinner,sun9i-a80-mmc-clk
28 reg:
[all …]
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| /linux-5.10/Documentation/devicetree/bindings/net/ |
| D | emac_rockchip.txt | 4 - compatible: should be "rockchip,<name>-emac"
5 "rockchip,rk3036-emac": found on RK3036 SoCs
6 "rockchip,rk3066-emac": found on RK3066 SoCs
7 "rockchip,rk3188-emac": found on RK3188 SoCs
8 - reg: Address and length of the register set for the device
9 - interrupts: Should contain the EMAC interrupts
10 - rockchip,grf: phandle to the syscon grf used to control speed and mode
12 - phy: see ethernet.txt file in the same directory.
13 - phy-mode: see ethernet.txt file in the same directory.
16 - phy-supply: phandle to a regulator if the PHY needs one
[all …]
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| /linux-5.10/Documentation/devicetree/bindings/arm/msm/ |
| D | qcom,llcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rishabh Bhatnagar <rishabhb@codeaurora.org>
11 - Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
24 - qcom,sc7180-llcc
25 - qcom,sdm845-llcc
27 reg:
29 - description: LLCC base register region
30 - description: LLCC broadcast base register region
[all …]
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| /linux-5.10/Documentation/devicetree/bindings/media/ |
| D | ti,vpe.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Benoit Parrot <bparrot@ti.com>
12 description: |-
20 const: ti,dra7-vpe
22 reg:
24 - description: The VPE main register region
25 - description: Scaler (SC) register region
26 - description: Color Space Conversion (CSC) register region
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