Searched +full:reg +full:- +full:names (Results 676 – 700 of 2327) sorted by relevance
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| /linux-5.10/arch/arm/boot/dts/ |
| D | r8a7793-gose.dts | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2015 Renesas Electronics Corporation
9 * SSI-AK4643
36 /dts-v1/;
38 #include <dt-bindings/gpio/gpio.h>
39 #include <dt-bindings/input/input.h>
56 stdout-path = "serial0:115200n8";
61 reg = <0 0x40000000 0 0x40000000>;
64 gpio-keys {
65 compatible = "gpio-keys";
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| D | imx6ul-14x14-evk.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
7 stdout-path = &uart1;
12 reg = <0x80000000 0x20000000>;
15 backlight_display: backlight-display {
16 compatible = "pwm-backlight";
18 brightness-levels = <0 4 8 16 32 64 128 255>;
19 default-brightness-level = <6>;
24 reg_sd1_vmmc: regulator-sd1-vmmc {
25 compatible = "regulator-fixed";
26 regulator-name = "VSD_3V3";
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| D | keystone-k2g-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/
7 /dts-v1/;
9 #include "keystone-k2g.dtsi"
12 compatible = "ti,k2g-evm", "ti,k2g", "ti,keystone";
17 reg = <0x00000008 0x00000000 0x00000000 0x80000000>;
20 reserved-memory {
21 #address-cells = <2>;
22 #size-cells = <2>;
25 dsp_common_memory: dsp-common-memory@81f800000 {
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| D | imx28-duckbill-2-485.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2015-2017 I2SE GmbH <info@i2se.com>
7 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/gpio/gpio.h>
14 compatible = "i2se,duckbill-2-485", "i2se,duckbill-2", "fsl,imx28";
18 reg = <0x40000000 0x08000000>;
24 compatible = "fsl,imx28-mmc";
25 pinctrl-names = "default";
26 pinctrl-0 = <&mmc0_8bit_pins_a
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| /linux-5.10/Documentation/devicetree/bindings/arm/tegra/ |
| D | nvidia,tegra186-pmc.txt | 4 - compatible: Should contain one of the following:
5 - "nvidia,tegra186-pmc": for Tegra186
6 - "nvidia,tegra194-pmc": for Tegra194
7 - "nvidia,tegra234-pmc": for Tegra234
8 - reg: Must contain an (offset, length) pair of the register set for each
9 entry in reg-names.
10 - reg-names: Must include the following entries:
11 - "pmc"
12 - "wake"
13 - "aotag"
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| /linux-5.10/Documentation/devicetree/bindings/display/ti/ |
| D | ti,am65x-dss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/display/ti/ti,am65x-dss.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Jyri Sarha <jsarha@ti.com>
12 - Tomi Valkeinen <tomi.valkeinen@ti.com>
22 const: ti,am65x-dss
24 reg:
28 - description: common DSS register area
29 - description: VIDL1 light video plane
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| D | ti,dra7-dss.txt | 4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
8 --------
11 - compatible: "ti,dra7-dss"
12 - reg: address and length of the register spaces for 'dss'
13 - ti,hwmods: "dss_core"
14 - clocks: handle to fclk
15 - clock-names: "fck"
16 - syscon: phandle to control module core syscon node
23 - reg: address and length of the register spaces for 'pll1_clkctrl',
25 - clocks: handle to video1 pll clock and video2 pll clock
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| /linux-5.10/Documentation/devicetree/bindings/display/ |
| D | ste,mcde.txt | 1 ST-Ericsson Multi Channel Display Engine MCDE
3 The ST-Ericsson MCDE is a display controller with support for compositing
5 LCD displays or bridges. It is used in the ST-Ericsson U8500 platform.
9 - compatible: must be:
11 - reg: register base for the main MCDE control registers, should be
13 - interrupts: the interrupt line for the MCDE
14 - epod-supply: a phandle to the EPOD regulator
15 - vana-supply: a phandle to the analog voltage regulator
16 - clocks: an array of the MCDE clocks in this strict order:
21 - clock-names: must be the following array:
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| D | allwinner,sun8i-a83t-hdmi-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-hdmi-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#phy-cells":
19 - allwinner,sun8i-a83t-hdmi-phy
20 - allwinner,sun8i-h3-hdmi-phy
21 - allwinner,sun8i-r40-hdmi-phy
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| /linux-5.10/Documentation/devicetree/bindings/dma/ |
| D | fsl-edma.txt | 3 The eDMA channels have multiplex capability by programmble memory-mapped
10 - compatible :
11 - "fsl,vf610-edma" for eDMA used similar to that on Vybrid vf610 SoC
12 - "fsl,imx7ulp-edma" for eDMA2 used similar to that on i.mx7ulp
13 - "fsl,ls1028a-edma" followed by "fsl,vf610-edma" for eDMA used on the
15 - reg : Specifies base physical address(s) and size of the eDMA registers.
19 - interrupts : A list of interrupt-specifiers, one for each entry in
20 interrupt-names on vf610 similar SoC. But for i.mx7ulp per channel
22 error interrupt(located in the last), no interrupt-names list on
24 - #dma-cells : Must be <2>.
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| /linux-5.10/Documentation/devicetree/bindings/net/ |
| D | mediatek-bluetooth.txt | 1 MediaTek SoC built-in Bluetooth Devices
5 child node of the serial node with BTIF. The dt-bindings details for BTIF
10 - compatible: Must be
11 "mediatek,mt7622-bluetooth": for MT7622 SoC
12 - clocks: Should be the clock specifiers corresponding to the entry in
13 clock-names property.
14 - clock-names: Should contain "ref" entries.
15 - power-domains: Phandle to the power domain that the device is part of
20 compatible = "mediatek,mt7622-btif",
21 "mediatek,mtk-btif";
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| D | allwinner,sun7i-a20-gmac.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/allwinner,sun7i-a20-gmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: "snps,dwmac.yaml#"
13 - Chen-Yu Tsai <wens@csie.org>
14 - Maxime Ripard <mripard@kernel.org>
18 const: allwinner,sun7i-a20-gmac
20 reg:
26 interrupt-names:
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| /linux-5.10/Documentation/devicetree/bindings/media/ |
| D | atmel-isc.txt | 2 ----------------------------------------------
5 - compatible
6 Must be "atmel,sama5d2-isc".
7 - reg
9 - interrupts
11 - clocks
13 the clock-names property;
14 Please refer to clock-bindings.txt.
15 - clock-names
17 - #clock-cells
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| /linux-5.10/arch/arm64/boot/dts/renesas/ |
| D | r8a77970-eagle.dts | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
9 /dts-v1/;
23 stdout-path = "serial0:115200n8";
26 d3p3: regulator-fixed {
27 compatible = "regulator-fixed";
28 regulator-name = "fixed-3.3V";
29 regulator-min-microvolt = <3300000>;
30 regulator-max-microvolt = <3300000>;
31 regulator-boot-on;
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| /linux-5.10/arch/arm64/boot/dts/microchip/ |
| D | sparx5.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/microchip,sparx5.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <1>;
23 stdout-path = "serial0:115200n8";
27 #address-cells = <2>;
28 #size-cells = <0>;
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| /linux-5.10/Documentation/devicetree/bindings/iio/adc/ |
| D | amlogic,meson-saradc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/amlogic,meson-saradc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
18 - const: amlogic,meson-saradc
19 - items:
20 - enum:
21 - amlogic,meson8-saradc
22 - amlogic,meson8b-saradc
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| /linux-5.10/Documentation/devicetree/bindings/phy/ |
| D | intel,combo-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/intel,combo-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dilip Kota <eswara.kota@linux.intel.com>
18 pattern: "combophy(@.*|-[0-9a-f])*$"
22 - const: intel,combophy-lgm
23 - const: intel,combo-phy
28 reg:
30 - description: ComboPhy core registers
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| D | phy-cadence-sierra.txt | 2 -----------------------
5 - compatible: Must be "cdns,sierra-phy-t0" for Sierra in Cadence platform
6 Must be "ti,sierra-phy-t0" for Sierra in TI's J721E SoC.
7 - resets: Must contain an entry for each in reset-names.
9 - reset-names: Must include "sierra_reset" and "sierra_apb".
13 - reg: register range for the PHY.
14 - #address-cells: Must be 1
15 - #size-cells: Must be 0
18 - clocks: Must contain an entry in clock-names.
19 See ../clocks/clock-bindings.txt for details.
[all …]
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| /linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | socionext,uniphier-aio.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/sound/socionext,uniphier-aio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - <alsa-devel@alsa-project.org>
15 - socionext,uniphier-ld11-aio
16 - socionext,uniphier-ld20-aio
17 - socionext,uniphier-pxs2-aio
19 reg:
25 clock-names:
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| D | mchp,spdiftx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
14 compliant with the IEC-60958 standard.
17 "#sound-dai-cells":
21 const: microchip,sama7g5-spdiftx
23 reg:
31 - description: Peripheral Bus Clock
32 - description: Generic Clock
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| /linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | exynos4-clock.txt | 9 - compatible: should be one of the following.
10 - "samsung,exynos4210-clock" - controller compatible with Exynos4210 SoC.
11 - "samsung,exynos4412-clock" - controller compatible with Exynos4412 SoC.
13 - reg: physical base address of the controller and length of memory mapped
16 - #clock-cells: should be 1.
22 dt-bindings/clock/exynos4.h header and can be used in device
27 clock: clock-controller@10030000 {
28 compatible = "samsung,exynos4210-clock";
29 reg = <0x10030000 0x20000>;
30 #clock-cells = <1>;
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| /linux-5.10/Documentation/devicetree/bindings/reset/ |
| D | nxp,lpc1850-rgu.txt | 8 - compatible: Should be "nxp,lpc1850-rgu"
9 - reg: register base and length
10 - clocks: phandle and clock specifier to RGU clocks
11 - clock-names: should contain "delay" and "reg"
12 - #reset-cells: should be 1
20 12 ARM Cortex-M0 subsystem core (LPC43xx only)
56 56 ARM Cortex-M0 application core (LPC4370 only)
59 60 ADCHS (12-bit ADC) (LPC4370 only)
65 rgu: reset-controller@40053000 {
66 compatible = "nxp,lpc1850-rgu";
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| /linux-5.10/Documentation/devicetree/bindings/regulator/ |
| D | ti-abb-regulator.txt | 4 - compatible: Should be one of:
5 - "ti,abb-v1" for older SoCs like OMAP3
6 - "ti,abb-v2" for newer SoCs like OMAP4, OMAP5
7 - "ti,abb-v3" for a generic definition where setup and control registers are
9 - reg: Address and length of the register set for the device. It contains
10 the information of registers in the same order as described by reg-names
11 - reg-names: Should contain the reg names
12 - "base-address" - contains base address of ABB module (ti,abb-v1,ti,abb-v2)
13 - "control-address" - contains control register address of ABB module (ti,abb-v3)
14 - "setup-address" - contains setup register address of ABB module (ti,abb-v3)
[all …]
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| /linux-5.10/arch/arm64/boot/dts/qcom/ |
| D | pm8916.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/iio/qcom,spmi-vadc.h>
3 #include <dt-bindings/input/linux-event-codes.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/spmi/spmi.h>
10 compatible = "qcom,pm8916", "qcom,spmi-pmic";
11 reg = <0x0 SPMI_USID>;
12 #address-cells = <1>;
13 #size-cells = <0>;
16 compatible = "qcom,pm8916-pon";
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| /linux-5.10/arch/mips/boot/dts/ni/ |
| D | 169445.dts | 1 /dts-v1/;
4 #address-cells = <1>;
5 #size-cells = <1>;
9 #address-cells = <1>;
10 #size-cells = <0>;
15 reg = <0>;
21 reg = <0x0 0x10000000>;
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-frequency = <50000000>;
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