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/linux-5.10/Documentation/devicetree/bindings/usb/
Dmediatek,mtu3.txt4 - compatible : should be "mediatek,<soc-model>-mtu3", "mediatek,mtu3",
5 soc-model is the name of SoC, such as mt8173, mt2712 etc,
8 - "mediatek,mt8173-mtu3"
9 - reg : specifies physical base address and size of the registers
10 - reg-names: should be "mac" for device IP and "ippc" for IP port control
11 - interrupts : interrupt used by the device IP
12 - power-domains : a phandle to USB power domain node to control USB's
14 - vusb33-supply : regulator of USB avdd3.3v
15 - clocks : a list of phandle + clock-specifier pairs, one for each
16 entry in clock-names
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/linux-5.10/Documentation/devicetree/bindings/gpio/
Dbrcm,bcm6345-gpio.txt1 Bindings for the Broadcom's brcm,bcm6345-gpio memory-mapped GPIO controllers.
5 BCM6338 have 8-bit data and dirout registers, where GPIO state can be read
7 BCM6345 have 16-bit data and dirout registers, where GPIO state can be read
11 - compatible: should be "brcm,bcm6345-gpio"
12 - reg-names: must contain
13 "dat" - data register
14 "dirout" - direction (output) register
15 - reg: address + size pairs describing the GPIO register sets;
16 order must correspond with the order of entries in reg-names
17 - #gpio-cells: must be set to 2. The first cell is the pin number and
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/linux-5.10/arch/arm/boot/dts/
Dimx7d.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
7 #include <dt-bindings/reset/imx7-reset.h>
12 clock-frequency = <996000000>;
13 operating-points-v2 = <&cpu0_opp_table>;
14 #cooling-cells = <2>;
15 nvmem-cells = <&fuse_grade>;
16 nvmem-cell-names = "speed_grade";
20 compatible = "arm,cortex-a7";
22 reg = <1>;
23 clock-frequency = <996000000>;
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Domap3-lilly-a83x.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
9 model = "INCOstartec LILLY-A83X module (DM3730)";
10 compatible = "incostartec,omap3-lilly-a83x", "ti,omap3630", "ti,omap36xx", "ti,omap3";
18 reg = <0x80000000 0x8000000>; /* 128 MB */
22 compatible = "gpio-leds";
25 label = "lilly-a83x::led1";
27 linux,default-trigger = "default-on";
33 compatible = "ti,omap-twl4030";
34 ti,model = "lilly-a83x";
40 compatible = "regulator-fixed";
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Drk3188-bqedison2qc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/i2c/i2c.h>
9 #include <dt-bindings/input/input.h>
13 model = "BQ Edison2 Quad-Core";
14 compatible = "mundoreader,bq-edison2qc", "rockchip,rk3188";
18 reg = <0x60000000 0x80000000>;
22 compatible = "pwm-backlight";
23 power-supply = <&vsys>;
27 gpio-keys {
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Dste-ux500-samsung-golden.dts1 // SPDX-License-Identifier: GPL-2.0-only
2 /dts-v1/;
4 #include "ste-db8500.dtsi"
5 #include "ste-ab8505.dtsi"
6 #include "ste-dbx5x0-pinctrl.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
13 * You need an intermediate, device-tree compatible bootloader
16 * There is a port of (mainline) U-Boot, see
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Domap34xx.dtsi4 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
11 #include <dt-bindings/bus/ti-sysc.h>
12 #include <dt-bindings/media/omap3-isp.h>
19 /* OMAP343x/OMAP35xx variants OPP1-6 */
20 operating-points-v2 = <&cpu0_opp_table>;
22 clock-latency = <300000>; /* From legacy driver */
23 #cooling-cells = <2>;
28 cpu0_opp_table: opp-table {
29 compatible = "operating-points-v2-ti-cpu";
32 opp1-125000000 {
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Dam3517.dtsi4 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
14 /delete-node/ &aes1_target;
15 /delete-node/ &aes2_target;
26 operating-points-v2 = <&cpu0_opp_table>;
28 clock-latency = <300000>; /* From legacy driver */
32 cpu0_opp_table: opp-table {
33 compatible = "operating-points-v2-ti-cpu";
40 opp50-300000000 {
41 opp-hz = /bits/ 64 <300000000>;
42 opp-microvolt = <1200000>;
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Dmt7629-rfb.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
8 #include <dt-bindings/input/input.h>
13 compatible = "mediatek,mt7629-rfb", "mediatek,mt7629";
20 stdout-path = "serial0:115200n8";
23 gpio-keys {
24 compatible = "gpio-keys";
41 reg = <0x40000000 0x10000000>;
44 reg_3p3v: regulator-3p3v {
45 compatible = "regulator-fixed";
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Domap3-gta04.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Based on omap3-beagle-xm.dts
7 /dts-v1/;
10 #include <dt-bindings/input/input.h>
14 compatible = "ti,omap3-gta04", "ti,omap3630", "ti,omap36xx", "ti,omap3";
18 cpu0-supply = <&vcc>;
24 reg = <0x80000000 0x20000000>; /* 512 MB */
28 stdout-path = &uart3;
37 compatible = "regulator-fixed";
38 regulator-name = "ldo_3v3";
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Darmada-398-db.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 /dts-v1/;
11 #include "armada-398.dtsi"
15 compatible = "marvell,a398-db", "marvell,armada398", "marvell,armada390";
18 stdout-path = "serial0:115200n8";
23 reg = <0x00000000 0x80000000>; /* 2 GB */
30 internal-regs {
32 pinctrl-0 = <&i2c0_pins>;
33 pinctrl-names = "default";
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Ddra72x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
20 compatible = "arm,cortex-a15-pmu";
21 interrupt-parent = <&wakeupgen>;
27 target-module@5b000 { /* 0x4845b000, ap 59 46.0 */
28 compatible = "ti,sysc-omap4", "ti,sysc";
29 reg = <0x5b000 0x4>,
31 reg-names = "rev", "sysc";
32 ti,sysc-midle = <SYSC_IDLE_FORCE>,
34 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
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Daspeed-bmc-inspur-on5263m5.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "aspeed-g5.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
10 compatible = "inspur,on5263m5-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
18 reg = <0x80000000 0x20000000>;
21 reserved-memory {
22 #address-cells = <1>;
23 #size-cells = <1>;
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Dimx6q-dhcom-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+)
8 #include <dt-bindings/pwm/pwm.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/clock/imx6qdl-clock.h>
11 #include <dt-bindings/input/input.h>
23 reg = <0x10000000 0x40000000>;
26 reg_usb_otg_vbus: regulator-usb-otg-vbus {
27 compatible = "regulator-fixed";
28 regulator-name = "usb_otg_vbus";
29 regulator-min-microvolt = <5000000>;
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/linux-5.10/Documentation/devicetree/bindings/dma/
Dst_fdma.txt3 The FDMA is a general-purpose direct memory access controller capable of
10 - compatible : Should be one of
11 - st,stih407-fdma-mpe31-11, "st,slim-rproc";
12 - st,stih407-fdma-mpe31-12, "st,slim-rproc";
13 - st,stih407-fdma-mpe31-13, "st,slim-rproc";
14 - reg : Should contain an entry for each name in reg-names
15 - reg-names : Must contain "slimcore", "dmem", "peripherals", "imem" entries
16 - interrupts : Should contain one interrupt shared by all channels
17 - dma-channels : Number of channels supported by the controller
18 - #dma-cells : Must be <3>. See DMA client section below
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/linux-5.10/Documentation/devicetree/bindings/sound/
Dst,sti-asoc-card.txt3 The sti ASoC Sound Card can be used, for all sti SoCs using internal sti-sas
8 Documentation/devicetree/bindings/sound/simple-card.yaml.
10 1) sti-uniperiph-dai: audio dai device.
11 ---------------------------------------
14 - compatible: "st,stih407-uni-player-hdmi", "st,stih407-uni-player-pcm-out",
15 "st,stih407-uni-player-dac", "st,stih407-uni-player-spdif",
16 "st,stih407-uni-reader-pcm_in", "st,stih407-uni-reader-hdmi",
18 - st,syscfg: phandle to boot-device system configuration registers
20 - clock-names: name of the clocks listed in clocks property in the same order
22 - reg: CPU DAI IP Base address and size entries, listed in same
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/linux-5.10/arch/arm64/boot/dts/renesas/
Dsalvator-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for common parts of Salvator-X board variants
5 * Copyright (C) 2015-2016 Renesas Electronics Corp.
9 * SSI-AK4613
31 #include <dt-bindings/gpio/gpio.h>
32 #include <dt-bindings/input/input.h>
43 stdout-path = "serial0:115200n8";
46 audio_clkout: audio-clkout {
49 * but needed to avoid cs2000/rcar_sound probe dead-lock
51 compatible = "fixed-clock";
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/linux-5.10/Documentation/devicetree/bindings/mmc/
Dsdhci-msm.txt1 * Qualcomm SDHCI controller (sdhci-msm)
4 and the properties used by the sdhci-msm driver.
7 - compatible: Should contain a SoC-specific string and a IP version string:
9 "qcom,sdhci-msm-v4" for sdcc versions less than 5.0
10 "qcom,sdhci-msm-v5" for sdcc version 5.0
13 string is added to support this change - "qcom,sdhci-msm-v5".
15 "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"
16 "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4"
17 "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4"
18 "qcom,msm8992-sdhci", "qcom,sdhci-msm-v4"
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/linux-5.10/Documentation/devicetree/bindings/spi/
Dallwinner,sun6i-a31-spi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/allwinner,sun6i-a31-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: "spi-controller.yaml"
13 - Chen-Yu Tsai <wens@csie.org>
14 - Maxime Ripard <mripard@kernel.org>
17 "#address-cells": true
18 "#size-cells": true
22 - const: allwinner,sun6i-a31-spi
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/linux-5.10/Documentation/devicetree/bindings/spmi/
Dqcom,spmi-pmic-arb.txt4 controller with wrapping arbitration logic to allow for multiple on-chip
13 See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for
17 - compatible : should be "qcom,spmi-pmic-arb".
18 - reg-names : must contain:
19 "core" - core registers
20 "intr" - interrupt controller registers
21 "cnfg" - configuration registers
23 "chnls" - tx-channel per virtual slave registers.
24 "obsrvr" - rx-channel (called observer) per virtual slave registers.
26 - reg : address + size pairs describing the PMIC arb register sets; order must
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/linux-5.10/Documentation/devicetree/bindings/serial/
Dnxp,lpc1850-uart.txt4 - compatible : "nxp,lpc1850-uart", "ns16550a".
5 - reg : offset and length of the register set for the device.
6 - interrupts : should contain uart interrupt.
7 - clocks : phandle to the input clocks.
8 - clock-names : required elements: "uartclk", "reg".
11 - dmas : Two or more DMA channel specifiers following the
13 - dma-names : Names for the dma channels, if present. There must
22 compatible = "nxp,lpc1850-uart", "ns16550a";
23 reg = <0x40081000 0x1000>;
24 reg-shift = <2>;
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/linux-5.10/Documentation/devicetree/bindings/thermal/
Dqcom-tsens.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 ---
5 $id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Amit Kucheria <amitk@kernel.org>
22 - description: v0.1 of TSENS
24 - enum:
25 - qcom,msm8916-tsens
26 - qcom,msm8939-tsens
27 - qcom,msm8974-tsens
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/linux-5.10/Documentation/devicetree/bindings/phy/
Dphy-mtk-tphy.txt1 MediaTek T-PHY binding
2 --------------------------
4 T-phy controller supports physical layer functionality for a number of
8 - compatible : should be one of
9 "mediatek,generic-tphy-v1"
10 "mediatek,generic-tphy-v2"
11 "mediatek,mt2701-u3phy" (deprecated)
12 "mediatek,mt2712-u3phy" (deprecated)
13 "mediatek,mt8173-u3phy";
14 make use of "mediatek,generic-tphy-v1" on mt2701 instead and
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Dsamsung-phy.txt2 -------------------------------------------------
5 - compatible : should be one of the listed compatibles:
6 - "samsung,s5pv210-mipi-video-phy"
7 - "samsung,exynos5420-mipi-video-phy"
8 - "samsung,exynos5433-mipi-video-phy"
9 - #phy-cells : from the generic phy bindings, must be 1;
12 - syscon - phandle to the PMU system controller
15 - samsung,pmu-syscon - phandle to the PMU system controller
16 - samsung,disp-sysreg - phandle to the DISP system registers controller
17 - samsung,cam0-sysreg - phandle to the CAM0 system registers controller
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/linux-5.10/Documentation/devicetree/bindings/display/
Dbrcm,bcm2835-dsi0.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/brcm,bcm2835-dsi0.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eric Anholt <eric@anholt.net>
13 - $ref: dsi-controller.yaml#
16 "#clock-cells":
21 - brcm,bcm2835-dsi0
22 - brcm,bcm2835-dsi1
24 reg:
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