/linux-6.15/drivers/clk/ |
D | clk-qoriq.c | 1 // SPDX-License-Identifier: GPL-2.0-only 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 14 #include <linux/clk-provider.h> 34 #define CGA_PLL4 4 /* only on clockgen-1.0, which lacks CGB */ 75 #define CG_VER3 4 /* version 3 cg: reg layout different */ 83 int cmux_to_group[NUM_CMUX + 1]; /* array should be -1 terminated */ 103 static void cg_out(struct clockgen *cg, u32 val, u32 __iomem *reg) in cg_out() argument 105 if (cg->info.flags & CG_LITTLE_ENDIAN) in cg_out() 106 iowrite32(val, reg); in cg_out() 108 iowrite32be(val, reg); in cg_out() [all …]
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D | clk-si5341.c | 1 // SPDX-License-Identifier: GPL-2.0 15 #include <linux/clk-provider.h> 127 /* Input dividers (48-bit) */ 138 ((output)->data->reg_output_offset[(output)->index]) 143 ((output)->data->reg_rdiv_offset[(output)->index]) 220 * using only the XTAL input, without pre-divider. 364 /* Read and interpret a 44-bit followed by a 32-bit value in the regmap */ 365 static int si5341_decode_44_32(struct regmap *regmap, unsigned int reg, in si5341_decode_44_32() argument 371 err = regmap_bulk_read(regmap, reg, r, 10); in si5341_decode_44_32() 382 static int si5341_encode_44_32(struct regmap *regmap, unsigned int reg, in si5341_encode_44_32() argument [all …]
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D | clk-lmk04832.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * LMK04832 Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner 14 #include <linux/clk-provider.h> 22 /* 0x000 - 0x00d System Functions */ 34 /* 0x100 - 0x137 Device Clock and SYSREF Clock Output Control */ 75 /* 0x138 - 0x145 SYSREF, SYNC, and Device Config */ 124 /* 0x146 - 0x14a CLKin Control */ 134 /* 0x14b - 0x152 Holdover */ 136 /* 0x153 - 0x15f PLL1 Configuration */ 143 /* 0x160 - 0x16e PLL2 Configuration */ [all …]
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/linux-6.15/drivers/clk/sunxi-ng/ |
D | ccu-sun50i-h6.c | 1 // SPDX-License-Identifier: GPL-2.0 6 #include <linux/clk-provider.h> 23 #include "ccu-sun50i-h6.h" 41 .reg = 0x000, 42 .hw.init = CLK_HW_INIT("pll-cpux", "osc24M", 57 .reg = 0x010, 58 .hw.init = CLK_HW_INIT("pll-ddr0", "osc24M", 73 .reg = 0x020, 75 .hw.init = CLK_HW_INIT("pll-periph0", "osc24M", 90 .reg = 0x028, [all …]
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D | ccu-sun8i-a33.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <linux/clk-provider.h> 24 #include "ccu-sun8i-a23-a33.h" 36 .reg = 0x000, 37 .hw.init = CLK_HW_INIT("pll-cpux", "osc24M", 48 * With sigma-delta modulation for fractional-N on the audio PLL, 53 * match the clock names. 62 static SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(pll_audio_base_clk, "pll-audio-base", 72 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_video_clk, "pll-video", 84 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve", [all …]
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D | ccu-sun8i-v3s.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Based on ccu-sun8i-h3.c, which is: 9 #include <linux/clk-provider.h> 28 #include "ccu-sun8i-v3s.h" 30 static SUNXI_CCU_NKMP_WITH_GATE_LOCK(pll_cpu_clk, "pll-cpu", 45 * With sigma-delta modulation for fractional-N on the audio PLL, 50 * match the clock names. 59 static SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(pll_audio_base_clk, "pll-audio-base", 69 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_video_clk, "pll-video", 81 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve", [all …]
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D | ccu-sun5i.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <linux/clk-provider.h> 24 #include "ccu-sun5i.h" 33 .reg = 0x000, 34 .hw.init = CLK_HW_INIT("pll-core", 46 * With sigma-delta modulation for fractional-N on the audio PLL, 51 * match the clock names. 72 .reg = 0x008, 74 .hw.init = CLK_HW_INIT("pll-audio-base", 87 .reg = 0x010, [all …]
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/linux-6.15/drivers/power/supply/ |
D | power_supply_core.c | 1 // SPDX-License-Identifier: GPL-2.0-only 25 #include <linux/fixp-arith.h> 27 #include "samsung-sdi-battery.h" 48 if (!supply->supplied_from && !supplier->supplied_to) in __power_supply_is_supplied_by() 52 if (supply->supplied_from) { in __power_supply_is_supplied_by() 53 if (!supplier->desc->name) in __power_supply_is_supplied_by() 55 for (i = 0; i < supply->num_supplies; i++) in __power_supply_is_supplied_by() 56 if (!strcmp(supplier->desc->name, supply->supplied_from[i])) in __power_supply_is_supplied_by() 59 if (!supply->desc->name) in __power_supply_is_supplied_by() 61 for (i = 0; i < supplier->num_supplicants; i++) in __power_supply_is_supplied_by() [all …]
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/linux-6.15/drivers/net/ethernet/marvell/octeon_ep/ |
D | octep_cn9k_pf.c | 1 // SPDX-License-Identifier: GPL-2.0 19 /* Names of Hardware non-queue generic interrupts */ 42 struct device *dev = &oct->pdev->dev; in cn93_dump_regs() 44 dev_info(dev, "IQ-%d register dump\n", qno); in cn93_dump_regs() 73 dev_info(dev, "OQ-%d register dump\n", qno); in cn93_dump_regs() 109 struct octep_config *conf = oct->conf; in cn93_reset_iq() 112 dev_dbg(&oct->pdev->dev, "Reset PF IQ-%d\n", q_no); in cn93_reset_iq() 115 q_no += conf->pf_ring_cfg.srn; in cn93_reset_iq() 139 q_no += CFG_GET_PORTS_PF_SRN(oct->conf); in cn93_reset_oq() 155 struct pci_dev *pdev = oct->pdev; in octep_reset_io_queues_cn93_pf() [all …]
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/linux-6.15/arch/arm64/boot/dts/allwinner/ |
D | sun50i-h700-anbernic-rg35xx-2024.dts | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 6 /dts-v1/; 8 #include "sun50i-h616.dtsi" 9 #include "sun50i-h616-cpu-opp.dtsi" 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/linux-event-codes.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/leds/common.h> 17 chassis-type = "handset"; 18 compatible = "anbernic,rg35xx-2024", "allwinner,sun50i-h700"; [all …]
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/linux-6.15/drivers/macintosh/ |
D | windfarm_ad7417_sensor.c | 1 // SPDX-License-Identifier: GPL-2.0-only 38 struct wf_ad7417_priv *pv = sr->priv; in wf_ad7417_temp_get() 44 mutex_lock(&pv->lock); in wf_ad7417_temp_get() 48 rc = i2c_master_send(pv->i2c, buf, 1); in wf_ad7417_temp_get() 51 rc = i2c_master_recv(pv->i2c, buf, 2); in wf_ad7417_temp_get() 55 /* Read a a 16-bit signed value */ in wf_ad7417_temp_get() 58 /* Convert 8.8-bit to 16.16 fixed point */ in wf_ad7417_temp_get() 61 mutex_unlock(&pv->lock); in wf_ad7417_temp_get() 65 mutex_unlock(&pv->lock); in wf_ad7417_temp_get() 66 return -1; in wf_ad7417_temp_get() [all …]
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/linux-6.15/arch/x86/include/uapi/asm/ |
D | sigcontext.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 7 * hierarchy of CPU and FPU state, available to user-space (on the stack) when 26 * Bytes 464..511 in the current 512-byte layout of the FXSAVE/FXRSTOR frame 33 * last 32-bit word of this extended area (at the 34 * fpstate+extended_size-FP_XSTATE_MAGIC2_SIZE address) is set to 50 * - if magic1 == 0 then it's sizeof(struct _fpstate) 51 * - if magic1 == FP_XSTATE_MAGIC1 then it's sizeof(struct _xstate) 84 /* 10-byte legacy floating point register: */ 90 /* 16-byte floating point register: */ 97 /* 16-byte XMM register: */ [all …]
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/linux-6.15/drivers/scsi/ |
D | wd33c93.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 * wd33c93.h - Linux device driver definitions for the 6 * IMPORTANT: This file is for version 1.25 - 09/Jul/1997 22 #define DEBUGGING_ON /* enable command-line debugging bitmask */ 27 #define DB(f,a) if (hostdata->args & (f)) a; 35 /* wd register names */ 148 /* pass input-clock explicitly. accepted mhz values are 8-10,12-20 */ 198 #define OPTIMUM_SX_PER 252 /* (ns) best we can do (mult-of-4) */ 206 /* FEF: defines for hostdata->dma_buffer_pool */ 232 uchar level2; /* extent to which Level-2 commands are used */ [all …]
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/linux-6.15/drivers/ntb/hw/amd/ |
D | ntb_hw_amd.c | 8 * Copyright (C) 2016 T-Platforms. All Rights Reserved. 17 * Copyright (C) 2016 T-Platforms. All Rights Reserved. 29 * * Neither the name of AMD Corporation nor the names of its 65 #define NTB_DESC "AMD(R) PCI-E Non-Transparent Bridge Driver" 78 if (idx < 0 || idx > ndev->mw_count) in ndev_mw_to_bar() 79 return -EINVAL; in ndev_mw_to_bar() 81 return ndev->dev_data->mw_idx << idx; in ndev_mw_to_bar() 87 return -EINVAL; in amd_ntb_mw_count() 89 return ntb_ndev(ntb)->mw_count; in amd_ntb_mw_count() 101 return -EINVAL; in amd_ntb_mw_get_align() [all …]
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/linux-6.15/drivers/tty/serial/ |
D | serial-tegra.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * High-speed serial driver for NVIDIA Tegra SoCs 7 * Copyright (c) 2012-2019, NVIDIA CORPORATION. All rights reserved. 16 #include <linux/dma-mapping.h> 157 unsigned long reg) in tegra_uart_read() argument 159 return readl(tup->uport.membase + (reg << tup->uport.regshift)); in tegra_uart_read() 163 unsigned long reg) in tegra_uart_write() argument 165 writel(val, tup->uport.membase + (reg << tup->uport.regshift)); in tegra_uart_write() 178 * RI - Ring detector is active in tegra_uart_get_mctrl() 179 * CD/DCD/CAR - Carrier detect is always active. For some reason in tegra_uart_get_mctrl() [all …]
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/linux-6.15/drivers/net/ethernet/3com/ |
D | 3c515.c | 2 Written 1997-1998 by Donald Becker. 15 2000/2/2- Added support for kernel-level ISAPnP 19 2001/11/17 - Added ethtool support (jgarzik) 21 2002/10/28 - Locking updates for 2.5 (alan@lxorguk.ukuu.org.uk) 30 /* Set the copy breakpoint for the copy-only-tiny-frames scheme. 37 /* Enable the automatic media selection code -- usually set. */ 41 programmed-I/O for Vortex cards. Full-bus-master transfers are always 83 /* Put out somewhat more debugging messages. (0 - no msg, 1 minimal msgs). */ 85 /* Some values here only for performance evaluation and path-coverage 118 II. Board-specific settings [all …]
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/linux-6.15/drivers/usb/typec/tipd/ |
D | core.c | 1 // SPDX-License-Identifier: GPL-2.0 69 /* reset de-assertion to ready for operation */ 141 u32 status; /* status reg */ 153 static const char *tps6598x_psy_name_prefix = "tps6598x-source-psy-"; 162 tps6598x_block_read(struct tps6598x *tps, u8 reg, void *val, size_t len) in tps6598x_block_read() argument 168 return -EINVAL; in tps6598x_block_read() 170 if (!tps->i2c_protocol) in tps6598x_block_read() 171 return regmap_raw_read(tps->regmap, reg, val, len); in tps6598x_block_read() 173 ret = regmap_raw_read(tps->regmap, reg, data, len + 1); in tps6598x_block_read() 178 return -EIO; in tps6598x_block_read() [all …]
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/linux-6.15/drivers/clk/sophgo/ |
D | clk-sg2042-clkgen.c | 1 // SPDX-License-Identifier: GPL-2.0 12 #include <linux/clk-provider.h> 17 #include <dt-bindings/clock/sophgo,sg2042-clkgen.h> 19 #include "clk-sg2042.h" 23 #define R_PLL_STAT (0xC0 - R_PLL_BEGIN) 24 #define R_PLL_CLKEN_CONTROL (0xC4 - R_PLL_BEGIN) 25 #define R_MPLL_CONTROL (0xE8 - R_PLL_BEGIN) 26 #define R_FPLL_CONTROL (0xF4 - R_PLL_BEGIN) 27 #define R_DPLL0_CONTROL (0xF8 - R_PLL_BEGIN) 28 #define R_DPLL1_CONTROL (0xFC - R_PLL_BEGIN) [all …]
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/linux-6.15/drivers/media/i2c/ |
D | tc358746.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * TC358746 - Parallel <-> CSI-2 Bridge 8 * - Currently only 'Parallel-in -> CSI-out' mode is supported! 13 #include <linux/clk-provider.h> 19 #include <linux/phy/phy-mipi-dphy.h> 24 #include <media/v4l2-ctrls.h> 25 #include <media/v4l2-device.h> 26 #include <media/v4l2-fwnode.h> 27 #include <media/v4l2-mc.h> 29 /* 16-bit registers */ [all …]
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/linux-6.15/Documentation/trace/ |
D | kprobetrace.rst | 2 Kprobe-based Event Tracing 8 -------- 9 These events are similar to tracepoint-based events. Instead of tracepoints, 13 Unlike the tracepoint-based event, this can be added and removed 28 ------------------------- 34 -:[GRP/][EVENT] : Clear a probe 48 %REG : Fetch register REG 50 @SYM[+|-offs] : Fetch memory at SYM +|- offs (SYM should be a data symbol) 56 +|-[u]OFFS(FETCHARG) : Fetch memory at FETCHARG +|- OFFS address.(\*3)(\*4) 72 (\*4) "u" means user-space dereference. See :ref:`user_mem_access`. [all …]
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/linux-6.15/drivers/iio/addac/ |
D | stx104.c | 1 // SPDX-License-Identifier: GPL-2.0-only 90 * struct stx104_iio - IIO device private data structure 211 err = regmap_read(priv->aio_ctl_map, STX104_ADC_CONFIGURATION, &adc_config); in stx104_read_raw() 218 if (chan->output) { in stx104_read_raw() 219 err = regmap_read(priv->aio_data_map, STX104_DAC_OFFSET(chan->channel), in stx104_read_raw() 227 mutex_lock(&priv->lock); in stx104_read_raw() 230 err = regmap_write(priv->aio_ctl_map, STX104_ADC_CHANNEL, in stx104_read_raw() 231 STX104_SINGLE_CHANNEL(chan->channel)); in stx104_read_raw() 233 mutex_unlock(&priv->lock); in stx104_read_raw() 238 * Trigger ADC sample capture by writing to the 8-bit Software Strobe Register and in stx104_read_raw() [all …]
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/linux-6.15/sound/soc/rockchip/ |
D | rockchip_i2s_tdm.c | 1 // SPDX-License-Identifier: GPL-2.0-only 2 // ALSA SoC Audio Layer - Rockchip I2S/TDM Controller driver 5 // Author: Sugar Zhang <sugar.zhang@rock-chips.com> 9 #include <linux/clk-provider.h> 23 #define DRV_NAME "rockchip-i2s-tdm" 34 u32 reg; member 92 clk_disable_unprepare(i2s_tdm->mclk_tx); in i2s_tdm_disable_unprepare_mclk() 93 clk_disable_unprepare(i2s_tdm->mclk_rx); in i2s_tdm_disable_unprepare_mclk() 97 * i2s_tdm_prepare_enable_mclk - prepare to enable all mclks, disable them on 110 ret = clk_prepare_enable(i2s_tdm->mclk_tx); in i2s_tdm_prepare_enable_mclk() [all …]
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/linux-6.15/arch/arm64/boot/dts/nvidia/ |
D | tegra210-p2894.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/input/input.h> 4 #include <dt-bindings/input/gpio-keys.h> 5 #include <dt-bindings/mfd/max77620.h> 6 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 16 stdout-path = "serial0:115200n8"; 21 reg = <0x0 0x80000000 0x0 0xc0000000>; 26 pinctrl-names = "boot"; 27 pinctrl-0 = <&state_boot>; 35 nvidia,enable-input = <TEGRA_PIN_DISABLE>; [all …]
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/linux-6.15/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/ |
D | input_system.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * Copyright (c) 2010-015, Intel Corporation. 94 hrt_data reg; in receiver_set_compression() local 128 reg = ((field_id < 6) ? (val << (field_id * 5)) : (val << (( in receiver_set_compression() 129 field_id - 6) * 5))); in receiver_set_compression() 130 receiver_reg_store(ID, addr, reg); in receiver_set_compression() 138 hrt_data reg = receiver_port_reg_load(ID, port_ID, in receiver_port_enable() local 142 reg |= 0x01; in receiver_port_enable() 144 reg &= ~0x01; in receiver_port_enable() 148 _HRT_CSS_RECEIVER_DEVICE_READY_REG_IDX, reg); in receiver_port_enable() [all …]
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/linux-6.15/drivers/net/ethernet/qlogic/qed/ |
D | qed_debug.c | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 4 * Copyright (c) 2019-2021 Marvell International Ltd. 53 /* Memory groups names */ 157 return r[0] < (r[1] - imm[0]); in cond8() 235 /* Debug bus pre-trigger recording types */ 242 /* Debug bus post-trigger recording types */ 290 * Addresses are in bytes, sizes are in quad-regs. 398 (((1 << FIELD_BIT_SIZE(type, field)) - 1) << \ 420 (GET_FIELD((block)->flags, DBG_BLOCK_CHIP_HAS_LATENCY_EVENTS) ? 2 : 1) 422 ((block)->num_of_dbg_bus_lines + NUM_EXTRA_DBG_LINES(block)) [all …]
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