Searched +full:reg +full:- +full:names (Results 576 – 600 of 1975) sorted by relevance
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/linux-5.10/drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/ |
D | rockchip-isp1.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 --- 4 $id: http://devicetree.org/schemas/media/rockchip-isp1.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Helen Koike <helen.koike@collabora.com> 18 const: rockchip,rk3399-cif-isp 20 reg: 29 power-domains: 36 phy-names: 41 - description: ISP clock [all …]
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/linux-5.10/Documentation/devicetree/bindings/display/ti/ |
D | ti,omap-dss.txt | 5 ------------------- 25 ----------- 36 ------- 39 name for each display. If no aliases are defined, a semi-random number is used 43 ------- 45 A shortened example of the DSS description for OMAP4, with non-relevant parts 49 compatible = "ti,omap4-dss"; 50 reg = <0x58000000 0x80>; 54 clock-names = "fck"; 55 #address-cells = <1>; [all …]
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/linux-5.10/arch/arm/boot/dts/ |
D | imx28-duckbill-2-spi.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright (C) 2015-2017 I2SE GmbH <info@i2se.com> 7 /dts-v1/; 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/gpio/gpio.h> 14 compatible = "i2se,duckbill-2-spi", "i2se,duckbill-2", "fsl,imx28"; 22 reg = <0x40000000 0x08000000>; 28 compatible = "fsl,imx28-mmc"; 29 pinctrl-names = "default"; 30 pinctrl-0 = <&mmc0_8bit_pins_a [all …]
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D | r8a7791-koelsch.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 * Copyright (C) 2013-2014 Renesas Solutions Corp. 11 * SSI-AK4643 38 /dts-v1/; 40 #include <dt-bindings/gpio/gpio.h> 41 #include <dt-bindings/input/input.h> 60 stdout-path = "serial0:115200n8"; 65 reg = <0 0x40000000 0 0x40000000>; 70 reg = <2 0x00000000 0 0x40000000>; 74 #address-cells = <1>; [all …]
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D | imx6dl-eckelmann-ci4x10.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 15 compatible = "eckelmann,imx6dl-ci4x10", "fsl,imx6dl"; 18 stdout-path = &uart3; 23 reg = <0x10000000 0x40000000>; 26 rmii_clk: clock-rmii { 28 compatible = "fixed-clock"; 29 #clock-cells = <0>; 30 clock-frequency = <50000000>; [all …]
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D | axm55xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/lsi,axm5516-clks.h> 12 #address-cells = <2>; 13 #size-cells = <2>; 14 interrupt-parent = <&gic>; 25 compatible = "simple-bus"; 26 #address-cells = <2>; 27 #size-cells = <2>; 31 compatible = "fixed-clock"; [all …]
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D | ste-ab8505.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 #include <dt-bindings/clock/ste-ab8500.h> 10 iio-hwmon { 11 compatible = "iio-hwmon"; 12 io-channels = <&gpadc 0x02>, /* Battery temperature */ 23 interrupt-parent = <&intc>; 25 interrupt-controller; 26 #interrupt-cells = <2>; 28 ab8500_clock: clock-controller { 29 compatible = "stericsson,ab8500-clk"; [all …]
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D | dove-cubox.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 12 reg = <0x00000000 0x40000000>; 20 compatible = "gpio-leds"; 21 pinctrl-0 = <&pmx_gpio_18>; 22 pinctrl-names = "default"; 27 default-state = "keep"; 32 compatible = "simple-bus"; 33 #address-cells = <1>; 34 #size-cells = <0>; [all …]
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D | imx6q-dmo-edmqmx6.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 12 model = "Data Modul eDM-QMX6 Board"; 13 compatible = "dmo,imx6q-edmqmx6", "fsl,imx6q"; 16 stdout-path = &uart2; 22 stmpe-i2c0 = &stmpe1; 23 stmpe-i2c1 = &stmpe2; 28 reg = <0x10000000 0x80000000>; 32 compatible = "simple-bus"; [all …]
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D | am335x-moxa-uc-8100-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2020 MOXA Inc. - https://www.moxa.com/ 14 cpu0-supply = <&vdd1_reg>; 18 vbat: vbat-regulator { 19 compatible = "regulator-fixed"; 23 vmmcsd_fixed: vmmcsd-regulator { 24 compatible = "regulator-fixed"; 25 regulator-name = "vmmcsd_fixed"; 26 regulator-min-microvolt = <3300000>; 27 regulator-max-microvolt = <3300000>; [all …]
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D | imx51-zii-scu2-mezz.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 13 compatible = "zii,imx51-scu2-mezz", "fsl,imx51"; 16 stdout-path = &uart1; 22 reg = <0x90000000 0>; 26 mdio-gpio0 = &mdio_gpio; 29 usb_vbus: regulator-usb-vbus { 30 compatible = "regulator-fixed"; 31 pinctrl-names = "default"; 32 pinctrl-0 = <&pinctrl_usb_mmc_reset>; [all …]
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D | stm32mp15xx-dhcom-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de> 6 #include "stm32mp15-pinctrl.dtsi" 7 #include "stm32mp15xxaa-pinctrl.dtsi" 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/mfd/st,stpmic1.h> 18 reg = <0xC0000000 0x40000000>; 21 reserved-memory { 22 #address-cells = <1>; 23 #size-cells = <1>; [all …]
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D | armada-xp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 * Gregory CLEMENT <gregory.clement@free-electrons.com> 9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 16 #include "armada-370-xp.dtsi" 19 #address-cells = <2>; 20 #size-cells = <2>; 23 compatible = "marvell,armadaxp", "marvell,armada-370-xp"; 31 compatible = "marvell,armadaxp-mbus", "simple-bus"; 35 reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>; 38 internal-regs { [all …]
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D | da850-lego-ev3.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 8 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/linux-event-codes.h> 11 #include <dt-bindings/pwm/pwm.h> 25 reg = <0xc0000000 0x04000000>; 32 compatible = "gpio-keys"; 34 pinctrl-names = "default"; 35 pinctrl-0 = <&button_bias>; 75 * The EV3 has two built-in bi-color LEDs behind the buttons. [all …]
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D | imx53-qsb-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 10 stdout-path = &uart1; 15 reg = <0x70000000 0x20000000>, 20 compatible = "fsl,imx-parallel-display"; 21 pinctrl-names = "default"; 22 pinctrl-0 = <&pinctrl_ipu_disp0>; 24 #address-cells = <1>; 25 #size-cells = <0>; 29 reg = <0>; 32 remote-endpoint = <&ipu_di0_disp0>; [all …]
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/linux-5.10/Documentation/devicetree/bindings/media/i2c/ |
D | adv748x.txt | 4 HDMI receiver. They can output CSI-2 on two independent outputs TXA and TXB 9 - compatible: Must contain one of the following 10 - "adi,adv7481" for the ADV7481 11 - "adi,adv7482" for the ADV7482 13 - reg: I2C slave addresses 14 The ADV748x has up to twelve 256-byte maps that can be accessed via the 21 - interrupt-names: Should specify the interrupts as "intrq1", "intrq2" and/or 24 - interrupts: Specify the interrupt lines for the ADV748x 25 - reg-names : Names of maps with programmable addresses. 26 It shall contain all maps needing a non-default address. [all …]
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/linux-5.10/arch/arm64/boot/dts/amd/ |
D | amd-seattle-soc.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 10 interrupt-parent = <&gic0>; 11 #address-cells = <2>; 12 #size-cells = <2>; 14 gic0: interrupt-controller@e1101000 { 15 compatible = "arm,gic-400", "arm,cortex-a15-gic"; 16 interrupt-controller; 17 #interrupt-cells = <3>; 18 #address-cells = <2>; 19 #size-cells = <2>; [all …]
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/linux-5.10/Documentation/devicetree/bindings/net/ |
D | mediatek-net.txt | 10 - compatible: Should be 11 "mediatek,mt2701-eth": for MT2701 SoC 12 "mediatek,mt7623-eth", "mediatek,mt2701-eth": for MT7623 SoC 13 "mediatek,mt7622-eth": for MT7622 SoC 14 "mediatek,mt7629-eth": for MT7629 SoC 15 "ralink,rt5350-eth": for Ralink Rt5350F and MT7628/88 SoC 16 - reg: Address and length of the register set for the device 17 - interrupts: Should contain the three frame engines interrupts in numeric 19 - clocks: the clock used by the core 20 - clock-names: the names of the clock listed in the clocks property. These are [all …]
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/linux-5.10/arch/arm64/boot/dts/bitmain/ |
D | bm1880.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/clock/bm1880-clock.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/reset/bitmain,bm1880-reset.h> 13 interrupt-parent = <&gic>; 14 #address-cells = <2>; 15 #size-cells = <2>; 18 #address-cells = <1>; 19 #size-cells = <0>; 23 compatible = "arm,cortex-a53"; [all …]
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/linux-5.10/arch/h8300/boot/dts/ |
D | h8s_sim.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 5 #address-cells = <1>; 6 #size-cells = <1>; 7 interrupt-parent = <&h8intc>; 10 bootargs = "earlyprintk=h8300-sim"; 11 stdout-path = <&sci0>; 19 #clock-cells = <0>; 20 compatible = "fixed-clock"; 21 clock-frequency = <33333333>; [all …]
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/linux-5.10/arch/arm64/boot/dts/mediatek/ |
D | mt7622-bananapi-bpi-r64.dts | 5 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 16 model = "Bananapi BPI-R64"; 17 compatible = "bananapi,bpi-r64", "mediatek,mt7622"; 24 stdout-path = "serial0:115200n8"; 30 proc-supply = <&mt6380_vcpu_reg>; 31 sram-supply = <&mt6380_vm_reg>; 35 proc-supply = <&mt6380_vcpu_reg>; [all …]
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/linux-5.10/Documentation/devicetree/bindings/pci/ |
D | ti-pci.txt | 4 - compatible: Should be "ti,dra7-pcie" for RC (deprecated) 5 Should be "ti,dra7-pcie-ep" for EP (deprecated) 6 Should be "ti,dra746-pcie-rc" for dra74x/dra76 in RC mode 7 Should be "ti,dra746-pcie-ep" for dra74x/dra76 in EP mode 8 Should be "ti,dra726-pcie-rc" for dra72x in RC mode 9 Should be "ti,dra726-pcie-ep" for dra72x in EP mode 10 - phys : list of PHY specifiers (used by generic PHY framework) 11 - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the 13 - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>", 15 - num-lanes as specified in ../designware-pcie.txt [all …]
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/linux-5.10/Documentation/devicetree/bindings/clock/ |
D | allwinner,sun4i-a10-pll1-clk.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-pll1-clk.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 16 "#clock-cells": 21 - allwinner,sun4i-a10-pll1-clk 22 - allwinner,sun6i-a31-pll1-clk 23 - allwinner,sun8i-a23-pll1-clk [all …]
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/linux-5.10/Documentation/devicetree/bindings/sound/ |
D | intel,keembay-i2s.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/sound/intel,keembay-i2s.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Sia, Jee Heng <jee.heng.sia@intel.com> 19 - intel,keembay-i2s 20 - intel,keembay-tdm 22 "#sound-dai-cells": 25 reg: 27 - description: I2S registers [all …]
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/linux-5.10/Documentation/devicetree/bindings/display/mediatek/ |
D | mediatek,dsi.txt | 5 drive up to 4-lane MIPI DSI output. Two DSIs can be synchronized for dual- 9 - compatible: "mediatek,<chip>-dsi" 10 - the supported chips are mt2701, mt7623, mt8173 and mt8183. 11 - reg: Physical base address and length of the controller's registers 12 - interrupts: The interrupt signal from the function block. 13 - clocks: device clocks 14 See Documentation/devicetree/bindings/clock/clock-bindings.txt for details. 15 - clock-names: must contain "engine", "digital", and "hs" 16 - phys: phandle link to the MIPI D-PHY controller. 17 - phy-names: must contain "dphy" [all …]
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