| /linux-6.8/arch/powerpc/boot/dts/fsl/ |
| D | p1024rdb_32b.dts | 14 * names of its contributors may be used to endorse or promote products
35 /include/ "p1020si-pre.dtsi"
45 reg = <0x0 0xffe05000 0 0x1000>;
55 reg = <0x0 0xffe09000 0 0x1000>;
70 reg = <0x0 0xffe0a000 0 0x1000>;
74 reg = <0x0 0x0 0x0 0x0 0x0>;
87 /include/ "p1020si-post.dtsi"
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| D | p1024rdb_36b.dts | 14 * names of its contributors may be used to endorse or promote products
35 /include/ "p1020si-pre.dtsi"
45 reg = <0xf 0xffe05000 0 0x1000>;
55 reg = <0xf 0xffe09000 0 0x1000>;
70 reg = <0xf 0xffe0a000 0 0x1000>;
74 reg = <0x0 0x0 0x0 0x0 0x0>;
87 /include/ "p1020si-post.dtsi"
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| D | interlaken-lac-portals.dtsi | 13 * names of its contributors may be used to endorse or promote products
34 #address-cells = <0x1>;
35 #size-cells = <0x1>;
36 compatible = "fsl,interlaken-lac-portals";
38 lportal0: lac-portal@0 {
39 compatible = "fsl,interlaken-lac-portal-v1.0";
40 reg = <0x0 0x1000>;
43 lportal1: lac-portal@1000 {
44 compatible = "fsl,interlaken-lac-portal-v1.0";
45 reg = <0x1000 0x1000>;
[all …]
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| D | qoriq-sec4.2-0.dtsi | 14 * names of its contributors may be used to endorse or promote products
36 compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
37 fsl,sec-era = <3>;
38 #address-cells = <1>;
39 #size-cells = <1>;
40 reg = <0x300000 0x10000>;
45 compatible = "fsl,sec-v4.2-job-ring",
46 "fsl,sec-v4.0-job-ring";
47 reg = <0x1000 0x1000>;
52 compatible = "fsl,sec-v4.2-job-ring",
[all …]
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| D | qoriq-sec5.0-0.dtsi | 14 * names of its contributors may be used to endorse or promote products
36 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
37 fsl,sec-era = <5>;
38 #address-cells = <1>;
39 #size-cells = <1>;
40 reg = <0x300000 0x10000>;
45 compatible = "fsl,sec-v5.0-job-ring",
46 "fsl,sec-v4.0-job-ring";
47 reg = <0x1000 0x1000>;
52 compatible = "fsl,sec-v5.0-job-ring",
[all …]
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| /linux-6.8/Documentation/devicetree/bindings/memory-controllers/ |
| D | nvidia,tegra124-emc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra124-emc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The EMC interfaces with the off-chip SDRAM to service the request stream
19 const: nvidia,tegra124-emc
21 reg:
26 - description: external memory clock
[all …]
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| /linux-6.8/arch/arm/boot/dts/samsung/ |
| D | exynos3250-monk.dts | 1 // SPDX-License-Identifier: GPL-2.0
12 /dts-v1/;
14 #include "exynos4412-ppmu-common.dtsi"
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/clock/samsung,s2mps11.h>
30 reg = <0x40000000 0x1ff00000>;
34 compatible = "samsung,secure-firmware";
35 reg = <0x0205f000 0x1000>;
38 gpio-keys {
[all …]
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| /linux-6.8/Documentation/devicetree/bindings/mfd/ |
| D | rockchip,rk818.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Zhong <zyw@rock-chips.com>
11 - Zhang Qing <zhangqing@rock-chips.com>
20 - rockchip,rk818
22 reg:
28 '#clock-cells':
30 See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
33 clock-output-names:
[all …]
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| D | rohm,bd71837-pmic.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71837-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
13 BD71837MWV is programmable Power Management ICs for powering single-core,
14 dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is optimized for low
18 …/www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applica…
24 reg:
35 clock-names:
[all …]
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| D | 88pm860x.txt | 4 - compatible : "marvell,88pm860x"
5 - reg : the I2C slave address for the 88pm860x chip
6 - interrupts : IRQ line for the 88pm860x chip
7 - interrupt-controller: describes the 88pm860x as an interrupt controller (has its own domain)
8 - #interrupt-cells : should be 1.
9 - The cell is the 88pm860x local IRQ number
12 - marvell,88pm860x-irq-read-clr: inicates whether interrupt status is cleared by read
13 - marvell,88pm860x-slave-addr: 88pm860x are two chips solution. <reg> stores the I2C address
17 88pm860x consists of a large and varied group of sub-devices:
19 Device Supply Names Description
[all …]
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| /linux-6.8/Documentation/devicetree/bindings/iommu/ |
| D | mediatek,iommu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yong Wu <yong.wu@mediatek.com>
16 ARM Short-Descriptor translation table format for address translation.
24 +--------+
26 gals0-rx gals1-rx (Global Async Local Sync rx)
29 gals0-tx gals1-tx (Global Async Local Sync tx)
31 +--------+
35 +----------------+-------
[all …]
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| /linux-6.8/arch/arm64/boot/dts/amlogic/ |
| D | amlogic-t7.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/power/amlogic,t7-pwrc.h>
10 interrupt-parent = <&gic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
15 #address-cells = <0x2>;
16 #size-cells = <0x0>;
18 cpu-map {
52 compatible = "arm,cortex-a53";
[all …]
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| /linux-6.8/Documentation/devicetree/bindings/pinctrl/ |
| D | nvidia,tegra194-pinmux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra194-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra194-pinmux
17 - nvidia,tegra194-pinmux-aon
19 reg:
21 - description: pinmux registers
[all …]
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| D | cypress,cy8c95x0.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Patrick Rudolph <patrick.rudolph@9elements.com>
14 Pin function configuration is performed on a per-pin basis.
19 - cypress,cy8c9520
20 - cypress,cy8c9540
21 - cypress,cy8c9560
23 reg:
26 gpio-controller: true
[all …]
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| /linux-6.8/arch/arm/boot/dts/nxp/imx/ |
| D | imx6q-b650v3.dts | 5 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include "imx6q-bx50v3.dtsi"
49 compatible = "ge,imx6q-b650v3", "advantech,imx6q-ba16", "fsl,imx6q";
52 stdout-path = &uart3;
55 panel-lvds0 {
56 compatible = "innolux,g121x1-l03";
58 power-supply = <®_lvds>;
62 remote-endpoint = <&lvds0_out>;
71 lvds0: lvds-channel@0 {
[all …]
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| D | imx6q-b450v3.dts | 5 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include "imx6q-bx50v3.dtsi"
49 compatible = "ge,imx6q-b450v3", "advantech,imx6q-ba16", "fsl,imx6q";
52 stdout-path = &uart3;
55 panel-lvds0 {
56 compatible = "innolux,g121x1-l03";
58 power-supply = <®_lvds>;
62 remote-endpoint = <&lvds0_out>;
71 lvds0: lvds-channel@0 {
[all …]
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| /linux-6.8/drivers/hwmon/ |
| D | tmp421.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
20 #include <linux/hwmon-sysfs.h>
114 static int temp_from_raw(u16 reg, bool extended) in temp_from_raw() argument
117 int temp = reg & ~0xf; in temp_from_raw()
120 temp = temp - 64 * 256; in temp_from_raw()
129 struct i2c_client *client = data->client; in tmp421_update_device()
133 mutex_lock(&data->update_lock); in tmp421_update_device()
135 if (time_after(jiffies, data->last_updated + (HZ / 2)) || in tmp421_update_device()
136 !data->valid) { in tmp421_update_device()
140 data->config = ret; in tmp421_update_device()
[all …]
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| /linux-6.8/arch/arm64/boot/dts/rockchip/ |
| D | rk3328-roc-cc.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd
6 /dts-v1/;
10 model = "Firefly roc-rk3328-cc";
11 compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328";
20 stdout-path = "serial2:1500000n8";
23 gmac_clkin: external-gmac-clock {
24 compatible = "fixed-clock";
25 clock-frequency = <125000000>;
26 clock-output-names = "gmac_clkin";
[all …]
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| /linux-6.8/arch/arm/boot/dts/allwinner/ |
| D | sun8i-h2-plus-bananapi-m2-zero.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Based on sun8i-h3-bananapi-m2-plus.dts, which is:
6 * Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
9 /dts-v1/;
10 #include "sun8i-h3.dtsi"
11 #include "sunxi-common-regulators.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
17 model = "Banana Pi BPI-M2-Zero";
18 compatible = "sinovoip,bpi-m2-zero", "allwinner,sun8i-h2-plus";
[all …]
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| /linux-6.8/Documentation/devicetree/bindings/gpio/ |
| D | fsl-imx-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/gpio/fsl-imx-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Anson Huang <Anson.Huang@nxp.com>
15 - enum:
16 - fsl,imx1-gpio
17 - fsl,imx21-gpio
18 - fsl,imx31-gpio
19 - fsl,imx35-gpio
[all …]
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| D | ti,omap-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/ti,omap-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Grygorii Strashko <grygorii.strashko@ti.com>
13 The general-purpose interface combines general-purpose input/output (GPIO) banks.
14 Each GPIO banks provides up to 32 dedicated general-purpose pins with input
15 and output capabilities; interrupt generation in active mode and wake-up
21 - enum:
22 - ti,omap2-gpio
[all …]
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| D | gpio-stp-xway.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-stp-xway.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - John Crispin <john@phrozen.org>
20 pattern: "^gpio@[0-9a-f]+$"
23 const: lantiq,gpio-stp-xway
25 reg:
28 gpio-controller: true
30 "#gpio-cells":
[all …]
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| /linux-6.8/Documentation/devicetree/bindings/display/panel/ |
| D | tpo,tpg110.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Thierry Reding <thierry.reding@gmail.com>
20 self-describing.
22 +--------+
23 SPI -> | TPO | -> physical display
24 RGB -> | TPG110 |
25 +--------+
[all …]
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| /linux-6.8/arch/arm/boot/dts/renesas/ |
| D | emev2-kzm9d.dts | 1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
20 reg = <0x40000000 0x8000000>;
29 stdout-path = "serial1:115200n8";
33 compatible = "gpio-keys";
35 debounce-interval = <50>;
36 wakeup-source;
[all …]
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| /linux-6.8/Documentation/devicetree/bindings/pci/ |
| D | mobiveil-pcie.txt | 7 - #address-cells: Address representation for root ports, set to <3>
8 - #size-cells: Size representation for root ports, set to <2>
9 - #interrupt-cells: specifies the number of cells needed to encode an
11 - compatible: Should contain "mbvl,gpex40-pcie"
12 - reg: Should contain PCIe registers location and length
20 - device_type: must be "pci"
21 - apio-wins : number of requested apio outbound windows
22 default 2 outbound windows are configured -
25 - ppio-wins : number of requested ppio inbound windows
27 - bus-range: PCI bus numbers covered
[all …]
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