Home
last modified time | relevance | path

Searched +full:reg +full:- +full:names (Results 4076 – 4100 of 5679) sorted by relevance

1...<<161162163164165166167168169170>>...228

/linux-6.15/arch/arm/boot/dts/nxp/imx/
Dimx6ull-dhcom-picoitx.dts1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
6 * DHCM-iMX6ULL-C080-R051-F0409-SPI-E2-CAN2-SD-RTC-ADC-I-01D2
7 * DHCOR PCB number: 578-200 or newer
8 * DHCOM PCB number: 579-200 or newer
9 * PicoITX PCB number: 487-600 or newer
11 /dts-v1/;
13 #include "imx6ull-dhcom-som.dtsi"
14 #include "imx6ull-dhcom-som-cfg-sdcard.dtsi"
18 compatible = "dh,imx6ull-dhcom-picoitx", "dh,imx6ull-dhcom-som",
19 "dh,imx6ull-dhcor-som", "fsl,imx6ull";
[all …]
Dimx6sx-sdb.dts1 // SPDX-License-Identifier: GPL-2.0
5 #include "imx6sx-sdb.dtsi"
12 clock-frequency = <100000>;
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_i2c1>;
19 reg = <0x08>;
23 regulator-min-microvolt = <300000>;
24 regulator-max-microvolt = <1875000>;
25 regulator-boot-on;
26 regulator-always-on;
[all …]
Dimx6dl-aristainetos_7.dts1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
9 #include "imx6qdl-aristainetos.dtsi"
13 compatible = "abb,aristainetos-imx6dl-7", "fsl,imx6dl";
17 reg = <0x10000000 0x40000000>;
21 compatible = "fsl,imx-parallel-display";
22 interface-pix-fmt = "rgb24";
23 pinctrl-names = "default";
24 pinctrl-0 = <&pinctrl_ipu_disp>;
27 display-timings {
[all …]
Dimx53-tx53-x03x.dts2 * Copyright 2013-2017 Lothar Waßmann <LW@KARO-electronics.de>
4 * This file is dual-licensed: you can use it either under the terms
42 /dts-v1/;
43 #include "imx53-tx53.dtsi"
44 #include <dt-bindings/input/input.h>
45 #include <dt-bindings/interrupt-controller/irq.h>
46 #include <dt-bindings/pwm/pwm.h>
49 model = "Ka-Ro electronics TX53 module (LCD)";
57 compatible = "fsl,imx-parallel-display";
58 interface-pix-fmt = "rgb24";
[all …]
/linux-6.15/arch/arm/boot/dts/ti/omap/
Dam3517-evm-ui.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2018 Logic PD, Inc - https://www.logicpd.com/
6 #include <dt-bindings/input/input.h>
10 compatible = "simple-audio-card";
11 simple-audio-card,name = "tlv320aic23-hifi";
13 simple-audio-card,widgets =
18 simple-audio-card,routing =
25 simple-audio-card,format = "i2s";
26 simple-audio-card,bitclock-master = <&sound_master>;
27 simple-audio-card,frame-master = <&sound_master>;
[all …]
Dam5729-beagleboneai.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2014-2019 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
9 #include "am57xx-commercial-grade.dtsi"
10 #include "dra74x-mmc-iodelay.dtsi"
11 #include "dra74-ipu-dsp-common.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/pinctrl/dra.h>
18 compatible = "beagle,am5729-beagleboneai", "ti,am5728",
[all …]
/linux-6.15/arch/arm/boot/dts/samsung/
Dexynos3250-artik5.dtsi1 // SPDX-License-Identifier: GPL-2.0
13 #include <dt-bindings/clock/samsung,s2mps11.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
26 stdout-path = &serial_2;
31 reg = <0x40000000 0x1f800000>;
35 compatible = "samsung,secure-firmware";
36 reg = <0x0205f000 0x1000>;
39 thermal-zones {
40 cpu_thermal: cpu-thermal {
[all …]
/linux-6.15/Documentation/devicetree/bindings/usb/
Drenesas,usbhs.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas USBHS (HS-USB) controller
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
15 - items:
16 - const: renesas,usbhs-r7s72100 # RZ/A1
17 - const: renesas,rza1-usbhs
19 - items:
20 - enum:
[all …]
/linux-6.15/Documentation/devicetree/bindings/spi/
Dspi-orion.txt4 - compatible : should be on of the following:
5 - "marvell,orion-spi" for the Orion, mv78x00, Kirkwood and Dove SoCs
6 - "marvell,armada-370-spi", for the Armada 370 SoCs
7 - "marvell,armada-375-spi", for the Armada 375 SoCs
8 - "marvell,armada-380-spi", for the Armada 38x SoCs
9 - "marvell,armada-390-spi", for the Armada 39x SoCs
10 - "marvell,armada-xp-spi", for the Armada XP SoCs
11 - reg : offset and length of the register set for the device.
19 chip-select lines 0 through 7 respectively.
20 - cell-index : Which of multiple SPI controllers is this.
[all …]
/linux-6.15/arch/arm64/boot/dts/qcom/
Dmsm8916-motorola-surnia.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 /dts-v1/;
5 #include "msm8916-motorola-common.dtsi"
10 chassis-type = "handset";
18 reg = <0x36>;
20 interrupts-extended = <&tlmm 12 IRQ_TYPE_EDGE_FALLING>;
22 pinctrl-0 = <&battery_alert_default>;
23 pinctrl-names = "default";
25 maxim,rsns-microohm = <10000>;
26 maxim,over-heat-temp = <600>;
[all …]
/linux-6.15/Documentation/devicetree/bindings/clock/
Dqcom,dispcc-sm6350.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,dispcc-sm6350.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Konrad Dybcio <konradybcio@kernel.org>
16 See also:: include/dt-bindings/clock/qcom,dispcc-sm6350.h
20 const: qcom,sm6350-dispcc
24 - description: Board XO source
25 - description: GPLL0 source from GCC
26 - description: Byte clock from DSI PHY
[all …]
Dqcom,gcc-msm8953.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8953.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Adam Skladowski <a_skl39@protonmail.com>
11 - Sireesh Kodali <sireeshkodali@protonmail.com>
17 See also: include/dt-bindings/clock/qcom,gcc-msm8953.h
21 const: qcom,gcc-msm8953
25 - description: Board XO source
26 - description: Sleep clock source
[all …]
Dqcom,sc7180-dispcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sc7180-dispcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Taniya Das <quic_tdas@quicinc.com>
16 See also:: include/dt-bindings/clock/qcom,dispcc-sc7180.h
20 const: qcom,sc7180-dispcc
24 - description: Board XO source
25 - description: GPLL0 source from GCC
26 - description: Byte clock from DSI PHY
[all …]
/linux-6.15/Documentation/devicetree/bindings/media/i2c/
Dov7670.txt8 - compatible: should be "ovti,ov7670"
9 - clocks: reference to the xclk input clock.
10 - clock-names: should be "xclk".
13 - hsync-active: active state of the HSYNC signal, 0/1 for LOW/HIGH respectively.
14 - vsync-active: active state of the VSYNC signal, 0/1 for LOW/HIGH respectively.
17 - reset-gpios: reference to the GPIO connected to the resetb pin, if any.
19 - powerdown-gpios: reference to the GPIO connected to the pwdn pin, if any.
21 - ov7670,pclk-hb-disable: a boolean property to suppress pixel clock output
25 sub-node for its digital output video port, in accordance with the video
27 Documentation/devicetree/bindings/media/video-interfaces.txt.
[all …]
/linux-6.15/drivers/gpio/
Dgpio-i8255.c1 // SPDX-License-Identifier: GPL-2.0
14 #include "gpio-i8255.h"
71 unsigned int offset, unsigned int *reg, in i8255_reg_mask_xlate() argument
81 *reg = base + stride + ppi * 4; in i8255_reg_mask_xlate()
85 *reg = base + ppi * 4; in i8255_reg_mask_xlate()
90 return -EINVAL; in i8255_reg_mask_xlate()
95 * devm_i8255_regmap_register - Register an i8255 GPIO controller
109 if (!config->parent) in devm_i8255_regmap_register()
110 return -EINVAL; in devm_i8255_regmap_register()
112 if (!config->map) in devm_i8255_regmap_register()
[all …]
/linux-6.15/Documentation/devicetree/bindings/sound/
Dcirrus,cs42l43.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
21 - $ref: dai-common.yaml#
26 - cirrus,cs42l43
28 reg:
31 vdd-p-supply:
35 vdd-a-supply:
39 vdd-d-supply:
[all …]
/linux-6.15/Documentation/devicetree/bindings/mfd/
Drockchip,rk816.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Zhong <zyw@rock-chips.com>
11 - Zhang Qing <zhangqing@rock-chips.com>
21 - rockchip,rk816
23 reg:
29 '#clock-cells':
31 See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
34 clock-output-names:
[all …]
Drockchip,rk808.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Zhong <zyw@rock-chips.com>
11 - Zhang Qing <zhangqing@rock-chips.com>
20 - rockchip,rk808
22 reg:
28 '#clock-cells':
30 See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
33 clock-output-names:
[all …]
/linux-6.15/arch/openrisc/boot/dts/
Dor1klitex.dts1 // SPDX-License-Identifier: GPL-2.0
3 * LiteX-based System on Chip
8 /dts-v1/;
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&pic>;
25 reg = <0x00000000 0x10000000>;
29 #address-cells = <1>;
30 #size-cells = <0>;
32 compatible = "opencores,or1200-rtlsvn481";
[all …]
/linux-6.15/arch/arm/boot/dts/marvell/
Dkirkwood-l-50.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Check Point L-50 Board Description
7 /dts-v1/;
10 #include "kirkwood-6281.dtsi"
13 model = "Check Point L-50";
14 compatible = "checkpoint,l-50", "marvell,kirkwood-88f6281", "marvell,kirkwood";
18 reg = <0x00000000 0x20000000>;
23 stdout-path = &uart0;
27 pinctrl: pin-controller@10000 {
28 pinctrl-0 = <&pmx_led38 &pmx_sysrst &pmx_button29>;
[all …]
Darmada-385-clearfog-gtr-s4.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 #include "armada-385-clearfog-gtr.dtsi"
7 compatible = "solidrun,clearfog-gtr-s4", "marvell,armada385",
12 tx-fault-gpio = <&gpio0 24 GPIO_ACTIVE_HIGH>;
16 switch0: ethernet-switch@4 {
18 reg = <4>;
19 pinctrl-names = "default";
20 pinctrl-0 = <&cf_gtr_switch_reset_pins>;
21 reset-gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
23 ethernet-ports {
[all …]
/linux-6.15/arch/arm64/boot/dts/amlogic/
Dmeson-gxl-s905x-hwacom-amazetv.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "meson-gxl-s905x.dtsi"
13 compatible = "hwacom,amazetv", "amlogic,s905x", "amlogic,meson-gxl";
22 stdout-path = "serial0:115200n8";
27 reg = <0x0 0x0 0x0 0x80000000>;
30 vddio_card: gpio-regulator {
31 compatible = "regulator-gpio";
33 regulator-name = "VDDIO_CARD";
34 regulator-min-microvolt = <1800000>;
[all …]
Dmeson-sm1-bananapi.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-sm1.dtsi"
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/gpio/meson-g12a-gpio.h>
13 adc-keys {
14 compatible = "adc-keys";
15 io-channels = <&saradc 2>;
16 io-channel-names = "buttons";
17 keyup-threshold-microvolt = <1800000>;
[all …]
/linux-6.15/Documentation/devicetree/bindings/nvmem/
Dlpc1850-otp.txt6 - compatible: Should be "nxp,lpc1850-otp"
7 - reg: Must contain an entry with the physical base address and length
8 for each entry in reg-names.
9 - address-cells: must be set to 1.
10 - size-cells: must be set to 1.
16 compatible = "nxp,lpc1850-otp";
17 reg = <0x40045000 0x1000>;
18 #address-cells = <1>;
19 #size-cells = <1>;
/linux-6.15/drivers/clk/sunxi/
Dclk-a10-codec.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 #include <linux/clk-provider.h>
17 const char *clk_name = node->name, *parent_name; in sun4i_codec_clk_setup()
18 void __iomem *reg; in sun4i_codec_clk_setup() local
20 reg = of_io_request_and_map(node, 0, of_node_full_name(node)); in sun4i_codec_clk_setup()
21 if (IS_ERR(reg)) in sun4i_codec_clk_setup()
24 of_property_read_string(node, "clock-output-names", &clk_name); in sun4i_codec_clk_setup()
28 CLK_SET_RATE_PARENT, reg, in sun4i_codec_clk_setup()
34 CLK_OF_DECLARE(sun4i_codec, "allwinner,sun4i-a10-codec-clk",

1...<<161162163164165166167168169170>>...228