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/linux-6.15/arch/arm/boot/dts/ti/omap/
Ddra7-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
8 #include "dra7-evm-common.dtsi"
9 #include "dra74x-mmc-iodelay.dtsi"
13 compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7";
17 reg = <0x0 0x80000000 0x0 0x60000000>; /* 1536 MB */
20 evm_12v0: fixedregulator-evm_12v0 {
22 compatible = "regulator-fixed";
23 regulator-name = "evm_12v0";
[all …]
/linux-6.15/arch/arm/boot/dts/gemini/
Dgemini-dlink-dir-685.dts2 * Device Tree file for D-Link DIR-685 Xtreme N Storage Router
5 /dts-v1/;
8 #include <dt-bindings/input/input.h>
11 model = "D-Link DIR-685 Xtreme N Storage Router";
12 compatible = "dlink,dir-685", "cortina,gemini";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 /* 128 MB SDRAM in 2 x Hynix HY5DU121622DTP-D43 */
19 reg = <0x00000000 0x8000000>;
24 stdout-path = "uart0:19200n8";
[all …]
/linux-6.15/Documentation/devicetree/bindings/mfd/
Drohm,bd96801-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd96801-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
13 BD96801 is an automotive grade single-chip power management IC.
15 over-/under voltage and over current detection and a watchdog.
21 reg:
36 interrupt-names:
39 - enum: [intb, errb]
[all …]
Dcirrus,madera.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cirrus Logic Madera class audio CODECs Multi-Functional Device
10 - patches@opensource.cirrus.com
23 - $ref: /schemas/pinctrl/cirrus,madera.yaml#
24 - $ref: /schemas/regulator/wlf,arizona.yaml#
25 - $ref: /schemas/sound/cirrus,madera.yaml#
26 - if:
31 - cirrus,cs47l85
[all …]
/linux-6.15/Documentation/devicetree/bindings/phy/
Dqcom,usb-snps-femto-v2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,usb-snps-femto-v2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Synopsys Femto High-Speed USB PHY V2
10 - Wesley Cheng <quic_wcheng@quicinc.com>
13 Qualcomm High-Speed USB PHY
18 - items:
19 - enum:
20 - qcom,sa8775p-usb-hs-phy
[all …]
Dqcom,qusb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Wesley Cheng <quic_wcheng@quicinc.com>
19 - items:
20 - enum:
21 - qcom,ipq5424-qusb2-phy
22 - qcom,ipq6018-qusb2-phy
23 - qcom,ipq8074-qusb2-phy
[all …]
Dnvidia,tegra194-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
/linux-6.15/Documentation/devicetree/bindings/power/supply/
Dqcom,pm8941-charger.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/supply/qcom,pm8941-charger.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Switch-Mode Battery Charger and Boost
10 - Sebastian Reichel <sre@kernel.org>
15 - qcom,pm8226-charger
16 - qcom,pm8941-charger
18 reg:
23 - description: charge done
[all …]
/linux-6.15/Documentation/devicetree/bindings/iio/frequency/
Dadi,adf4350.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
15 - adi,adf4350
16 - adi,adf4351
18 reg:
21 spi-max-frequency:
28 clock-names:
31 '#clock-cells':
[all …]
/linux-6.15/Documentation/devicetree/bindings/sound/
Dqcom,pm8916-wcd-analog-codec.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/sound/qcom,pm8916-wcd-analog-codec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Konrad Dybcio <konradybcio@kernel.org>
17 const: qcom,pm8916-wcd-analog-codec
19 reg:
25 interrupt-names:
27 - const: cdc_spk_cnp_int
28 - const: cdc_spk_clip_int
[all …]
/linux-6.15/arch/arm64/boot/dts/freescale/
Dimx8mp-verdin-dahlia.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 native-hdmi-connector {
8 compatible = "hdmi-connector";
14 remote-endpoint = <&hdmi_tx_out>;
20 compatible = "simple-audio-card";
21 simple-audio-card,bitclock-master = <&codec_dai>;
22 simple-audio-card,format = "i2s";
23 simple-audio-card,frame-master = <&codec_dai>;
24 simple-audio-card,mclk-fs = <256>;
25 simple-audio-card,name = "verdin-wm8904";
[all …]
Dimx8x-colibri-eval-v3.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 #include <dt-bindings/input/linux-event-codes.h>
15 clk16m: clock-16mhz {
16 compatible = "fixed-clock";
17 #clock-cells = <0>;
18 clock-frequency = <16000000>;
46 reg = <0x68>;
51 pinctrl-names = "default";
52 pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>,
62 reg = <0>;
[all …]
/linux-6.15/arch/arm64/boot/dts/qcom/
Dsc7180-trogdor-homestar.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "sc7180-trogdor-rt5682i-sku.dtsi"
9 #include "sc7180-trogdor-detachable.dtsi"
12 /* BOARD-SPECIFIC TOP LEVEL NODES */
14 max98360a_1: amplifier-1 {
16 #sound-dai-cells = <0>;
19 max98360a_2: amplifier-2 {
21 #sound-dai-cells = <0>;
24 max98360a_3: amplifier-3 {
26 #sound-dai-cells = <0>;
[all …]
Dsdm670-google-sargo.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device tree for Google Pixel 3a, adapted from google-blueline device tree,
4 * xiaomi-lavender device tree, and oneplus-common device tree.
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
15 #include <dt-bindings/power/qcom-rpmpd.h>
20 /delete-node/ &mpss_region;
[all …]
Dsa8540p.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 /delete-node/ &cpu0_opp_table;
10 /delete-node/ &cpu4_opp_table;
13 cpu0_opp_table: opp-table-cpu0 {
14 compatible = "operating-points-v2";
15 opp-shared;
17 opp-300000000 {
18 opp-hz = /bits/ 64 <300000000>;
19 opp-peak-kBps = <(300000 * 32)>;
21 opp-403200000 {
[all …]
/linux-6.15/arch/arm/boot/dts/allwinner/
Dsun8i-h2-plus-orangepi-zero.dts4 * Based on sun8i-h3-orangepi-one.dts, which is:
7 * This file is dual-licensed: you can use it either under the terms
46 /dts-v1/;
47 #include "sun8i-h3.dtsi"
48 #include "sunxi-common-regulators.dtsi"
50 #include <dt-bindings/gpio/gpio.h>
51 #include <dt-bindings/input/input.h>
55 compatible = "xunlong,orangepi-zero", "allwinner,sun8i-h2-plus";
59 /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
65 stdout-path = "serial0:115200n8";
[all …]
Dsun8i-v3s-anbernic-rg-nano.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include "sun8i-v3s.dtsi"
6 #include "sunxi-common-regulators.dtsi"
10 compatible = "anbernic,rg-nano", "allwinner,sun8i-v3s";
19 compatible = "pwm-backlight";
20 brightness-levels = <0 1 2 3 8 14 21 32 46 60 80 100>;
21 default-brightness-level = <11>;
22 power-supply = <&reg_vcc5v0>;
[all …]
/linux-6.15/Documentation/devicetree/bindings/pinctrl/
Dallwinner,sun4i-a10-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/allwinner,sun4i-a10-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#gpio-cells":
21 "#interrupt-cells":
30 - allwinner,sun4i-a10-pinctrl
31 - allwinner,sun5i-a10s-pinctrl
[all …]
/linux-6.15/arch/arm64/boot/dts/amd/
Damd-seattle-xgbe-b.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 compatible = "amd,xgbe-seattle-v1a";
10 reg = <0 0xe0700000 0 0x80000>,
18 amd,per-channel-interrupt;
19 amd,speed-set = <0>;
20 amd,serdes-blwc = <1>, <1>, <0>;
21 amd,serdes-cdr-rate = <2>, <2>, <7>;
22 amd,serdes-pq-skew = <10>, <10>, <18>;
23 amd,serdes-tx-amp = <0>, <0>, <0>;
24 amd,serdes-dfe-tap-config = <3>, <3>, <3>;
[all …]
/linux-6.15/Documentation/devicetree/bindings/display/bridge/
Dsil,sii9022.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Boris Brezillon <bbrezillon@kernel.org>
15 - items:
16 - enum:
17 - sil,sii9022-cpi # CEC Programming Interface
18 - sil,sii9022-tpi # Transmitter Programming Interface
19 - const: sil,sii9022
20 - const: sil,sii9022
[all …]
/linux-6.15/arch/arm/boot/dts/nxp/imx/
Dimx6ull-dhcor-som.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
6 #include <dt-bindings/clock/imx6ul-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/pwm/pwm.h>
11 #include <dt-bindings/regulator/dlg,da9063-regulator.h>
16 /delete-property/ mmc0;
17 /delete-property/ mmc1;
21 /* Appropriate memory size will be filled by U-Boot */
[all …]
/linux-6.15/arch/arm64/boot/dts/rockchip/
Drk3566-powkiddy-rgb20sx.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/linux-event-codes.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include "rk3566-powkiddy-rk2023.dtsi"
15 stdout-path = "serial2:1500000n8";
18 adc_keys: adc-keys {
19 compatible = "adc-keys";
20 io-channels = <&saradc 0>;
[all …]
/linux-6.15/Documentation/devicetree/bindings/mux/
Dadi,adg792a.txt4 - compatible : "adi,adg792a" or "adi,adg792g"
5 - #mux-control-cells : <0> if parallel (the three muxes are bound together
8 * Standard mux-controller bindings as described in mux-controller.yaml
11 - gpio-controller : if present, #gpio-cells below is required.
12 - #gpio-cells : should be <2>
13 - First cell is the GPO line number, i.e. 0 or 1
14 - Second cell is used to specify active high (0)
18 - idle-state : if present, array of states that the mux controllers will have
32 mux: mux-controller@50 {
34 reg = <0x50>;
[all …]
/linux-6.15/arch/arm/boot/dts/rockchip/
Drk3188-px3-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2016 Andy Yan <andy.yan@rock-chips.com>
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
11 model = "Rockchip PX3-EVB";
12 compatible = "rockchip,px3-evb", "rockchip,px3", "rockchip,rk3188";
20 stdout-path = "serial2:115200n8";
24 reg = <0x60000000 0x80000000>;
28 gpio-keys {
29 compatible = "gpio-keys";
[all …]
/linux-6.15/arch/arm64/boot/dts/mediatek/
Dmt8186-corsola-starmie.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "mt8186-corsola.dtsi"
10 en_pp6000_mipi_disp_150ma: en-pp6000-mipi-disp-150ma {
11 compatible = "regulator-fixed";
12 regulator-name = "en_pp6000_mipi_disp_150ma";
14 enable-active-high;
15 pinctrl-names = "default";
16 pinctrl-0 = <&en_pp6000_mipi_disp_150ma_fixed_pins>;
21 * with 6V module for enabling panel, re-using eDP GPIOs.
[all …]

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