Searched +full:reg +full:- +full:names (Results 3726 – 3750 of 5477) sorted by relevance
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/linux-6.8/arch/arm64/boot/dts/qcom/ |
D | sdm845-xiaomi-polaris.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 7 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 12 #include <dt-bindings/input/linux-event-codes.h> 13 #include <dt-bindings/sound/qcom,q6afe.h> 14 #include <dt-bindings/sound/qcom,q6asm.h> 16 #include "sdm845-wcd9340.dtsi" 25 /delete-node/ &rmtfs_mem; [all …]
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D | sdm632-motorola-ocean.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 5 /dts-v1/; 9 #include <dt-bindings/leds/common.h> 11 /delete-node/ &cont_splash_mem; 12 /delete-node/ &qseecom_mem; 17 chassis-type = "handset"; 18 qcom,msm-id = <349 0>; 19 qcom,board-id = <0x141 0xc100>; 20 qcom,pmic-id = <0x10016 0x25 0x00 0x00>; 23 compatible = "led-backlight"; [all …]
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/linux-6.8/arch/arm/boot/dts/marvell/ |
D | armada-385-clearfog-gtr-l8.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 #include "armada-385-clearfog-gtr.dtsi" 10 switch0: ethernet-switch@4 { 12 reg = <4>; 13 pinctrl-names = "default"; 14 pinctrl-0 = <&cf_gtr_switch_reset_pins>; 15 reset-gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; 17 ethernet-ports { 18 #address-cells = <1>; 19 #size-cells = <0>; [all …]
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/linux-6.8/arch/arm64/boot/dts/rockchip/ |
D | rk3399-gru.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * Copyright 2016-2017 Google, Inc 8 #include <dt-bindings/input/input.h> 10 #include "rk3399-op1-opp.dtsi" 19 stdout-path = "serial2:115200n8"; 28 * - Rails that only connect to the EC (or devices that the EC talks to) 30 * - Rails _are_ included if the rails go to the AP even if the AP 39 * - The EC controls the enable and the EC always enables a rail as 41 * - The rails are actually connected to each other by a jumper and 46 ppvar_sys: ppvar-sys { [all …]
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/linux-6.8/Documentation/devicetree/bindings/mfd/ |
D | cirrus,lochnagar.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - patches@opensource.cirrus.com 15 Logic devices on mini-cards, as well as allowing connection of 25 [2] include/dt-bindings/pinctrl/lochnagar.h 26 [3] include/dt-bindings/clock/lochnagar.h 28 And these documents for the required sub-node binding details: 35 - if: 39 - cirrus,lochnagar2 [all …]
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/linux-6.8/arch/arm64/boot/dts/hisilicon/ |
D | hip05.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 compatible = "hisilicon,hip05-d02"; 12 interrupt-parent = <&gic>; 13 #address-cells = <2>; 14 #size-cells = <2>; 17 compatible = "arm,psci-0.2"; 22 #address-cells = <1>; 23 #size-cells = <0>; 25 cpu-map { [all …]
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/linux-6.8/arch/arm/boot/dts/arm/ |
D | mps2.dtsi | 6 * This file is dual-licensed: you can use it either under the terms 45 #include "../armv7-m.dtsi" 48 #address-cells = <1>; 49 #size-cells = <1>; 51 oscclk0: clk-osc0 { 52 compatible = "fixed-clock"; 53 #clock-cells = <0>; 54 clock-frequency = <50000000>; 57 oscclk1: clk-osc1 { 58 compatible = "fixed-clock"; [all …]
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/linux-6.8/arch/arm64/boot/dts/mediatek/ |
D | mt2712-evb.dts | 5 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 14 chassis-type = "embedded"; 15 compatible = "mediatek,mt2712-evb", "mediatek,mt2712"; 23 reg = <0 0x40000000 0 0x80000000>; 27 stdout-path = "serial0:921600n8"; 30 cpus_fixed_vproc0: regulator-vproc-buck0 { 31 compatible = "regulator-fixed"; 32 regulator-name = "vproc_buck0"; [all …]
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/linux-6.8/arch/arm64/boot/dts/nvidia/ |
D | tegra234-p3740-0002.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/sound/rt5640.h> 6 compatible = "nvidia,p3740-0002"; 15 dai-format = "i2s"; 16 remote-endpoint = <&rt5640_ep>; 26 bitclock-master; 27 frame-master; 36 rt5640: audio-codec@1c { 38 reg = <0x1c>; 39 interrupt-parent = <&gpio>; [all …]
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D | tegra210-p2371-2180.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include "tegra210-p2180.dtsi" 5 #include "tegra210-p2597.dtsi" 9 compatible = "nvidia,p2371-2180", "nvidia,tegra210"; 14 hvddio-pex-supply = <&vdd_1v8>; 15 dvddio-pex-supply = <&vdd_pex_1v05>; 16 vddio-pex-ctl-supply = <&vdd_1v8>; 19 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>, 20 <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>, [all …]
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/linux-6.8/arch/arm/boot/dts/ti/omap/ |
D | omap4-duovero-parlor.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 5 /dts-v1/; 7 #include "omap4-duovero.dtsi" 9 #include <dt-bindings/input/input.h> 13 compatible = "gumstix,omap4-duovero-parlor", "gumstix,omap4-duovero", "ti,omap4430", "ti,omap4"; 20 compatible = "gpio-leds"; 24 linux,default-trigger = "heartbeat"; 29 compatible = "gpio-keys"; 30 #address-cells = <1>; 31 #size-cells = <0>; [all …]
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/linux-6.8/arch/arm/boot/dts/allwinner/ |
D | sun7i-a20-orangepi.dts | 6 * This file is dual-licensed: you can use it either under the terms 45 /dts-v1/; 46 #include "sun7i-a20.dtsi" 47 #include "sunxi-common-regulators.dtsi" 49 #include <dt-bindings/gpio/gpio.h> 50 #include <dt-bindings/interrupt-controller/irq.h> 54 compatible = "xunlong,orangepi", "allwinner,sun7i-a20"; 61 stdout-path = "serial0:115200n8"; 65 compatible = "gpio-leds"; 73 reg_gmac_3v3: gmac-3v3 { [all …]
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D | sun7i-a20-pcduino3-nano.dts | 2 * Copyright 2015-2020 Adam Sampson <ats@offog.org> 4 * This file is dual-licensed: you can use it either under the terms 43 /dts-v1/; 44 #include "sun7i-a20.dtsi" 45 #include "sunxi-common-regulators.dtsi" 46 #include <dt-bindings/gpio/gpio.h> 47 #include <dt-bindings/interrupt-controller/arm-gic.h> 51 compatible = "linksprite,pcduino3-nano", "allwinner,sun7i-a20"; 58 stdout-path = "serial0:115200n8"; 61 hdmi-connector { [all …]
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D | sun7i-a20-pcduino3.dts | 5 * This file is dual-licensed: you can use it either under the terms 44 /dts-v1/; 45 #include "sun7i-a20.dtsi" 46 #include "sunxi-common-regulators.dtsi" 48 #include <dt-bindings/gpio/gpio.h> 49 #include <dt-bindings/input/input.h> 50 #include <dt-bindings/interrupt-controller/irq.h> 54 compatible = "linksprite,pcduino3", "allwinner,sun7i-a20"; 61 stdout-path = "serial0:115200n8"; 65 compatible = "gpio-leds"; [all …]
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D | sun7i-a20-cubieboard2.dts | 4 * Maxime Ripard <maxime.ripard@free-electrons.com> 6 * This file is dual-licensed: you can use it either under the terms 45 /dts-v1/; 46 #include "sun7i-a20.dtsi" 47 #include "sunxi-common-regulators.dtsi" 49 #include <dt-bindings/gpio/gpio.h> 50 #include <dt-bindings/interrupt-controller/irq.h> 54 compatible = "cubietech,cubieboard2", "allwinner,sun7i-a20"; 61 stdout-path = "serial0:115200n8"; 64 hdmi-connector { [all …]
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D | sun7i-a20-olinuxino-lime2.dts | 2 * Copyright 2014 - Iain Paton <ipaton0@gmail.com> 4 * This file is dual-licensed: you can use it either under the terms 43 /dts-v1/; 44 #include "sun7i-a20.dtsi" 45 #include "sunxi-common-regulators.dtsi" 47 #include <dt-bindings/gpio/gpio.h> 48 #include <dt-bindings/interrupt-controller/irq.h> 51 model = "Olimex A20-OLinuXino-LIME2"; 52 compatible = "olimex,a20-olinuxino-lime2", "allwinner,sun7i-a20"; 59 stdout-path = "serial0:115200n8"; [all …]
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/linux-6.8/Documentation/devicetree/bindings/rng/ |
D | omap_rng.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: OMAP SoC and Inside-Secure HWRNG Module 10 - Jayesh Choudhary <j-choudhary@ti.com> 15 - ti,omap2-rng 16 - ti,omap4-rng 17 - inside-secure,safexcel-eip76 24 reg: 33 - description: EIP150 gateable clock [all …]
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/linux-6.8/arch/powerpc/boot/dts/fsl/ |
D | qoriq-fman3-0-10g-3.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later 6 * Copyright 2012 - 2015 Freescale Semiconductor Inc. 11 cell-index = <0x9>; 12 compatible = "fsl,fman-v3-port-rx"; 13 reg = <0x89000 0x1000>; 14 fsl,fman-10g-port; 18 cell-index = <0x29>; 19 compatible = "fsl,fman-v3-port-tx"; 20 reg = <0xa9000 0x1000>; 21 fsl,fman-10g-port; [all …]
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D | qoriq-fman3-0-10g-2.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later 6 * Copyright 2012 - 2015 Freescale Semiconductor Inc. 11 cell-index = <0x8>; 12 compatible = "fsl,fman-v3-port-rx"; 13 reg = <0x88000 0x1000>; 14 fsl,fman-10g-port; 18 cell-index = <0x28>; 19 compatible = "fsl,fman-v3-port-tx"; 20 reg = <0xa8000 0x1000>; 21 fsl,fman-10g-port; [all …]
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/linux-6.8/arch/arm/boot/dts/microchip/ |
D | at91-linea.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91-linea.dtsi - Device Tree Include file for the Axentia Linea Module. 17 reg = <0x20000000 0x4000000>; 22 clock-frequency = <32768>; 26 clock-frequency = <12000000>; 31 compatible = "atmel,tcb-timer"; 32 reg = <0>; 36 compatible = "atmel,tcb-timer"; 37 reg = <1>; 46 reg = <0x51>; [all …]
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D | tny_a9260_common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * tny_a9260_common.dtsi - Device Tree file for Caloa TNY A926x board 5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 14 reg = <0x20000000 0x4000000>; 19 clock-frequency = <32768>; 23 clock-frequency = <12000000>; 31 compatible = "atmel,tcb-timer"; 32 reg = <0>, <1>; 36 compatible = "atmel,tcb-timer"; 37 reg = <2>; [all …]
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/linux-6.8/Documentation/devicetree/bindings/media/i2c/ |
D | mt9m111.txt | 4 array size of 1280H x 1024V. It is programmable through a simple two-wire serial 8 - compatible: value should be "micron,mt9m111" 9 - clocks: reference to the master clock. 10 - clock-names: shall be "mclk". 13 sub-node for its digital output video port, in accordance with the video 15 Documentation/devicetree/bindings/media/video-interfaces.txt 18 - pclk-sample: For information see ../video-interfaces.txt. The value is set to 26 reg = <0x5d>; 28 clock-names = "mclk"; 32 remote-endpoint = <&pxa_camera>; [all …]
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/linux-6.8/Documentation/devicetree/bindings/auxdisplay/ |
D | arm,versatile-lcd.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/auxdisplay/arm,versatile-lcd.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Linus Walleij <linus.walleij@linaro.org> 11 - Rob Herring <robh@kernel.org> 19 const: arm,versatile-lcd 21 reg: 27 clock-names: 34 - compatible [all …]
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/linux-6.8/Documentation/devicetree/bindings/nvmem/ |
D | sc27xx-efuse.txt | 4 - compatible: Should be one of the following. 5 "sprd,sc2720-efuse" 6 "sprd,sc2721-efuse" 7 "sprd,sc2723-efuse" 8 "sprd,sc2730-efuse" 9 "sprd,sc2731-efuse" 10 - reg: Specify the address offset of efuse controller. 11 - hwlocks: Reference to a phandle of a hwlock provider node. 21 reg = <0>; 22 spi-max-frequency = <26000000>; [all …]
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/linux-6.8/Documentation/devicetree/bindings/phy/ |
D | brcm,sr-pcie-phy.txt | 4 - compatible: must be "brcm,sr-pcie-phy" 5 - reg: base address and length of the PCIe SS register space 6 - brcm,sr-cdru: phandle to the CDRU syscon node 7 - brcm,sr-mhb: phandle to the MHB syscon node 8 - #phy-cells: Must be 1, denotes the PHY index 17 compatible = "brcm,sr-mhb", "syscon"; 18 reg = <0 0x60401000 0 0x38c>; 22 compatible = "brcm,sr-cdru", "syscon"; 23 reg = <0 0x6641d000 0 0x400>; 27 compatible = "brcm,sr-pcie-phy"; [all …]
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