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/linux-6.15/arch/arm64/boot/dts/qcom/
Dsc7280-herobrine-audio-rt5682-3mic.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /* BOARD-SPECIFIC TOP LEVEL NODES */
13 compatible = "google,sc7280-herobrine";
14 model = "sc7280-rt5682-max98360a-3mic";
16 audio-routing = "VA DMIC0", "vdd-micb",
17 "VA DMIC1", "vdd-micb",
18 "VA DMIC2", "vdd-micb",
19 "VA DMIC3", "vdd-micb",
24 #address-cells = <1>;
25 #size-cells = <0>;
[all …]
Dmsm8996pro-xiaomi-natrium.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
9 #include "msm8996-xiaomi-common.dtsi"
11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h>
17 chassis-type = "handset";
18 qcom,msm-id = <305 0x10000>;
19 qcom,board-id = <47 0>;
23 firmware-name = "qcom/msm8996/natrium/adsp.mbn";
28 compatible = "syna,rmi4-i2c";
[all …]
/linux-6.15/arch/arm/boot/dts/nxp/imx/
Dimx6ull-seeed-npi-dev-board.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/gpio/gpio.h>
11 stdout-path = &uart1;
14 gpio_buttons: gpio-keys {
15 compatible = "gpio-keys";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_button>;
19 button-0 {
23 wakeup-source;
27 gpio-leds {
[all …]
Dimx6q-skov-revc-lt6.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
7 #include "imx6qdl-skov-cpu.dtsi"
8 #include "imx6qdl-skov-cpu-revc.dtsi"
12 compatible = "skov,imx6q-skov-revc-lt6", "fsl,imx6q";
15 compatible = "pwm-backlight";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_backlight>;
18 enable-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>;
20 brightness-levels = <0 255>;
[all …]
/linux-6.15/Documentation/devicetree/bindings/pci/
Dsnps,dw-pcie-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
20 reg:
23 Interface - DBI. In accordance with the reference manual the register
24 configuration space belongs to the Configuration-Dependent Module (CDM)
25 and is split up into several sub-parts Standard PCIe configuration
[all …]
/linux-6.15/arch/arm/boot/dts/qcom/
Dqcom-msm8226-samsung-ms013g.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 /dts-v1/;
5 #include "qcom-msm8226.dtsi"
8 /delete-node/ &smem_region;
13 chassis-type = "handset";
22 stdout-path = "serial0:115200n8";
25 gpio-hall-sensor {
26 compatible = "gpio-keys";
28 pinctrl-0 = <&gpio_hall_sensor_default>;
29 pinctrl-names = "default";
[all …]
/linux-6.15/Documentation/devicetree/bindings/mfd/
Dhi6421.txt1 * HI6421 Multi-Functional Device (MFD), by HiSilicon Ltd.
4 - compatible : One of the following chip-specific strings:
5 "hisilicon,hi6421-pmic";
6 "hisilicon,hi6421v530-pmic";
7 - reg : register range space of hi6421;
9 Supported Hi6421 sub-devices include:
11 Device IRQ Names Supply Names Description
12 ------ --------- ------------ -----------
20 compatible = "hisilicon,hi6421-pmic";
21 reg = <0xfcc00000 0x0180>; /* 0x60 << 2 */
[all …]
Dmotorola-cpcap.txt4 - compatible : One or both of "motorola,cpcap" or "ste,6556002"
5 - reg : SPI chip select
6 - interrupts : The interrupt line the device is connected to
7 - interrupt-controller : Marks the device node as an interrupt controller
8 - #interrupt-cells : The number of cells to describe an IRQ, should be 2
9 - #address-cells : Child device offset number of cells, should be 1
10 - #size-cells : Child device size number of cells, should be 0
11 - spi-max-frequency : Typically set to 3000000
12 - spi-cs-high : SPI chip select direction
16 The sub-functions of CPCAP get their own node with their own compatible values,
[all …]
/linux-6.15/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra210-csi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra210-csi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^csi@[0-9a-f]+$"
19 - nvidia,tegra210-csi
21 reg:
26 - description: module clock
[all …]
Dnvidia,tegra186-dsi-padctl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra186-dsi-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^padctl@[0-9a-f]+$"
18 const: nvidia,tegra186-dsi-padctl
20 reg:
25 - description: module reset
[all …]
/linux-6.15/Documentation/devicetree/bindings/leds/backlight/
Dqcom-wled.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/backlight/qcom-wled.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Kiran Gunda <quic_kgunda@quicinc.com>
21 - qcom,pm8941-wled
22 - qcom,pmi8950-wled
23 - qcom,pmi8994-wled
24 - qcom,pmi8998-wled
[all …]
/linux-6.15/arch/arm64/boot/dts/rockchip/
Drk3399-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/pwm/pwm.h>
8 #include "rk3399-base.dtsi"
12 compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
20 compatible = "pwm-backlight";
21 brightness-levels = <
54 default-brightness-level = <200>;
58 edp_panel: edp-panel {
59 compatible = "lg,lp079qx1-sp0v";
[all …]
Drk3588-armsom-w3.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
7 #include "rk3588-armsom-lm7.dtsi"
18 analog-sound {
19 compatible = "audio-graph-card";
20 label = "rk3588-es8316";
30 hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
31 pinctrl-names = "default";
[all …]
Drk3399-rock-pi-4.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pwm/pwm.h>
19 stdout-path = "serial2:1500000n8";
22 clkin_gmac: external-gmac-clock {
23 compatible = "fixed-clock";
24 clock-frequency = <125000000>;
25 clock-output-names = "clkin_gmac";
26 #clock-cells = <0>;
[all …]
/linux-6.15/arch/arm64/boot/dts/allwinner/
Dsun50i-a64-pinetab.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "sun50i-a64.dtsi"
10 #include "sun50i-a64-cpu-opp.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/pwm/pwm.h>
18 compatible = "pine64,pinetab", "allwinner,sun50i-a64";
19 chassis-type = "tablet";
27 compatible = "pwm-backlight";
[all …]
/linux-6.15/Documentation/devicetree/bindings/input/touchscreen/
Dsis_i2c.txt4 - compatible: must be "sis,9200-ts"
5 - reg: i2c slave address
6 - interrupts: touch controller interrupt (see interrupt
10 - pinctrl-names: should be "default" (see pinctrl binding [1]).
11 - pinctrl-0: a phandle pointing to the pin settings for the
13 - attn-gpios: the gpio pin used as attention line
14 - reset-gpios: the gpio pin used to reset the controller
15 - wakeup-source: touchscreen can be used as a wakeup source
17 [0]: Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
18 [1]: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
[all …]
/linux-6.15/arch/arm/boot/dts/nxp/mxs/
Dimx28-eukrea-mbmx287lc.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include "imx28-eukrea-mbmx283lc.dts"
19 reg = <0x40000000 0x08000000>;
24 phy-mode = "rmii";
25 pinctrl-names = "default";
26 pinctrl-0 = <&mac1_pins_a>;
27 phy-reset-gpios = <&gpio3 27 GPIO_ACTIVE_LOW>;
32 pinctrl-names = "default";
33 pinctrl-0 = <&hog_pins_cpuimx283 &hog_pins_cpuimx287>;
34 hog_pins_cpuimx287: hog-cpuimx287@0 {
[all …]
/linux-6.15/Documentation/devicetree/bindings/display/
Dfsl,dcu.txt4 - compatible: Should be one of
5 * "fsl,ls1021a-dcu".
6 * "fsl,vf610-dcu".
8 - reg: Address and length of the register set for dcu.
9 - clocks: Handle to "dcu" and "pix" clock (in the order below)
11 See ../clocks/clock-bindings.txt for details.
12 - clock-names: Should be "dcu" and "pix"
13 See ../clocks/clock-bindings.txt for details.
14 - big-endian Boolean property, LS1021A DCU registers are big-endian.
15 - port Video port for the panel output
[all …]
/linux-6.15/arch/arm/boot/dts/amlogic/
Dmeson8m2.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
14 compatible = "amlogic,meson8m2-clkc", "amlogic,meson8-clkc";
19 /delete-node/ video-lut@20;
21 canvas: video-lut@48 {
22 compatible = "amlogic,meson8m2-canvas", "amlogic,canvas";
23 reg = <0x48 0x14>;
28 compatible = "amlogic,meson8m2-dwmac", "snps,dwmac";
29 reg = <0xc9410000 0x10000
35 clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
37 reset-names = "stmmaceth";
[all …]
/linux-6.15/Documentation/devicetree/bindings/timer/
Dfaraday,fttmr010.txt8 - compatible : Must be one of
10 "cortina,gemini-timer", "faraday,fttmr010"
11 "moxa,moxart-timer", "faraday,fttmr010"
12 "aspeed,ast2400-timer"
13 "aspeed,ast2500-timer"
14 "aspeed,ast2600-timer"
16 - reg : Should contain registers location and length
17 - interrupts : Should contain the three timer interrupts usually with
22 - clocks : a clock to provide the tick rate for "faraday,fttmr010"
23 - clock-names : should be "EXTCLK" and "PCLK" for the external tick timer
[all …]
/linux-6.15/arch/arm64/boot/dts/broadcom/stingray/
Dbcm958742k.dts4 * Copyright(c) 2016-2017 Broadcom. All rights reserved.
16 * * Neither the name of Broadcom nor the names of its
33 /dts-v1/;
35 #include "bcm958742-base.dtsi"
43 enet-phy-lane-swap;
47 mmc-ddr-1_8v;
59 pinctrl-0 = <&spi0_pins>;
60 pinctrl-names = "default";
61 cs-gpios = <&gpio_hsls 34 0>;
65 compatible = "jedec,spi-nor";
[all …]
/linux-6.15/arch/arm/boot/dts/st/
Dstih407-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "st-pincfg.h"
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 /* 0-5: PIO_SBC */
18 /* 10-19: PIO_FRONT0 */
31 /* 30-35: PIO_REAR */
38 /* 40-42: PIO_FLASH */
45 pin-controller-sbc@961f080 {
46 #address-cells = <1>;
47 #size-cells = <1>;
[all …]
/linux-6.15/Documentation/devicetree/bindings/dma/ti/
Dk3-udma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
5 ---
6 $id: http://devicetree.org/schemas/dma/ti/k3-udma.yaml#
7 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Peter Ujfalusi <peter.ujfalusi@gmail.com>
15 The UDMA-P is intended to perform similar (but significantly upgraded)
16 functions as the packet-oriented DMA used on previous SoC devices. The UDMA-P
18 The UDMA-P architecture facilitates the segmentation and reassembly of SoC DMA
29 on the Rx PSI-L interface.
31 The UDMA-P also supports acting as both a UTC and UDMA-C for its internal
[all …]
Dk3-pktdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
5 ---
6 $id: http://devicetree.org/schemas/dma/ti/k3-pktdma.yaml#
7 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Peter Ujfalusi <peter.ujfalusi@gmail.com>
16 mode channels of K3 UDMA-P.
17 PKTDMA only includes Split channels to service PSI-L based peripherals.
19 The peripherals can be PSI-L native or legacy, non PSI-L native peripherals
20 with PDMAs. PDMA is tasked to act as a bridge between the PSI-L fabric and the
27 - $ref: /schemas/dma/dma-controller.yaml#
[all …]
/linux-6.15/Documentation/devicetree/bindings/pinctrl/
Dmediatek,mt6795-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt6795-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
11 - Sean Wang <sean.wang@kernel.org>
18 const: mediatek,mt6795-pinctrl
20 gpio-controller: true
22 '#gpio-cells':
29 gpio-ranges:
[all …]

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