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/linux-6.8/Documentation/devicetree/bindings/clock/
Drockchip,rk3288-cru.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 ---
4 $id: http://devicetree.org/schemas/clock/rockchip,rk3288-cru.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
19 different so another dt-compatible is available. Noticed that it is only
25 preprocessor macros in the dt-bindings/clock/rk3288-cru.h headers and can be
31 clock-output-names:
32 - "xin24m" - crystal input - required,
[all …]
/linux-6.8/Documentation/devicetree/bindings/iommu/
Darm,smmu-v3.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/iommu/arm,smmu-v3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Will Deacon <will@kernel.org>
11 - Robin Murphy <Robin.Murphy@arm.com>
15 revisions, replacing the MMIO register interface with in-memory command
21 pattern: "^iommu@[0-9a-f]*"
23 const: arm,smmu-v3
25 reg:
[all …]
/linux-6.8/arch/arm64/boot/dts/mediatek/
Dmt8183-evb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
14 chassis-type = "embedded";
15 compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
23 reg = <0 0x40000000 0 0x80000000>;
27 stdout-path = "serial0:921600n8";
30 reserved-memory {
31 #address-cells = <2>;
32 #size-cells = <2>;
35 compatible = "shared-dma-pool";
[all …]
/linux-6.8/Documentation/devicetree/bindings/media/
Dqcom,sc7280-venus.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sc7280-venus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stanimir Varbanov <stanimir.varbanov@linaro.org>
17 - $ref: qcom,venus-common.yaml#
21 const: qcom,sc7280-venus
23 power-domains:
27 power-domain-names:
30 - const: venus
[all …]
Dqcom,sc7180-venus.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sc7180-venus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stanimir Varbanov <stanimir.varbanov@linaro.org>
17 - $ref: qcom,venus-common.yaml#
21 const: qcom,sc7180-venus
23 power-domains:
27 power-domain-names:
30 - const: venus
[all …]
/linux-6.8/arch/arm/boot/dts/st/
Dstm32mp157c-odyssey.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 /dts-v1/;
8 #include "stm32mp157c-odyssey-som.dtsi"
11 model = "Seeed Studio Odyssey-STM32MP157C Board";
12 compatible = "seeed,stm32mp157c-odyssey",
13 "seeed,stm32mp157c-odyssey-som", "st,stm32mp157";
21 stdout-path = "serial0:115200n8";
26 pinctrl-names = "default", "sleep";
27 pinctrl-0 = <&dcmi_pins_b>;
28 pinctrl-1 = <&dcmi_sleep_pins_b>;
[all …]
/linux-6.8/Documentation/devicetree/bindings/dma/
Dbrcm,bcm2835-dma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/brcm,bcm2835-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nicolas Saenz Julienne <nsaenz@kernel.org>
19 - $ref: dma-controller.yaml#
23 const: brcm,bcm2835-dma
25 reg:
35 interrupt-names:
39 '#dma-cells':
[all …]
/linux-6.8/arch/arm/boot/dts/gemini/
Dgemini-ns2502.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
12 model = "Edimax NS-2502";
13 compatible = "edimax,ns-2502", "cortina,gemini";
14 #address-cells = <1>;
15 #size-cells = <1>;
20 reg = <0x00000000 0x8000000>;
24 mdio-gpio0 = &mdio0;
29 stdout-path = &uart0;
33 compatible = "virtual,mdio-gpio";
[all …]
/linux-6.8/Documentation/devicetree/bindings/mux/
Dmux-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mux/mux-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Rosin <peda@axentia.se>
20 space is a simple zero-based enumeration. I.e. 0-1 for a 2-way multiplexer,
21 0-7 for an 8-way multiplexer, etc.
25 --------------------
28 specifier using the '#mux-control-cells' or '#mux-state-cells' property.
29 The value of '#mux-state-cells' will always be one greater than the value
[all …]
/linux-6.8/Documentation/devicetree/bindings/pinctrl/
Dmediatek,mt8188-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8188-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hui Liu <hui.liu@mediatek.com>
17 const: mediatek,mt8188-pinctrl
19 gpio-controller: true
21 '#gpio-cells':
25 are defined in <dt-bindings/gpio/gpio.h>.
28 gpio-ranges:
[all …]
/linux-6.8/arch/arm64/boot/dts/qcom/
Dsc8280xp-pmics.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/spmi/spmi.h>
11 thermal-zones {
12 pm8280_1_thermal: pm8280-1-thermal {
13 polling-delay-passive = <100>;
14 polling-delay = <0>;
15 thermal-sensors = <&pm8280_1_temp_alarm>;
32 pm8280_2_thermal: pm8280-2-thermal {
[all …]
Dmsm8953-motorola-potter.dts1 // SPDX-License-Identifier: BSD-3-Clause
5 /dts-v1/;
11 /delete-node/ &cont_splash_mem;
12 /delete-node/ &qseecom_mem;
17 chassis-type = "handset";
18 qcom,msm-id = <293 0>;
19 qcom,board-id = <0x46 0x83a0>;
22 #address-cells = <2>;
23 #size-cells = <2>;
27 compatible = "simple-framebuffer";
[all …]
/linux-6.8/arch/arm/boot/dts/broadcom/
Dbcm958625k.dts16 * * Neither the name of Broadcom Corporation nor the names of its
33 /dts-v1/;
35 #include "bcm-nsp.dtsi"
42 stdout-path = "serial0:115200n8";
47 reg = <0x60000000 0x80000000>;
74 reg = <0>;
75 nand-on-flash-bbt;
77 #address-cells = <1>;
78 #size-cells = <1>;
80 nand-ecc-strength = <24>;
[all …]
/linux-6.8/Documentation/devicetree/bindings/usb/
Drockchip,rk3399-dwc3.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/rockchip,rk3399-dwc3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
14 const: rockchip,rk3399-dwc3
16 '#address-cells':
19 '#size-cells':
26 - description:
28 - description:
[all …]
/linux-6.8/arch/arm64/boot/dts/ti/
Dk3-j721e-som-p0.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2019-2020 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include "k3-j721e.dtsi"
16 reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
20 reserved_memory: reserved-memory {
21 #address-cells = <2>;
22 #size-cells = <2>;
26 reg = <0x00 0x9e800000 0x00 0x01800000>;
28 no-map;
[all …]
/linux-6.8/Documentation/devicetree/bindings/phy/
Drockchip-emmc-phy.txt2 -----------------------
5 - compatible: rockchip,rk3399-emmc-phy
6 - #phy-cells: must be 0
7 - reg: PHY register address offset and length in "general
11 - clock-names: Should contain "emmcclk". Although this is listed as optional
14 See ../clock/clock-bindings.txt for details.
15 - clocks: Should have a phandle to the card clock exported by the SDHCI driver.
16 - drive-impedance-ohm: Specifies the drive impedance in Ohm.
19 - rockchip,enable-strobe-pulldown: Enable internal pull-down for the strobe
20 line. If not set, pull-down is not used.
[all …]
/linux-6.8/Documentation/devicetree/bindings/clock/st/
Dst,quadfs.txt10 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
13 - compatible : shall be:
15 "st,quadfs-d0"
16 "st,quadfs-d2"
17 "st,quadfs-d3"
18 "st,quadfs-pll"
21 - #clock-cells : from common clock binding; shall be set to 1.
23 - reg : A Base address and length of the register set.
25 - clocks : from common clock binding
27 - clock-output-names : From common clock binding. The block has 4
[all …]
/linux-6.8/Documentation/devicetree/bindings/clock/ti/davinci/
Dda8xx-cfgchip.txt1 Binding for TI DA8XX/OMAP-L13X/AM17XX/AM18XX CFGCHIP clocks
3 TI DA8XX/OMAP-L13X/AM17XX/AM18XX SoCs contain a general purpose set of
8 (compatible = "ti,da830-cfgchip").
11 --------------
13 - compatible: shall be "ti,da830-usb-phy-clocks".
14 - #clock-cells: from common clock binding; shall be set to 1.
15 - clocks: phandles to the parent clocks corresponding to clock-names
16 - clock-names: shall be "fck", "usb_refclkin", "auxclk"
22 ------------------------------
24 - compatible: shall be "ti,da830-tbclksync".
[all …]
/linux-6.8/arch/arm/boot/dts/nxp/mxs/
Dimx28-duckbill-2-spi.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2015-2017 I2SE GmbH <info@i2se.com>
7 /dts-v1/;
8 #include "imx28-duckbill-2.dts"
12 compatible = "i2se,duckbill-2-spi", "i2se,duckbill-2", "fsl,imx28";
29 reg = <0>;
30 fsl,pinmux-ids = <
38 fsl,drive-strength = <MXS_DRIVE_4mA>;
40 fsl,pull-up = <MXS_PULL_DISABLE>;
45 compatible = "fsl,imx28-spi";
[all …]
/linux-6.8/Documentation/devicetree/bindings/sound/
Dda7213.txt6 - compatible : Should be "dlg,da7212" or "dlg,da7213"
7 - reg: Specifies the I2C slave address
10 - clocks : phandle and clock specifier for codec MCLK.
11 - clock-names : Clock name string for 'clocks' attribute, should be "mclk".
13 - dlg,micbias1-lvl : Voltage (mV) for Mic Bias 1
15 - dlg,micbias2-lvl : Voltage (mV) for Mic Bias 2
17 - dlg,dmic-data-sel : DMIC channel select based on clock edge.
19 - dlg,dmic-samplephase : When to sample audio from DMIC.
21 - dlg,dmic-clkrate : DMIC clock frequency (Hz).
24 - VDDA-supply : Regulator phandle for Analogue power supply
[all …]
/linux-6.8/arch/arm/boot/dts/ti/omap/
Ddra62x-j5eco-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
2 /dts-v1/;
5 #include <dt-bindings/interrupt-controller/irq.h>
9 compatible = "ti,dra62x-j5eco-evm", "ti,dra62x", "ti,dm8148", "ti,dm814";
13 reg = <0x80000000 0x40000000>; /* 1 GB */
18 compatible = "regulator-fixed";
19 regulator-name = "vmmcsd_fixed";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
26 phy-handle = <&ethphy0>;
[all …]
/linux-6.8/arch/arm/boot/dts/microchip/
Dat91sam9g25ek.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9g25ek.dts - Device Tree file for AT91SAM9G25-EK board
8 /dts-v1/;
13 model = "Atmel AT91SAM9G25-EK";
20 reg = <0x30>;
21 pinctrl-names = "default";
22 pinctrl-0 = <&pinctrl_pck0_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>;
23 resetb-gpios = <&pioA 7 GPIO_ACTIVE_LOW>;
24 pwdn-gpios = <&pioA 13 GPIO_ACTIVE_HIGH>;
26 clock-names = "xvclk";
[all …]
/linux-6.8/Documentation/devicetree/bindings/arm/cpu-enable-method/
Dnuvoton,npcm750-smp2 Secondary CPU enable-method "nuvoton,npcm750-smp" binding
5 To apply to all CPUs, a single "nuvoton,npcm750-smp" enable method should be
8 Enable method name: "nuvoton,npcm750-smp"
10 Compatible CPUs: "arm,cortex-a9"
14 This enable method needs valid nodes compatible with "arm,cortex-a9-scu" and
15 "nuvoton,npcm750-gcr".
20 #address-cells = <1>;
21 #size-cells = <0>;
22 enable-method = "nuvoton,npcm750-smp";
26 compatible = "arm,cortex-a9";
[all …]
/linux-6.8/Documentation/devicetree/bindings/pwm/
Dpwm-sprd.txt6 - compatible : Should be "sprd,ums512-pwm".
7 - reg: Physical base address and length of the controller's registers.
8 - clocks: The phandle and specifier referencing the controller's clocks.
9 - clock-names: Should contain following entries:
12 - #pwm-cells: Should be 2. See pwm.yaml in this directory for a description of
16 - assigned-clocks: Reference to the PWM clock entries.
17 - assigned-clock-parents: The phandle of the parent clock of PWM clock.
21 compatible = "sprd,ums512-pwm";
22 reg = <0 0x32260000 0 0x10000>;
23 clock-names = "pwm0", "enable0",
[all …]
/linux-6.8/Documentation/devicetree/bindings/display/mediatek/
Dmediatek,merge.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
14 Mediatek display merge, namely MERGE, is used to merge two slice-per-line
15 inputs into one side-by-side output.
24 - enum:
25 - mediatek,mt8173-disp-merge
26 - mediatek,mt8195-disp-merge
[all …]

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