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/linux-6.8/Documentation/devicetree/bindings/leds/backlight/
Dqcom-wled.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/backlight/qcom-wled.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
11 - Kiran Gunda <kgunda@codeaurora.org>
21 - qcom,pm8941-wled
22 - qcom,pmi8950-wled
23 - qcom,pmi8994-wled
24 - qcom,pmi8998-wled
[all …]
/linux-6.8/arch/arm/boot/dts/aspeed/
Daspeed-bmc-asrock-e3c246d4i.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 compatible = "asrock,e3c246d4i-bmc", "aspeed,ast2500";
18 stdout-path = &uart5;
23 reg = <0x80000000 0x20000000>;
27 compatible = "gpio-leds";
[all …]
Daspeed-bmc-facebook-minerva-cmc.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
11 compatible = "facebook,minerva-cmc", "aspeed,ast2600";
18 stdout-path = "serial5:57600n8";
23 reg = <0x80000000 0x80000000>;
26 iio-hwmon {
27 compatible = "iio-hwmon";
[all …]
/linux-6.8/arch/arm/boot/dts/st/
Dstih407-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "st-pincfg.h"
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 /* 0-5: PIO_SBC */
18 /* 10-19: PIO_FRONT0 */
31 /* 30-35: PIO_REAR */
38 /* 40-42: PIO_FLASH */
45 pin-controller-sbc@961f080 {
46 #address-cells = <1>;
47 #size-cells = <1>;
[all …]
/linux-6.8/arch/arm64/boot/dts/freescale/
Dimx8dxl.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/imx8-clock.h>
7 #include <dt-bindings/firmware/imx/rsrc.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/pinctrl/pads-imx8dxl.h>
12 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
[all …]
/linux-6.8/Documentation/devicetree/bindings/dma/ti/
Dk3-udma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
5 ---
6 $id: http://devicetree.org/schemas/dma/ti/k3-udma.yaml#
7 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Peter Ujfalusi <peter.ujfalusi@gmail.com>
15 The UDMA-P is intended to perform similar (but significantly upgraded)
16 functions as the packet-oriented DMA used on previous SoC devices. The UDMA-P
18 The UDMA-P architecture facilitates the segmentation and reassembly of SoC DMA
29 on the Rx PSI-L interface.
31 The UDMA-P also supports acting as both a UTC and UDMA-C for its internal
[all …]
Dk3-pktdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
5 ---
6 $id: http://devicetree.org/schemas/dma/ti/k3-pktdma.yaml#
7 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Peter Ujfalusi <peter.ujfalusi@gmail.com>
16 mode channels of K3 UDMA-P.
17 PKTDMA only includes Split channels to service PSI-L based peripherals.
19 The peripherals can be PSI-L native or legacy, non PSI-L native peripherals
20 with PDMAs. PDMA is tasked to act as a bridge between the PSI-L fabric and the
27 - $ref: /schemas/dma/dma-controller.yaml#
[all …]
/linux-6.8/Documentation/devicetree/bindings/pinctrl/
Dmediatek,mt6795-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt6795-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
11 - Sean Wang <sean.wang@kernel.org>
18 const: mediatek,mt6795-pinctrl
20 gpio-controller: true
22 '#gpio-cells':
29 gpio-ranges:
[all …]
/linux-6.8/arch/arm/boot/dts/broadcom/
Dbcm988312hr.dts16 * * Neither the name of Broadcom Corporation nor the names of its
33 /dts-v1/;
35 #include "bcm-nsp.dtsi"
36 #include <dt-bindings/gpio/gpio.h>
43 stdout-path = "serial0:115200n8";
48 reg = <0x60000000 0x80000000>;
51 gpio-restart {
52 compatible = "gpio-restart";
54 open-source;
84 reg = <0>;
[all …]
Dbcm958623hr.dts16 * * Neither the name of Broadcom Corporation nor the names of its
33 /dts-v1/;
35 #include "bcm-nsp.dtsi"
36 #include <dt-bindings/gpio/gpio.h>
43 stdout-path = "serial0:115200n8";
48 reg = <0x60000000 0x80000000>;
51 gpio-restart {
52 compatible = "gpio-restart";
54 open-source;
84 reg = <0>;
[all …]
/linux-6.8/Documentation/devicetree/bindings/pwm/
Datmel-hlcdc-pwm.txt1 Device-Tree bindings for Atmel's HLCDC (High-end LCD Controller) PWM driver
4 See ../mfd/atmel-hlcdc.txt for more details.
7 - compatible: value should be one of the following:
8 "atmel,hlcdc-pwm"
9 - pinctr-names: the pin control state names. Should contain "default".
10 - pinctrl-0: should contain the pinctrl states described by pinctrl
12 - #pwm-cells: should be set to 3. This PWM chip use the default 3 cells
18 compatible = "atmel,sama5d3-hlcdc";
19 reg = <0xf0030000 0x2000>;
21 clock-names = "periph_clk","sys_clk", "slow_clk";
[all …]
/linux-6.8/Documentation/devicetree/bindings/media/
Dqcom,sdm845-venus.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sdm845-venus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stanimir Varbanov <stanimir.varbanov@linaro.org>
17 - $ref: qcom,venus-common.yaml#
21 const: qcom,sdm845-venus
23 power-domains:
29 clock-names:
31 - const: core
[all …]
/linux-6.8/Documentation/devicetree/bindings/mfd/
Dmax77650.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MAX77650 ultra low-power PMIC from Maxim Integrated.
10 - Bartosz Golaszewski <bgolaszewski@baylibre.com>
13 MAX77650 is an ultra-low power PMIC providing battery charging and power
14 supply for low-power IoT and wearable applications.
16 The GPIO-controller module is represented as part of the top-level PMIC
19 For device-tree bindings of other sub-modules (regulator, power supply,
21 sub-system directories.
[all …]
Drichtek,rt5033.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jakob Hauser <jahau@rocketmail.com>
22 reg:
30 The regulators of RT5033 have to be instantiated under a sub-node named
44 $ref: /schemas/power/supply/richtek,rt5033-charger.yaml#
47 - compatible
48 - reg
49 - interrupts
[all …]
Drockchip,rk809.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Zhong <zyw@rock-chips.com>
11 - Zhang Qing <zhangqing@rock-chips.com>
20 - rockchip,rk809
22 reg:
28 '#clock-cells':
30 See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
34 clock-output-names:
[all …]
/linux-6.8/arch/arm/boot/dts/rockchip/
Drk3288-rock2-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/pwm/pwm.h>
8 reg = <0x0 0x0 0x0 0x80000000>;
12 emmc_pwrseq: emmc-pwrseq {
13 compatible = "mmc-pwrseq-emmc";
14 pinctrl-0 = <&emmc_reset>;
15 pinctrl-names = "default";
16 reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;
19 ext_gmac: external-gmac-clock {
20 compatible = "fixed-clock";
[all …]
Drk3288-firefly-reload-core.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/input.h>
13 reg = <0x0 0x0 0x0 0x80000000>;
16 ext_gmac: external-gmac-clock {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
19 clock-frequency = <125000000>;
20 clock-output-names = "ext_gmac";
24 vcc_flash: flash-regulator {
25 compatible = "regulator-fixed";
[all …]
/linux-6.8/arch/arm64/boot/dts/amlogic/
Dmeson-g12b-odroid-go-ultra.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-g12b-s922x.dtsi"
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/gpio/meson-g12a-gpio.h>
12 #include <dt-bindings/sound/meson-g12a-toacodec.h>
13 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
16 compatible = "hardkernel,odroid-go-ultra", "amlogic,s922x", "amlogic,g12b";
17 model = "Hardkernel ODROID-GO-Ultra";
[all …]
/linux-6.8/drivers/clk/at91/
Ddt-compat.c1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
33 const char *name = np->name; in of_sama5d2_clk_audio_pll_frac_setup()
53 "atmel,sama5d2-clk-audio-pll-frac",
59 const char *name = np->name; in of_sama5d2_clk_audio_pll_pad_setup()
79 "atmel,sama5d2-clk-audio-pll-pad",
85 const char *name = np->name; in of_sama5d2_clk_audio_pll_pmc_setup()
105 "atmel,sama5d2-clk-audio-pll-pmc",
155 if (of_property_read_u32(gcknp, "reg", &id)) in of_sama5d2_clk_generated_setup()
161 if (of_property_read_string(np, "clock-output-names", &name)) in of_sama5d2_clk_generated_setup()
[all …]
/linux-6.8/Documentation/devicetree/bindings/opp/
Dopp-v2-kryo-cpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ilia Lin <ilia.lin@kernel.org>
13 - $ref: opp-v2-base.yaml#
22 The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide
25 operating-points-v2 table when it is parsed by the OPP framework.
30 - operating-points-v2-krait-cpu
31 - operating-points-v2-kryo-cpu
[all …]
/linux-6.8/Documentation/devicetree/bindings/ata/
Dahci-platform.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/ata/ahci-platform.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 SATA nodes are defined to describe on-chip Serial ATA controllers.
13 It is possible, but not required, to represent each port as a sub-node.
18 - Hans de Goede <hdegoede@redhat.com>
19 - Jens Axboe <axboe@kernel.dk>
26 - brcm,iproc-ahci
27 - cavium,octeon-7130-ahci
[all …]
/linux-6.8/arch/arm/boot/dts/samsung/
Dexynos4412-odroidu3.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel's Exynos4412 based ODROID-U3 board device tree source
7 * Device tree source file for Hardkernel's ODROID-U3 board which is based
11 /dts-v1/;
12 #include <dt-bindings/leds/common.h>
13 #include "exynos4412-odroid-common.dtsi"
14 #include "exynos4412-prime.dtsi"
17 model = "Hardkernel ODROID-U3 board based on Exynos4412";
18 compatible = "hardkernel,odroid-u3", "samsung,exynos4412", "samsung,exynos4";
26 reg = <0x40000000 0x7ff00000>;
[all …]
/linux-6.8/arch/arm/boot/dts/qcom/
Dqcom-msm8974-sony-xperia-rhine.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-msm8974.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
15 stdout-path = "serial0:115200n8";
18 gpio-keys {
19 compatible = "gpio-keys";
21 pinctrl-names = "default";
22 pinctrl-0 = <&gpio_keys_pin_a>;
[all …]
/linux-6.8/arch/arm64/boot/dts/mediatek/
Dpumpkin-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/gpio/gpio.h>
16 stdout-path = "serial0:921600n8";
21 compatible = "linaro,optee-tz";
26 gpio-keys {
27 compatible = "gpio-keys";
28 pinctrl-names = "default";
29 pinctrl-0 = <&gpio_keys_default>;
31 key-volume-up {
35 wakeup-source;
[all …]
/linux-6.8/arch/arm64/boot/dts/qcom/
Dsc7180-trogdor-quackingstick.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "sc7180-trogdor.dtsi"
11 #include "sc7180-trogdor-rt5682i-sku.dtsi"
13 /* This board only has 1 USB Type-C port. */
14 /delete-node/ &usb_c1;
17 ppvar_lcd: ppvar-lcd-regulator {
18 compatible = "regulator-fixed";
19 regulator-name = "ppvar_lcd";
22 enable-active-high;
[all …]

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