Searched +full:reg +full:- +full:names (Results 3151 – 3175 of 5231) sorted by relevance
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/linux-6.15/Documentation/devicetree/bindings/clock/ |
D | silabs,si5341.txt | 6 https://www.silabs.com/documents/public/data-sheets/Si5341-40-D-DataSheet.pdf 8 https://www.silabs.com/documents/public/reference-manuals/Si5341-40-D-RM.pdf 10 https://www.silabs.com/documents/public/reference-manuals/Si5345-44-42-D-RM.pdf 21 chip at boot, in case you have a (pre-)programmed device. If the PLL is not 33 - compatible: shall be one of the following: 34 "silabs,si5340" - Si5340 A/B/C/D 35 "silabs,si5341" - Si5341 A/B/C/D 36 "silabs,si5342" - Si5342 A/B/C/D 37 "silabs,si5344" - Si5344 A/B/C/D 38 "silabs,si5345" - Si5345 A/B/C/D [all …]
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D | fsl,flexspi-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/fsl,flexspi-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Michael Walle <michael@walle.cc> 19 - fsl,ls1028a-flexspi-clk 20 - fsl,lx2160a-flexspi-clk 22 reg: 28 '#clock-cells': 31 clock-output-names: [all …]
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D | starfive,jh7110-syscrg.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/clock/starfive,jh7110-syscrg.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Emil Renner Berthing <kernel@esmil.dk> 14 const: starfive,jh7110-syscrg 16 reg: 21 - items: 22 - description: Main Oscillator (24 MHz) 23 - description: GMAC1 RMII reference or GMAC1 RGMII RX [all …]
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D | imx8qxp-lpcg.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/imx8qxp-lpcg.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX8QXP LPCG (Low-Power Clock Gating) Clock 10 - Aisheng Dong <aisheng.dong@nxp.com> 13 The Low-Power Clock Gate (LPCG) modules contain a local programming 24 include/dt-bindings/clock/imx8-lpcg.h 29 - const: fsl,imx8qxp-lpcg 30 - items: [all …]
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/linux-6.15/arch/arm/boot/dts/allwinner/ |
D | sun8i-v3s-netcube-kumquat.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include "sun8i-v3s.dtsi" 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/gpio/gpio.h> 15 compatible = "netcube,kumquat", "allwinner,sun8i-v3s"; 25 stdout-path = "serial0:115200n8"; 29 clk_can0: clock-can0 { 30 compatible = "fixed-clock"; [all …]
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D | sun8i-v3.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "sun8i-v3s.dtsi" 12 #sound-dai-cells = <0>; 13 compatible = "allwinner,sun8i-v3-i2s", 14 "allwinner,sun8i-h3-i2s"; 15 reg = <0x01c22000 0x400>; 18 clock-names = "apb", "mod"; 20 dma-names = "rx", "tx"; 21 pinctrl-names = "default"; 22 pinctrl-0 = <&i2s0_pins>; [all …]
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/linux-6.15/arch/arm/boot/dts/marvell/ |
D | armada-385.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 * Gregory CLEMENT <gregory.clement@free-electrons.com> 9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 12 #include "armada-38x.dtsi" 19 #address-cells = <1>; 20 #size-cells = <0>; 21 enable-method = "marvell,armada-380-smp"; 25 compatible = "arm,cortex-a9"; 26 reg = <0>; 30 compatible = "arm,cortex-a9"; [all …]
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/linux-6.15/Documentation/devicetree/bindings/thermal/ |
D | db8500-thermal.txt | 1 * ST-Ericsson DB8500 Thermal 5 - compatible : "stericsson,db8500-thermal"; 6 - reg : address range of the thermal sensor registers; 7 - interrupts : interrupts generated from PRCMU; 8 - interrupt-names : "IRQ_HOTMON_LOW" and "IRQ_HOTMON_HIGH"; 9 - num-trips : number of total trip points, this is required, set it 0 if none, 11 - tripN-temp : temperature of trip point N, should be in ascending order; 12 - tripN-type : type of trip point N, should be one of "active" "passive" "hot" 14 - tripN-cdev-num : number of the cooling devices which can be bound to trip 16 otherwise the following cooling device names must be defined; [all …]
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D | hisilicon,tsensor.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Abdulrasaq Lawani <abdulrasaqolawani@gmail.com> 13 - $ref: thermal-sensor.yaml 18 - hisilicon,tsensor 19 - hisilicon,hi3660-tsensor 21 reg: 27 clock-names: 29 - const: thermal_clk [all …]
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/linux-6.15/Documentation/devicetree/bindings/display/tegra/ |
D | nvidia,tegra20-gr2d.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-gr2d.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 15 pattern: "^gr2d@[0-9a-f]+$" 19 - nvidia,tegra20-gr2d 20 - nvidia,tegra30-gr2d 21 - nvidia,tegra114-gr2d [all …]
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/linux-6.15/Documentation/devicetree/bindings/usb/ |
D | intel,keembay-dwc3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/intel,keembay-dwc3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com> 14 const: intel,keembay-dwc3 16 reg: 22 clock-names: 24 - const: async_master 25 - const: ref [all …]
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/linux-6.15/Documentation/devicetree/bindings/net/ |
D | wiznet,w5x00.txt | 9 - compatible: Should be one of the following strings: 13 - reg: Specify the SPI chip select the chip is wired to. 14 - interrupts: Specify the interrupt index within the interrupt controller (referred 15 to above in interrupt-parent) and interrupt type. w5x00 natively 18 - pinctrl-names: List of assigned state names, see pinctrl binding documentation. 19 - pinctrl-0: List of phandles to configure the GPIO pin used as interrupt line, 24 - spi-max-frequency: Maximum frequency of the SPI bus when accessing the w5500. 27 - local-mac-address: See ethernet.txt in the same directory. 35 reg = <0>; 36 pinctrl-names = "default"; [all …]
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/linux-6.15/arch/arm64/boot/dts/allwinner/ |
D | sun50i-a64-pinephone.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include "sun50i-a64.dtsi" 7 #include "sun50i-a64-cpu-opp.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/pwm/pwm.h> 15 chassis-type = "handset"; 23 compatible = "pwm-backlight"; 25 enable-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */ [all …]
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/linux-6.15/Documentation/devicetree/bindings/ata/ |
D | faraday,ftide010.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Linus Walleij <linus.walleij@linaro.org> 15 platform. The controller can do PIO modes 0 through 4, Multi-word DMA 22 The timing properties are unique per-SoC, not per-board. 27 - const: faraday,ftide010 28 - items: 29 - const: cortina,gemini-pata 30 - const: faraday,ftide010 [all …]
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/linux-6.15/Documentation/devicetree/bindings/phy/ |
D | phy-da8xx-usb.txt | 1 TI DA8xx/OMAP-L1xx/AM18xx USB PHY 4 - compatible: must be "ti,da830-usb-phy". 5 - #phy-cells: must be 1. 11 It also requires a "syscon" node with compatible = "ti,da830-cfgchip", "syscon" 17 compatible = "ti,da830-cfgchip", "syscon"; 18 reg = <0x1417c 0x14>; 21 usb_phy: usb-phy { 22 compatible = "ti,da830-usb-phy"; 23 #phy-cells = <1>; 27 compatible = "ti,da830-musb"; [all …]
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/linux-6.15/arch/arm/boot/dts/ti/omap/ |
D | omap443x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 13 /* OMAP443x variants OPP50-OPPNT */ 14 operating-points = < 21 clock-latency = <300000>; /* From legacy driver */ 24 #cooling-cells = <2>; /* min followed by max */ 28 thermal-zones { 29 #include "omap4-cpu-thermal.dtsi" 35 reg = <0x4a002260 0x4 37 compatible = "ti,omap4430-bandgap"; [all …]
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/linux-6.15/Documentation/devicetree/bindings/arm/ |
D | qcom,coresight-ctcu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/arm/qcom,coresight-ctcu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Yuanfang Zhang <quic_yuanfang@quicinc.com> 11 - Mao Jinlong <quic_jinlmao@quicinc.com> 12 - Jie Gan <quic_jiegan@quicinc.com> 30 - qcom,sa8775p-ctcu 32 reg: 38 clock-names: [all …]
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/linux-6.15/Documentation/devicetree/bindings/dma/ |
D | renesas,usb-dmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/dma/renesas,usb-dmac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> 13 - $ref: dma-controller.yaml# 18 - enum: 19 - renesas,r8a7742-usb-dmac # RZ/G1H 20 - renesas,r8a7743-usb-dmac # RZ/G1M 21 - renesas,r8a7744-usb-dmac # RZ/G1N [all …]
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/linux-6.15/Documentation/devicetree/bindings/serial/ |
D | amlogic,meson-uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/serial/amlogic,meson-uart.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Neil Armstrong <neil.armstrong@linaro.org> 15 of SoCs, and can be present either in the "Always-On" power domain or the 16 "Everything-Else" power domain. 18 The particularity of the "Always-On" Serial Interface is that the hardware 19 is active since power-on and does not need any clock gating and is usable 23 - $ref: serial.yaml# [all …]
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/linux-6.15/Documentation/devicetree/bindings/media/ |
D | allwinner,sun4i-a10-csi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-csi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 13 description: |- 20 - const: allwinner,sun4i-a10-csi1 21 - const: allwinner,sun7i-a20-csi0 22 - items: [all …]
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/linux-6.15/Documentation/devicetree/bindings/pinctrl/ |
D | qcom,sm8550-lpass-lpi-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8550-lpass-lpi-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 11 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 20 - const: qcom,sm8550-lpass-lpi-pinctrl 21 - items: 22 - const: qcom,x1e80100-lpass-lpi-pinctrl 23 - const: qcom,sm8550-lpass-lpi-pinctrl [all …]
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D | qcom,sm8650-lpass-lpi-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8650-lpass-lpi-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 11 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 20 - const: qcom,sm8650-lpass-lpi-pinctrl 21 - items: 22 - const: qcom,sm8750-lpass-lpi-pinctrl 23 - const: qcom,sm8650-lpass-lpi-pinctrl [all …]
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D | qcom,sm8250-lpass-lpi-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 18 const: qcom,sm8250-lpass-lpi-pinctrl 20 reg: 25 - description: LPASS Core voting clock 26 - description: LPASS Audio voting clock 28 clock-names: [all …]
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D | qcom,sm4250-lpass-lpi-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm4250-lpass-lpi-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 18 const: qcom,sm4250-lpass-lpi-pinctrl 20 reg: 22 - description: LPASS LPI TLMM Control and Status registers 23 - description: LPASS LPI MCC registers 27 - description: LPASS Audio voting clock [all …]
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/linux-6.15/Documentation/devicetree/bindings/sound/ |
D | mediatek,mt8365-afe.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/mediatek,mt8365-afe.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexandre Mergnat <amergnat@baylibre.com> 14 const: mediatek,mt8365-afe-pcm 16 reg: 19 "#sound-dai-cells": 24 - description: 26M clock 25 - description: mux for audio clock [all …]
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