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/linux-5.10/Documentation/devicetree/bindings/powerpc/fsl/
Dmpc5121-psc.txt4 ----------------
7 are specified by fsl,mpc5121-psc-uart nodes in the
8 fsl,mpc5121-immr SoC node. Additionally the PSC FIFO
9 Controller node fsl,mpc5121-psc-fifo is required there:
11 fsl,mpc512x-psc-uart nodes
12 --------------------------
15 - compatible : Should contain "fsl,<soc>-psc-uart" and "fsl,<soc>-psc"
17 - reg : Offset and length of the register set for the PSC device
18 - interrupts : <a b> where a is the interrupt number of the
23 - fsl,rx-fifo-size : the size of the RX fifo slice (a multiple of 4)
[all …]
/linux-5.10/arch/arm/boot/dts/
Dpxa25x.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include "dt-bindings/clock/pxa-clock.h"
17 #address-cells = <1>;
18 #size-cells = <1>;
22 compatible = "marvell,pxa250-core-clocks";
23 #clock-cells = <1>;
29 compatible = "fixed-clock";
30 #clock-cells = <0>;
31 clock-frequency = <3686400>;
32 clock-output-names = "ostimer";
[all …]
Dmotorola-cpcap-mapphone.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
9 reg = <0>; /* cs0 */
10 interrupt-parent = <&gpio1>;
12 interrupt-controller;
13 #interrupt-cells = <2>;
14 #address-cells = <1>;
15 #size-cells = <0>;
16 spi-max-frequency = <9600000>;
17 spi-cs-high;
18 spi-cpol;
[all …]
Dzynq-microzed.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 /include/ "zynq-7000.dtsi"
11 compatible = "avnet,zynq-microzed", "xlnx,zynq-microzed", "xlnx,zynq-7000";
20 reg = <0x0 0x40000000>;
25 stdout-path = "serial0:115200n8";
29 compatible = "usb-nop-xceiv";
30 #phy-cells = <0>;
35 ps-clk-frequency = <33333333>;
[all …]
Darmada-388-clearfog-base.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include "armada-388-clearfog.dtsi"
13 compatible = "solidrun,clearfog-base-a1",
14 "solidrun,clearfog-a1", "marvell,armada388",
17 gpio-keys {
18 compatible = "gpio-keys";
19 pinctrl-0 = <&rear_button_pins>;
20 pinctrl-names = "default";
26 linux,can-disable;
[all …]
Dimx6qdl-phytec-pbab01.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/sound/fsl-imx-audmux.h>
10 stdout-path = &uart4;
15 compatible = "regulator-fixed";
16 reg = <2>;
17 regulator-name = "i2s-audio-1v8";
18 regulator-min-microvolt = <1800000>;
19 regulator-max-microvolt = <1800000>;
23 compatible = "regulator-fixed";
24 reg = <3>;
[all …]
Dsama5d3xcm_cmp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama5d3xcm_cmp.dtsi - Device Tree Include file for SAMA5D36 CMP CPU Module
9 compatible = "atmel,sama5d3xcm-cmp", "atmel,sama5d3", "atmel,sama5";
12 stdout-path = "serial0:115200n8";
16 reg = <0x20000000 0x20000000>;
21 clock-frequency = <32768>;
25 clock-frequency = <12000000>;
32 cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
37 compatible = "atmel,tcb-timer";
38 reg = <0>;
[all …]
Dep7209.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include <dt-bindings/clock/clps711x-clock.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
26 #address-cells = <0>;
27 #size-cells = <0>;
36 #address-cells = <1>;
37 #size-cells = <1>;
38 compatible = "simple-bus";
[all …]
/linux-5.10/arch/powerpc/boot/dts/fsl/
Db4860qds.dts4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
14 * names of its contributors may be used to endorse or promote products
35 /include/ "b4860si-pre.dtsi"
50 board-control@3,0 {
51 compatible = "fsl,b4860qds-fpga", "fsl,fpga-qixis";
58 phy-handle = <&phy_sgmii_1e>;
59 phy-connection-type = "sgmii";
63 phy-handle = <&phy_sgmii_1f>;
64 phy-connection-type = "sgmii";
68 phy-handle = <&phy_xaui_slot1>;
[all …]
Dbsc9131rdb.dtsi2 * BSC9131 RDB Device Tree Source stub (no addresses or top-level ranges)
4 * Copyright 2011-2012 Freescale Semiconductor Inc.
14 * names of its contributors may be used to endorse or promote products
38 #address-cells = <1>;
39 #size-cells = <1>;
40 compatible = "fsl,ifc-nand";
41 reg = <0x0 0x0 0x4000>;
54 #address-cells = <1>;
55 #size-cells = <1>;
56 compatible = "spansion,s25sl12801", "jedec,spi-nor";
[all …]
Dqoriq-qman1-portals.dtsi4 * Copyright 2011 - 2014 Freescale Semiconductor Inc.
14 * names of its contributors may be used to endorse or promote products
36 #address-cells = <1>;
37 #size-cells = <1>;
38 compatible = "simple-bus";
40 qportal0: qman-portal@0 {
41 compatible = "fsl,qman-portal";
42 reg = <0x0 0x4000>, <0x100000 0x1000>;
44 cell-index = <0x0>;
46 qportal1: qman-portal@4000 {
[all …]
Dt1024si-post.dtsi14 * names of its contributors may be used to endorse or promote products
35 #include "t1023si-post.dtsi"
44 #address-cells = <1>;
45 #size-cells = <1>;
49 reg = <0xf 0xfe140000 0 0x480>;
50 fsl,qe-num-riscs = <1>;
51 fsl,qe-num-snums = <28>;
52 brg-frequency = <0>;
53 bus-frequency = <0>;
59 compatible = "fsl,t1024-diu", "fsl,diu";
[all …]
Dqoriq-mpic.dtsi14 * names of its contributors may be used to endorse or promote products
36 interrupt-controller;
37 #address-cells = <0>;
38 #interrupt-cells = <4>;
39 reg = <0x40000 0x40000>;
40 compatible = "fsl,mpic", "chrp,open-pic";
41 device_type = "open-pic";
42 clock-frequency = <0x0>;
46 compatible = "fsl,mpic-global-timer";
47 reg = <0x41100 0x100 0x41300 4>;
[all …]
/linux-5.10/drivers/media/common/b2c2/
Dflexcop-reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * flexcop-reg.h - register abstraction for FlexCopII, FlexCopIIb and FlexCopIII
84 FC_SRAM_1_32KB = 1, /* 32KB - default fow FCII */
86 FC_SRAM_1_48KB = 3, /* 48KB - default for FCIII */
106 /* names of the particular registers */
162 #define flexcop_set_ibi_value(reg,attr,val) { \ argument
163 flexcop_ibi_value v = fc->read_ibi_reg(fc,reg); \
164 v.reg.attr = val; \
165 fc->write_ibi_reg(fc,reg,v); \
/linux-5.10/Documentation/devicetree/bindings/mfd/
Dda9150.txt1 Dialog Semiconductor DA9150 Combined Charger/Fuel-Gauge MFD bindings
3 DA9150 consists of a group of sub-devices:
6 ------ -----------
7 da9150-gpadc : General Purpose ADC
8 da9150-charger : Battery Charger
9 da9150-fg : Battery Fuel-Gauge
14 - compatible : Should be "dlg,da9150"
15 - reg: Specifies the I2C slave address
16 - interrupts: IRQ line info for da9150 chip.
17 - interrupt-controller: da9150 has internal IRQs (own IRQ domain).
[all …]
Drn5t618.txt4 integrates 3 to 5 step-down DCDC converters, 7 to 10 low-dropout regulators,
6 The RN5T618/RC5T619 provides additionally a Li-ion battery charger,
11 - compatible: must be one of
15 - reg: the I2C slave address of the device
18 - interrupts: interrupt mapping for IRQ
19 See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
20 - system-power-controller:
21 See Documentation/devicetree/bindings/power/power-controller.txt
23 Sub-nodes:
24 - regulators: the node is required if the regulator functionality is
[all …]
/linux-5.10/arch/arm64/boot/dts/allwinner/
Dsun50i-h5-libretech-all-h5-cc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (C) 2020 Chen-Yu Tsai <wens@csie.org>
4 #include "sun50i-h5-libretech-all-h3-cc.dts"
7 model = "Libre Computer Board ALL-H5-CC H5";
8 compatible = "libretech,all-h5-cc-h5", "allwinner,sun50i-h5";
14 reg_gmac_3v3: gmac-3v3 {
15 compatible = "regulator-fixed";
16 regulator-name = "gmac-3v3";
17 regulator-min-microvolt = <3300000>;
18 regulator-max-microvolt = <3300000>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/dma/
Dsnps,dw-axi-dmac.txt4 - compatible: "snps,axi-dma-1.01a"
5 - reg: Address range of the DMAC registers. This should include
6 all of the per-channel registers.
7 - interrupt: Should contain the DMAC interrupt number.
8 - dma-channels: Number of channels supported by hardware.
9 - snps,dma-masters: Number of AXI masters supported by the hardware.
10 - snps,data-width: Maximum AXI data width supported by hardware.
11 (0 - 8bits, 1 - 16bits, 2 - 32bits, ..., 6 - 512bits)
12 - snps,priority: Priority of channel. Array size is equal to the number of
13 dma-channels. Priority value must be programmed within [0:dma-channels-1]
[all …]
Dti-dma-crossbar.txt4 - compatible: "ti,dra7-dma-crossbar" for DRA7xx DMA crossbar
5 "ti,am335x-edma-crossbar" for AM335x and AM437x
6 - reg: Memory map for accessing module
7 - #dma-cells: Should be set to to match with the DMA controller's dma-cells
8 for ti,dra7-dma-crossbar and <3> for ti,am335x-edma-crossbar.
9 - dma-requests: Number of DMA requests the crossbar can receive
10 - dma-masters: phandle pointing to the DMA controller
13 - dma-requests: Number of DMA requests the controller can handle
16 - ti,dma-safe-map: Safe routing value for unused request lines
17 - ti,reserved-dma-request-ranges: DMA request ranges which should not be used
[all …]
/linux-5.10/Documentation/devicetree/bindings/soc/bcm/
Dbrcm,bcm2835-pm.txt4 a watchdog timer. This binding supersedes the brcm,bcm2835-pm-wdt
9 - compatible: Should be "brcm,bcm2835-pm"
10 - reg: Specifies base physical address and size of the two
13 - clocks: a) v3d: The V3D clock from CPRMAN
17 - #reset-cells: Should be 1. This property follows the reset controller
19 - #power-domain-cells: Should be 1. This property follows the power domain
24 - timeout-sec: Contains the watchdog timeout in seconds
25 - system-power-controller: Whether the watchdog is controlling the
29 [2] Documentation/devicetree/bindings/power/power-domain.yaml
30 [3] Documentation/devicetree/bindings/power/power-controller.txt
[all …]
/linux-5.10/Documentation/devicetree/bindings/usb/
Drenesas,usb3-peri.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/usb/renesas,usb3-peri.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
15 - enum:
16 - renesas,r8a774a1-usb3-peri # RZ/G2M
17 - renesas,r8a774b1-usb3-peri # RZ/G2N
18 - renesas,r8a774c0-usb3-peri # RZ/G2E
19 - renesas,r8a774e1-usb3-peri # RZ/G2H
[all …]
Drenesas,usb-xhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/renesas,usb-xhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
11 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
14 - $ref: "usb-hcd.yaml"
19 - items:
20 - enum:
21 - renesas,xhci-r8a7742 # RZ/G1H
[all …]
/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dfsl,imx7d-pinctrl.txt3 iMX7D supports two iomuxc controllers, fsl,imx7d-iomuxc controller is similar
4 as previous iMX SoC generation and fsl,imx7d-iomuxc-lpsr which provides low
5 power state retention capabilities on gpios that are part of iomuxc-lpsr
6 (GPIO1_IO7..GPIO1_IO0). While iomuxc-lpsr provides its own set of registers for
8 iomuxc controller for daisy chain settings, the fsl,input-sel property extends
9 fsl,imx-pinctrl driver to support iomuxc-lpsr controller.
11 iomuxc_lpsr: iomuxc-lpsr@302c0000 {
12 compatible = "fsl,imx7d-iomuxc-lpsr";
13 reg = <0x302c0000 0x10000>;
14 fsl,input-sel = <&iomuxc>;
[all …]
Dpinctrl-zx.txt10 GMII_RXD3 ---+
12 DVI1_HS ---+----------------------------- GMII_RXD3 (TOP pin)
14 BGPIO16 ---+ ^
26 KEY_ROW2 ---+ v
27 PORT1_LCD_TE ---+ |
28 | AGPIO10 ---+------ KEY_ROW2 (AON pin)
29 I2S0_DOUT3 ---+ |
30 |-----------------------+
31 PWM_OUT3 ---+
33 VGA_VS1 ---+
[all …]
/linux-5.10/Documentation/devicetree/bindings/gpio/
Dfsl-imx-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/gpio/fsl-imx-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Anson Huang <Anson.Huang@nxp.com>
15 - enum:
16 - fsl,imx1-gpio
17 - fsl,imx21-gpio
18 - fsl,imx31-gpio
19 - fsl,imx35-gpio
[all …]

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