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/linux-6.15/Documentation/devicetree/bindings/dma/
Datmel,sama5d4-dma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/atmel,sama5d4-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nicolas Ferre <nicolas.ferre@microchip.com>
11 - Charan Pedumuru <charan.pedumuru@microchip.com>
14 The DMA Controller (XDMAC) is a AHB-protocol central direct memory access
18 or memory-to-memory transfers. The channel features are configurable at
22 - $ref: dma-controller.yaml#
27 - enum:
[all …]
/linux-6.15/Documentation/devicetree/bindings/clock/
Dstarfive,jh7110-ispcrg.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/starfive,jh7110-ispcrg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: StarFive JH7110 Image-Signal-Process Clock and Reset Generator
10 - Xingyu Wu <xingyu.wu@starfivetech.com>
14 const: starfive,jh7110-ispcrg
16 reg:
21 - description: ISP Top core
22 - description: ISP Top Axi
[all …]
Dstarfive,jh7110-voutcrg.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/starfive,jh7110-voutcrg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: StarFive JH7110 Video-Output Clock and Reset Generator
10 - Xingyu Wu <xingyu.wu@starfivetech.com>
14 const: starfive,jh7110-voutcrg
16 reg:
21 - description: Vout Top core
22 - description: Vout Top Ahb
[all …]
Dsamsung,exynos-audss-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,exynos-audss-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chanwoo Choi <cw00.choi@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
13 - Tomasz Figa <tomasz.figa@gmail.com>
17 include/dt-bindings/clock/exynos-audss-clk.h header.
22 - samsung,exynos4210-audss-clock
[all …]
Drenesas,r9a08g045-vbattb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/renesas,r9a08g045-vbattb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
19 const: renesas,r9a08g045-vbattb
21 reg:
26 - description: tamper detector interrupt
30 - description: VBATTB module clock
31 - description: RTC input clock (crystal or external clock device)
[all …]
Dxlnx,clocking-wizard.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/xlnx,clocking-wizard.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
20 - xlnx,clocking-wizard
21 - xlnx,clocking-wizard-v5.2
22 - xlnx,clocking-wizard-v6.0
23 - xlnx,versal-clk-wizard
26 reg:
[all …]
Dingenic,cgu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The CGU in an Ingenic SoC provides all the clocks generated on-chip. It
16 - Paul Cercueil <paul@crapouillou.net>
23 - ingenic,jz4740-cgu
24 - ingenic,jz4725b-cgu
25 - ingenic,jz4755-cgu
26 - ingenic,jz4760-cgu
27 - ingenic,jz4760b-cgu
[all …]
Dqcom,mmcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeffrey Hugo <quic_jhugo@quicinc.com>
11 - Taniya Das <quic_tdas@quicinc.com>
20 - qcom,mmcc-apq8064
21 - qcom,mmcc-apq8084
22 - qcom,mmcc-msm8226
23 - qcom,mmcc-msm8660
24 - qcom,mmcc-msm8960
[all …]
/linux-6.15/Documentation/devicetree/bindings/sound/
Dti,tlv320aic32x4.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Alexander Stein <alexander.stein@ew.tq-group.com>
19 - ti,tas2505
20 - ti,tlv320aic32x4
21 - ti,tlv320aic32x6
23 reg:
28 - description: Master clock
30 clock-names:
[all …]
/linux-6.15/Documentation/devicetree/bindings/iio/adc/
Dingenic,adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 # Copyright 2019-2020 Artur Rojek
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Artur Rojek <contact@artur-rojek.eu>
18 https://github.com/devicetree-org/dt-schema/blob/master/schemas/iio/iio-consumer.yaml,
19 giving a phandle and IIO specifier pair ("io-channels") to the ADC controller.
24 - ingenic,jz4725b-adc
25 - ingenic,jz4740-adc
26 - ingenic,jz4760-adc
[all …]
Dadi,ad9467.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices AD9467 and similar High-Speed ADCs
10 - Michael Hennerich <michael.hennerich@analog.com>
13 The AD9467 and the parts similar with it, are high-speed analog-to-digital
18 All the parts support the register map described by Application Note AN-877
19 https://www.analog.com/media/en/technical-documentation/application-notes/AN-877.pdf
21 https://www.analog.com/media/en/technical-documentation/data-sheets/AD9265.pdf
22 https://www.analog.com/media/en/technical-documentation/data-sheets/AD9434.pdf
[all …]
/linux-6.15/Documentation/devicetree/bindings/phy/
Dmediatek,mt7988-xfi-tphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/mediatek,mt7988-xfi-tphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek MT7988 XFI T-PHY
10 - Daniel Golle <daniel@makrotopia.org>
13 The MediaTek XFI SerDes T-PHY provides the physical SerDes lanes
15 MediaTek's 10G-capabale MT7988 SoC.
20 const: mediatek,mt7988-xfi-tphy
22 reg:
[all …]
/linux-6.15/arch/arm/boot/dts/renesas/
Dr8a7743-iwg20m.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the iWave-RZG1M-20M Qseven SOM
9 #include <dt-bindings/gpio/gpio.h>
16 reg = <0 0x40000000 0 0x20000000>;
21 reg = <2 0x00000000 0 0x20000000>;
25 compatible = "regulator-fixed";
26 regulator-name = "3P3V";
27 regulator-min-microvolt = <3300000>;
28 regulator-max-microvolt = <3300000>;
29 regulator-always-on;
[all …]
/linux-6.15/Documentation/devicetree/bindings/arm/
Darm,coresight-cpu-debug.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-cpu-debug.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
18 external debug module is mainly used for two modes: self-hosted debug and
21 module provides sample-based profiling extension, which can be used to sample
[all …]
Darm,coresight-tpiu.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-tpiu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
31 const: arm,coresight-tpiu
33 - compatible
[all …]
Darm,coresight-etb10.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-etb10.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
31 const: arm,coresight-etb10
33 - compatible
[all …]
/linux-6.15/arch/arm64/boot/dts/qcom/
Dsdm660.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
13 compatible = "qcom,adreno-512.0", "qcom,adreno";
14 operating-points-v2 = <&gpu_sdm660_opp_table>;
16 gpu_sdm660_opp_table: opp-table {
17 compatible = "operating-points-v2";
23 * at the same opp-level
25 opp-750000000 {
26 opp-hz = /bits/ 64 <750000000>;
27 opp-level = <RPM_SMD_LEVEL_TURBO>;
28 opp-peak-kBps = <5412000>;
[all …]
Dmsm8996-sony-xperia-tone.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
16 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
18 /delete-node/ &adsp_mem;
19 /delete-node/ &slpi_mem;
20 /delete-node/ &venus_mem;
21 /delete-node/ &gpu_mem;
[all …]
/linux-6.15/arch/arm/boot/dts/aspeed/
Daspeed-bmc-supermicro-x11spi.dts1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
6 #include "aspeed-g5.dtsi"
10 compatible = "supermicro,x11spi-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
18 reg = <0x80000000 0x20000000>;
21 reserved-memory {
22 #address-cells = <1>;
23 #size-cells = <1>;
27 no-map;
[all …]
Daspeed-bmc-intel-s2600wf.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "aspeed-g5.dtsi"
9 compatible = "intel,s2600wf-bmc", "aspeed,ast2500";
12 stdout-path = &uart5;
17 reg = <0x80000000 0x20000000>;
20 reserved-memory {
21 #address-cells = <1>;
22 #size-cells = <1>;
26 no-map;
[all …]
/linux-6.15/Documentation/devicetree/bindings/display/
Drenesas,shmobile-lcdc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/renesas,shmobile-lcdc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas SH-Mobile LCD Controller (LCDC)
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
16 - renesas,r8a7740-lcdc # R-Mobile A1
17 - renesas,sh73a0-lcdc # SH-Mobile AG5
19 reg:
[all …]
/linux-6.15/Documentation/devicetree/bindings/crypto/
Domap-aes.txt5 - compatible : Should contain entries for this and backward compatible
7 - "ti,omap2-aes" for OMAP2.
8 - "ti,omap3-aes" for OMAP3.
9 - "ti,omap4-aes" for OMAP4 and AM33XX.
12 - ti,hwmods: Name of the hwmod associated with the AES module
13 - reg : Offset and length of the register set for the module
14 - interrupts : the interrupt-specifier for the AES module.
17 - dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
19 - dma-names: DMA request names should include "tx" and "rx" if present.
24 compatible = "ti,omap4-aes";
[all …]
/linux-6.15/arch/arm/boot/dts/marvell/
Darmada-385-clearfog-gtr-l8.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 #include "armada-385-clearfog-gtr.dtsi"
7 compatible = "solidrun,clearfog-gtr-l8", "marvell,armada385",
11 sfp1: sfp-1 {
13 pinctrl-0 = <&cf_gtr_sfp1_pins>;
14 pinctrl-names = "default";
15 i2c-bus = <&i2c0>;
16 mod-def0-gpio = <&gpio0 24 GPIO_ACTIVE_LOW>;
17 tx-disable-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
22 switch0: ethernet-switch@4 {
[all …]
/linux-6.15/Documentation/devicetree/bindings/leds/
Dti,tca6507.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - NeilBrown <neilb@suse.de>
21 reg:
25 "#address-cells":
28 "#size-cells":
31 gpio-controller: true
33 "#gpio-cells":
36 gpio-line-names: true
[all …]
/linux-6.15/arch/arm64/boot/dts/rockchip/
Drk3399-rock-4c-plus.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/leds/common.h>
10 #include "rk3399-t.dtsi"
14 compatible = "radxa,rock-4c-plus", "rockchip,rk3399";
23 stdout-path = "serial2:1500000n8";
26 clkin_gmac: external-gmac-clock {
27 compatible = "fixed-clock";
28 clock-frequency = <125000000>;
29 clock-output-names = "clkin_gmac";
[all …]

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