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/linux-5.10/Documentation/devicetree/bindings/media/
Dimx7-csi.txt5 --------
12 - compatible : "fsl,imx7-csi" or "fsl,imx6ul-csi";
13 - reg : base address and length of the register set for the device;
14 - interrupts : should contain CSI interrupt;
15 - clocks : list of clock specifiers, see
16 Documentation/devicetree/bindings/clock/clock-bindings.txt for details;
17 - clock-names : must contain "mclk";
21 Documentation/devicetree/bindings/media/video-interfaces.txt.
28 #address-cells = <1>;
29 #size-cells = <0>;
[all …]
Dmediatek-jpeg-decoder.txt6 - compatible : must be one of the following string:
7 "mediatek,mt8173-jpgdec"
8 "mediatek,mt7623-jpgdec", "mediatek,mt2701-jpgdec"
9 "mediatek,mt2701-jpgdec"
10 - reg : physical base address of the jpeg decoder registers and length of
12 - interrupts : interrupt number to the interrupt controller.
13 - clocks: device clocks, see
14 Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
15 - clock-names: must contain "jpgdec-smi" and "jpgdec".
16 - power-domains: a phandle to the power domain, see
[all …]
Dmediatek-jpeg-encoder.txt6 - compatible : "mediatek,mt2701-jpgenc"
7 followed by "mediatek,mtk-jpgenc"
8 - reg : physical base address of the JPEG encoder registers and length of
10 - interrupts : interrupt number to the interrupt controller.
11 - clocks: device clocks, see
12 Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
13 - clock-names: must contain "jpgenc". It is the clock of JPEG encoder.
14 - power-domains: a phandle to the power domain, see
16 - mediatek,larb: must contain the local arbiters in the current SoCs, see
17 Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
[all …]
Dsamsung-mipi-csis.txt1 Samsung S5P/Exynos SoC series MIPI CSI-2 receiver (MIPI CSIS)
2 -------------------------------------------------------------
6 - compatible : "samsung,s5pv210-csis" for S5PV210 (S5PC110),
7 "samsung,exynos4210-csis" for Exynos4210 (S5PC210),
8 "samsung,exynos4212-csis" for Exynos4212/Exynos4412,
9 "samsung,exynos5250-csis" for Exynos5250;
10 - reg : offset and length of the register set for the device;
11 - interrupts : should contain MIPI CSIS interrupt; the format of the
13 - bus-width : maximum number of data lanes supported (SoC specific);
14 - vddio-supply : MIPI CSIS I/O and PLL voltage supply (e.g. 1.8V);
[all …]
/linux-5.10/Documentation/devicetree/bindings/serial/
Dmaxim,max310x.txt1 * Maxim MAX310X advanced Universal Asynchronous Receiver-Transmitter (UART)
4 - compatible: Should be one of the following:
5 - "maxim,max3107" for Maxim MAX3107,
6 - "maxim,max3108" for Maxim MAX3108,
7 - "maxim,max3109" for Maxim MAX3109,
8 - "maxim,max14830" for Maxim MAX14830.
9 - reg: SPI chip select number.
10 - interrupts: Specifies the interrupt source of the parent interrupt
13 - clocks: phandle to the IC source clock.
14 - clock-names: Should be "xtal" if clock is an external crystal or
[all …]
/linux-5.10/arch/arm/boot/dts/
Dr8a7745-sk-rzg1e.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the SK-RZG1E board
5 * Copyright (C) 2016-2017 Cogent Embedded, Inc.
8 /dts-v1/;
12 model = "SK-RZG1E";
13 compatible = "renesas,sk-rzg1e", "renesas,r8a7745";
21 stdout-path = "serial0:115200n8";
26 reg = <0 0x40000000 0 0x40000000>;
31 clock-frequency = <20000000>;
52 pinctrl-0 = <&scif2_pins>;
[all …]
Dstih407-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "st-pincfg.h"
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 /* 0-5: PIO_SBC */
18 /* 10-19: PIO_FRONT0 */
31 /* 30-35: PIO_REAR */
38 /* 40-42: PIO_FLASH */
45 pin-controller-sbc@961f080 {
46 #address-cells = <1>;
47 #size-cells = <1>;
[all …]
Dimx28-cfa10056.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * The CFA-10055 is an expansion board for the CFA-10036 module and
8 * CFA-10037, thus we need to include the CFA-10037 DTS.
10 #include "imx28-cfa10037.dts"
13 model = "Crystalfontz CFA-10056 Board";
19 spi2_pins_cfa10056: spi2-cfa10056@0 {
20 reg = <0>;
21 fsl,pinmux-ids = <
27 fsl,drive-strength = <MXS_DRIVE_8mA>;
29 fsl,pull-up = <MXS_PULL_ENABLE>;
[all …]
Dimx6ull-colibri-wifi.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include "imx6ull-colibri.dtsi"
11 reg = <0x80000000 0x20000000>;
14 wifi_pwrseq: sdio-pwrseq {
15 compatible = "mmc-pwrseq-simple";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_snvs_wifi_pdn>;
18 reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
23 clock-frequency = <792000000>;
27 pinctrl-names = "default";
[all …]
Dat91sam9x5dm.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9x5dm.dtsi - Device Tree file for SAM9x5 display module
8 * Author: Boris Brezillon <boris.brezillon@free-electrons.com>
13 compatible = "pwm-backlight";
15 brightness-levels = <0 4 8 16 32 64 128 255>;
16 default-brightness-level = <6>;
17 power-supply = <&bl_reg>;
22 compatible = "regulator-fixed";
23 regulator-name = "backlight-power-supply";
24 regulator-min-microvolt = <5000000>;
[all …]
Dkirkwood-6192.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 compatible = "marvell,kirkwood-pcie";
9 #address-cells = <3>;
10 #size-cells = <2>;
12 bus-range = <0x00 0xff>;
21 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
22 reg = <0x0800 0 0 0 0>;
23 #address-cells = <3>;
24 #size-cells = <2>;
25 #interrupt-cells = <1>;
[all …]
Dr8a7742-iwg21d-q7-dbcm-ca.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the iWave-RZ/G1H Qseven board development
9 /dts-v1/;
10 #include "r8a7742-iwg21d-q7.dts"
13 model = "iWave Systems RZ/G1H Qseven development platform with camera add-on";
31 pinctrl-0 = <&can0_pins>;
32 pinctrl-names = "default";
37 pinctrl-0 = <&ether_pins>;
38 pinctrl-names = "default";
40 phy-handle = <&phy1>;
[all …]
Dqcom-msm8974-sony-xperia-honami.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-msm8974.dtsi"
3 #include "qcom-pm8841.dtsi"
4 #include "qcom-pm8941.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
11 compatible = "sony,xperia-honami", "qcom,msm8974";
18 stdout-path = "serial0:115200n8";
21 gpio-keys {
[all …]
/linux-5.10/Documentation/devicetree/bindings/media/i2c/
Dov2659.txt1 * OV2659 1/5-Inch 2Mp SOC Camera
3 The Omnivision OV2659 is a 1/5-inch SOC camera, with an active array size of
9 - compatible: Must be "ovti,ov2659"
10 - reg: I2C slave address
11 - clocks: reference to the xvclk input clock.
12 - clock-names: should be "xvclk".
13 - link-frequencies: target pixel clock frequency.
16 - powerdown-gpios: reference to the GPIO connected to the pwdn pin, if any.
18 - reset-gpios: reference to the GPIO connected to the resetb pin, if any.
22 Documentation/devicetree/bindings/media/video-interfaces.txt.
[all …]
/linux-5.10/arch/arm64/boot/dts/freescale/
Dimx8mq-pico-pi.dts1 // SPDX-License-Identifier: GPL-2.0+
9 /dts-v1/;
12 #include <dt-bindings/interrupt-controller/irq.h>
15 model = "TechNexion PICO-PI-8M";
16 compatible = "technexion,pico-pi-imx8m", "fsl,imx8mq";
19 stdout-path = &uart1;
22 pmic_osc: clock-pmic {
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
25 clock-frequency = <32768>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/dma/
Dsirfsoc-dma.txt6 - compatible: Should be "sirf,prima2-dmac", "sirf,atlas7-dmac" or
7 "sirf,atlas7-dmac-v2"
8 - reg: Should contain DMA registers location and length.
9 - interrupts: Should contain one interrupt shared by all channel
10 - #dma-cells: must be <1>. used to represent the number of integer
12 - clocks: clock required
17 dmac0: dma-controller@b00b0000 {
18 compatible = "sirf,prima2-dmac";
19 reg = <0xb00b0000 0x10000>;
22 #dma-cells = <1>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/timer/
Dti,davinci-timer.txt3 This document provides bindings for the 64-bit timer in the DaVinci
4 architecture devices. The timer can be configured as a general-purpose 64-bit
5 timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
9 The timer is a free running up-counter and can generate interrupts when the
12 Also see ../watchdog/davinci-wdt.txt for timers that are configurable as
17 - compatible : should be "ti,da830-timer".
18 - reg : specifies base physical address and count of the registers.
19 - interrupts : interrupts generated by the timer.
20 - interrupt-names: should be "tint12", "tint34", "cmpint0", "cmpint1",
24 - clocks : the clock feeding the timer clock.
[all …]
/linux-5.10/Documentation/devicetree/bindings/mailbox/
Dmailbox.txt9 - #mbox-cells: Must be at least 1. Number of cells in a mailbox
15 #mbox-cells = <1>;
22 - mboxes: List of phandle and mailbox channel specifiers.
25 - mbox-names: List of identifier strings for each mailbox channel.
26 - shmem : List of phandle pointing to the shared memory(SHM) area between the
35 mbox-names = "pwr-ctrl", "rpc";
42 compatible = "mmio-sram";
43 reg = <0x50000000 0x10000>;
45 #address-cells = <1>;
46 #size-cells = <1>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/spi/
Dst,stm32-spi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/st,stm32-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 the Serial Peripheral Interface. It supports full-duplex, half-duplex and
13 from 4 to 32-bit data size.
16 - Erwan Leray <erwan.leray@st.com>
17 - Fabrice Gasnier <fabrice.gasnier@st.com>
20 - $ref: "spi-controller.yaml#"
21 - if:
[all …]
/linux-5.10/Documentation/devicetree/bindings/iio/light/
Dsharp,gp2ap002.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
20 - sharp,gp2ap002a00f
21 - sharp,gp2ap002s00f
23 reg:
30 vdd-supply:
33 vio-supply:
36 io-channels:
[all …]
/linux-5.10/Documentation/devicetree/bindings/usb/
Dgeneric-ohci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/generic-ohci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: "usb-hcd.yaml"
13 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
18 const: generic-ohci
20 reg:
34 In case the Renesas R-Car Gen3 SoCs:
35 - if a host only channel: first clock should be host.
[all …]
/linux-5.10/arch/arm64/boot/dts/qcom/
Dsdm850-lenovo-yoga-c630.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include <dt-bindings/sound/qcom,q6afe.h>
13 #include <dt-bindings/sound/qcom,q6asm.h>
19 compatible = "lenovo,yoga-c630", "qcom,sdm845";
27 firmware-name = "qcom/LENOVO/81JL/qcadsp850.mbn";
32 pm8998-rpmh-regulators {
33 compatible = "qcom,pm8998-rpmh-regulators";
[all …]
/linux-5.10/Documentation/devicetree/bindings/mfd/
Dqcom,spmi-pmic.txt1 Qualcomm SPMI PMICs multi-function device bindings
13 16-bit SPMI slave address space into 256 smaller fixed-size regions, 256 bytes
14 each. A function can consume one or more of these fixed-size register regions.
17 - compatible: Should contain one of:
37 or generalized "qcom,spmi-pmic".
38 - reg: Specifies the SPMI USID slave address for this device.
43 - compatible: Should contain "qcom,xxx", where "xxx" is a peripheral name.
46 - interrupts: Interrupts are specified as a 4-tuple. For more information
48 Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt
49 - interrupt-names: Corresponding interrupt name to the interrupts property
[all …]
/linux-5.10/Documentation/devicetree/bindings/i2c/
Di2c.txt8 -----------------------------
10 - #address-cells - should be <1>. Read more about addresses below.
11 - #size-cells - should be <0>.
12 - compatible - name of I2C bus controller
21 -----------------------------
26 - clock-frequency
29 - i2c-bus
31 devices and non-I2C devices, the 'i2c-bus' subnode can be used for
32 populating I2C devices. If the 'i2c-bus' subnode is present, only
34 '#address-cells' and '#size-cells' must be defined under this subnode
[all …]
/linux-5.10/Documentation/devicetree/bindings/phy/
Dti,phy-j721e-wiz.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: "http://devicetree.org/schemas/phy/ti,phy-j721e-wiz.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Kishon Vijay Abraham I <kishon@ti.com>
16 - ti,j721e-wiz-16g
17 - ti,j721e-wiz-10g
19 power-domains:
24 description: clock-specifier to represent input to the WIZ
[all …]

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