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/linux-5.10/arch/arm/boot/dts/
Dgemini-sq201.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
9 #include <dt-bindings/input/input.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
19 reg = <0x00000000 0x8000000>;
24 stdout-path = &uart0;
28 compatible = "gpio-keys";
30 button-setup {
31 debounce-interval = <100>;
[all …]
Dkirkwood-nsa325.dts1 // SPDX-License-Identifier: GPL-2.0+
10 /dts-v1/;
12 #include "kirkwood-nsa3x0-common.dtsi"
16 compatible = "zyxel,nsa325", "marvell,kirkwood-88f6282", "marvell,kirkwood";
20 reg = <0x00000000 0x20000000>;
25 stdout-path = &uart0;
29 pinctrl: pin-controller@10000 {
30 pinctrl-names = "default";
32 pmx_led_hdd2_green: pmx-led-hdd2-green {
37 pmx_led_hdd2_red: pmx-led-hdd2-red {
[all …]
Drk3288-rock2-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/pwm/pwm.h>
8 reg = <0x0 0x0 0x0 0x80000000>;
12 emmc_pwrseq: emmc-pwrseq {
13 compatible = "mmc-pwrseq-emmc";
14 pinctrl-0 = <&emmc_reset>;
15 pinctrl-names = "default";
16 reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;
19 ext_gmac: external-gmac-clock {
20 compatible = "fixed-clock";
[all …]
Drk3288-firefly-reload-core.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/input.h>
13 reg = <0x0 0x0 0x0 0x80000000>;
16 ext_gmac: external-gmac-clock {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
19 clock-frequency = <125000000>;
20 clock-output-names = "ext_gmac";
24 vcc_flash: flash-regulator {
25 compatible = "regulator-fixed";
[all …]
Dkirkwood-iconnect.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include "kirkwood-6281.dtsi"
9 compatible = "iom,iconnect-1.1", "iom,iconnect", "marvell,kirkwood-88f6281", "marvell,kirkwood";
13 reg = <0x00000000 0x10000000>;
18 stdout-path = &uart0;
19 linux,initrd-start = <0x4500040>;
20 linux,initrd-end = <0x4800000>;
24 pinctrl: pin-controller@10000 {
25 pmx_button_reset: pmx-button-reset {
[all …]
Dsun6i-a31s-sinovoip-bpi-m2.dts4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
44 #include "sun6i-a31s.dtsi"
45 #include <dt-bindings/gpio/gpio.h>
48 model = "Sinovoip BPI-M2";
49 compatible = "sinovoip,bpi-m2", "allwinner,sun6i-a31s";
56 stdout-path = "serial0:115200n8";
60 compatible = "gpio-leds";
63 label = "bpi-m2:blue:usr";
68 label = "bpi-m2:green:usr";
[all …]
Dsun8i-s3-pinecube.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR X11)
6 /dts-v1/;
7 #include "sun8i-v3.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
13 compatible = "pine64,pinecube", "sochip,s3", "allwinner,sun8i-v3";
20 stdout-path = "serial0:115200n8";
24 compatible = "gpio-leds";
38 compatible = "regulator-fixed";
39 regulator-name = "vcc5v0";
[all …]
Dsun5i-a13-pocketbook-touch-lux-3.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 /dts-v1/;
7 #include "sun5i-a13.dtsi"
8 #include "sunxi-common-regulators.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/pwm/pwm.h>
16 compatible = "pocketbook,touch-lux-3", "allwinner,sun5i-a13";
26 compatible = "pwm-backlight";
[all …]
Darmada-388-clearfog.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include "armada-388.dtsi"
9 #include "armada-38x-solidrun-microsom.dtsi"
13 /* So that mvebu u-boot can update the MAC addresses */
20 stdout-path = "serial0:115200n8";
23 reg_3p3v: regulator-3p3v {
24 compatible = "regulator-fixed";
25 regulator-name = "3P3V";
26 regulator-min-microvolt = <3300000>;
27 regulator-max-microvolt = <3300000>;
[all …]
/linux-5.10/arch/arm64/boot/dts/rockchip/
Drk3399-rock-pi-4b.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include "rk3399-rock-pi-4.dtsi"
19 compatible = "brcm,bcm4329-fmac";
20 reg = <1>;
21 interrupt-parent = <&gpio0>;
23 interrupt-names = "host-wake";
24 pinctrl-names = "default";
25 pinctrl-0 = <&wifi_host_wake_l>;
33 compatible = "brcm,bcm43438-bt";
[all …]
Drk3399-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/pwm/pwm.h>
12 compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
15 compatible = "pwm-backlight";
16 brightness-levels = <
49 default-brightness-level = <200>;
53 edp_panel: edp-panel {
54 compatible ="lg,lp079qx1-sp0v";
56 enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
[all …]
Drk3399-puma.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/pwm/pwm.h>
8 #include "rk3399-opp.dtsi"
12 compatible = "gpio-leds";
13 pinctrl-names = "default";
14 pinctrl-0 = <&module_led_pin>;
16 module_led: led-0 {
19 linux,default-trigger = "heartbeat";
20 panic-indicator;
25 * Overwrite the opp-table for CPUB as this board uses a different
[all …]
Dpx30-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
14 compatible = "rockchip,px30-evb", "rockchip,px30";
17 stdout-path = "serial5:115200n8";
20 adc-keys {
21 compatible = "adc-keys";
22 io-channels = <&saradc 2>;
[all …]
/linux-5.10/arch/arm64/boot/dts/allwinner/
Dsun50i-a64-pinetab.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "sun50i-a64.dtsi"
10 #include "sun50i-a64-cpu-opp.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/pwm/pwm.h>
18 compatible = "pine64,pinetab", "allwinner,sun50i-a64";
26 compatible = "pwm-backlight";
28 brightness-levels = <0 16 18 20 22 24 26 29 32 35 38 42 46 51 56 62 68 75 83 91 100>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/dma/xilinx/
Dxilinx_dma.txt11 Xilinx AXI CDMA engine, it does transfers between memory-mapped source
12 address and a memory-mapped destination address.
19 - compatible: Should be one of-
20 "xlnx,axi-vdma-1.00.a"
21 "xlnx,axi-dma-1.00.a"
22 "xlnx,axi-cdma-1.00.a"
23 "xlnx,axi-mcdma-1.00.a"
24 - #dma-cells: Should be <1>, see "dmas" property below
25 - reg: Should contain VDMA registers location and length.
26 - xlnx,addrwidth: Should be the vdma addressing size in bits(ex: 32 bits).
[all …]
/linux-5.10/Documentation/devicetree/bindings/iio/adc/
Denvelope-detector.txt8 input +------>-------|+ \
10 .-------. | }---.
12 | dac|-->--|- / |
16 | irq|------<-------'
18 '-------'
21 - compatible: Should be "axentia,tse850-envelope-detector"
22 - io-channels: Channel node of the dac to be used for comparator input.
23 - io-channel-names: Should be "dac".
24 - interrupt specification for one client interrupt,
25 see ../../interrupt-controller/interrupts.txt for details.
[all …]
/linux-5.10/arch/arm64/boot/dts/renesas/
Dhihope-rzg2-ex.dtsi1 // SPDX-License-Identifier: GPL-2.0
19 pinctrl-0 = <&avb_pins>;
20 pinctrl-names = "default";
21 phy-handle = <&phy0>;
22 phy-mode = "rgmii-txid";
25 phy0: ethernet-phy@0 {
26 rxc-skew-ps = <1500>;
27 reg = <0>;
28 interrupt-parent = <&gpio2>;
30 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/clock/
Drenesas,cpg-mssr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/clock/renesas,cpg-mssr.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
10 - Geert Uytterhoeven <geert+renesas@glider.be>
13 On Renesas ARM SoCs (SH/R-Mobile, R-Car, RZ), the CPG (Clock Pulse Generator)
18 - The CPG block generates various core clocks,
19 - The MSSR block provides two functions:
27 - renesas,r7s9210-cpg-mssr # RZ/A2
28 - renesas,r8a7742-cpg-mssr # RZ/G1H
[all …]
/linux-5.10/arch/nios2/boot/dts/
D3c120_devboard.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "altr,nios2-1.0";
23 reg = <0x00000000>;
24 interrupt-controller;
25 #interrupt-cells = <1>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/timer/
Dandestech,atcpit100-timer.txt2 ------------------------------------------------------------------
6 This timer is a set of compact multi-function timers, which can be
10 multi-function timer and provide the following usage scenarios:
11 One 32-bit timer
12 Two 16-bit timers
13 Four 8-bit timers
14 One 16-bit PWM
15 One 16-bit timer and one 8-bit PWM
16 Two 8-bit timer and one 8-bit PWM
19 - compatible : Should be "andestech,atcpit100"
[all …]
/linux-5.10/Documentation/devicetree/bindings/fsi/
Dfsi-master-aspeed.txt1 Device-tree bindings for AST2600 FSI master
2 -------------------------------------------
8 - compatible: "aspeed,ast2600-fsi-master"
9 - reg: base address and length
10 - clocks: phandle and clock number
11 - interrupts: platform dependent interrupt description
12 - pinctrl-0: phandle to pinctrl node
13 - pinctrl-names: pinctrl state
16 - cfam-reset-gpios: GPIO for CFAM reset
18 - fsi-routing-gpios: GPIO for setting the FSI mux (internal or cabled)
[all …]
/linux-5.10/Documentation/devicetree/bindings/crypto/
Dsamsung-sss.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/crypto/samsung-sss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Kamil Konieczny <k.konieczny@partner.samsung.com>
15 -- Feeder (FeedCtrl)
16 -- Advanced Encryption Standard (AES)
17 -- Data Encryption Standard (DES)/3DES
18 -- Public Key Accelerator (PKA)
[all …]
/linux-5.10/Documentation/devicetree/bindings/clock/st/
Dst,quadfs.txt10 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
13 - compatible : shall be:
15 "st,quadfs-pll"
18 - #clock-cells : from common clock binding; shall be set to 1.
20 - reg : A Base address and length of the register set.
22 - clocks : from common clock binding
24 - clock-output-names : From common clock binding. The block has 4
34 clk_s_c0_quadfs: clk-s-c0-quadfs@9103000 {
35 #clock-cells = <1>;
36 compatible = "st,quadfs-pll";
[all …]
/linux-5.10/Documentation/devicetree/bindings/thermal/
Dqcom-spmi-temp-alarm.txt8 - compatible: Should contain "qcom,spmi-temp-alarm".
9 - reg: Specifies the SPMI address.
10 - interrupts: PMIC temperature alarm interrupt.
11 - #thermal-sensor-cells: Should be 0. See Documentation/devicetree/bindings/thermal/thermal-sensor.…
14 - io-channels: Should contain IIO channel specifier for the ADC channel,
16 - io-channel-names: Should contain "thermal".
20 pm8941_temp: thermal-alarm@2400 {
21 compatible = "qcom,spmi-temp-alarm";
22 reg = <0x2400>;
24 #thermal-sensor-cells = <0>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/dma/
Dk3dma.txt6 - compatible: Must be one of
7 - "hisilicon,k3-dma-1.0"
8 - "hisilicon,hisi-pcm-asp-dma-1.0"
9 - reg: Should contain DMA registers location and length.
10 - interrupts: Should contain one interrupt shared by all channel
11 - #dma-cells: see dma.txt, should be 1, para number
12 - dma-channels: physical channels supported
13 - dma-requests: virtual channels supported, each virtual channel
15 - clocks: clock required
21 compatible = "hisilicon,k3-dma-1.0";
[all …]

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