Searched +full:reg +full:- +full:names (Results 2026 – 2050 of 3652) sorted by relevance
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/linux-5.10/Documentation/devicetree/bindings/serial/ |
D | brcm,bcm6345-uart.txt | 5 - compatible: "brcm,bcm6345-uart" 7 - reg: The base address of the UART register bank. 9 - interrupts: A single interrupt specifier. 11 - clocks: Clock driving the hardware; used to figure out the baud rate 17 - clock-names: Should be "refclk". 22 compatible = "brcm,bcm6345-uart"; 23 reg = <0x14e00520 0x18>; 24 interrupt-parent = <&periph_intc>; 27 clock-names = "refclk"; 32 compatible = "fixed-clock"; [all …]
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D | qcom,msm-uart.txt | 3 The MSM serial UART hardware is designed for low-speed use cases where a 4 dma-engine isn't needed. From a software perspective it's mostly compatible 9 - compatible: Should contain "qcom,msm-uart" 10 - reg: Should contain UART register location and length. 11 - interrupts: Should contain UART interrupt. 12 - clocks: Should contain the core clock. 13 - clock-names: Should be "core". 20 compatible = "qcom,msm-uart"; 21 reg = <0xa9c00000 0x1000>; 24 clock-names = "core";
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/linux-5.10/Documentation/devicetree/bindings/iio/accel/ |
D | mma8452.txt | 6 - compatible: should contain one of 14 - reg: the I2C address of the chip 18 - interrupts: interrupt mapping for GPIO IRQ 20 - interrupt-names: should contain "INT1" and/or "INT2", the accelerometer's 23 - vdd-supply: phandle to the regulator that provides vdd power to the accelerometer. 25 - vddio-supply: phandle to the regulator that provides vddio power to the accelerometer. 31 reg = <0x1d>; 32 interrupt-parent = <&gpio1>; 34 interrupt-names = "INT2";
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/linux-5.10/Documentation/devicetree/bindings/pwm/ |
D | pwm-zx.txt | 4 - compatible: Should be "zte,zx296718-pwm". 5 - reg: Physical base address and length of the controller's registers. 6 - clocks : The phandle and specifier referencing the controller's clocks. 7 - clock-names: "pclk" for PCLK, "wclk" for WCLK to the PWM controller. The 10 - #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of 16 compatible = "zte,zx296718-pwm"; 17 reg = <0x1439000 0x1000>; 20 clock-names = "pclk", "wclk"; 21 #pwm-cells = <3>;
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/linux-5.10/Documentation/devicetree/bindings/phy/ |
D | nvidia,tegra20-usb-phy.txt | 6 - compatible : For Tegra20, must contain "nvidia,tegra20-usb-phy". 7 For Tegra30, must contain "nvidia,tegra30-usb-phy". Otherwise, must contain 8 "nvidia,<chip>-usb-phy" plus at least one of the above, where <chip> is 10 - reg : Defines the following set of registers, in the order listed: 11 - The PHY's own register set. 13 - The register set of the PHY containing the UTMI pad control registers. 14 Present if-and-only-if phy_type == utmi. 15 - phy_type : Should be one of "utmi", "ulpi" or "hsic". 16 - clocks : Defines the clocks listed in the clock-names property. 17 - clock-names : The following clock names must be present: [all …]
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/linux-5.10/Documentation/devicetree/bindings/net/ |
D | lantiq,xrx200-net.txt | 6 - compatible : "lantiq,xrx200-net" for the PMAC of the embedded 8 - reg : memory range of the PMAC core inside of the GSWIP core 9 - interrupts : TX and RX DMA interrupts. Use interrupt-names "tx" for 15 #address-cells = <1>; 16 #size-cells = <0>; 17 compatible = "lantiq,xrx200-net"; 18 reg = <0xe10b308 0xcf8>; 20 interrupt-names = "tx", "rx";
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D | socionext-netsec.txt | 4 - compatible: Should be "socionext,synquacer-netsec" 5 - reg: Address and length of the control register area, followed by the 8 - interrupts: Should contain ethernet controller interrupt 9 - clocks: phandle to the PHY reference clock 10 - clock-names: Should be "phy_ref_clk" 11 - phy-mode: See ethernet.txt file in the same directory 12 - phy-handle: See ethernet.txt in the same directory. 14 - mdio device tree subnode: When the Netsec has a phy connected to its local 18 - #address-cells: Must be <1>. 19 - #size-cells: Must be <0>. [all …]
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/linux-5.10/arch/arm/boot/dts/ |
D | imx6sl-tolino-shine2hd.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Name on mainboard is: 37NB-E60QF0+4A2 or 37NB-E60QF0+4A3 11 /dts-v1/; 13 #include <dt-bindings/input/input.h> 14 #include <dt-bindings/gpio/gpio.h> 19 compatible = "kobo,tolino-shine2hd", "fsl,imx6sl"; 22 stdout-path = &uart1; 25 gpio_keys: gpio-keys { 26 compatible = "gpio-keys"; 27 pinctrl-names = "default"; [all …]
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D | am335x-wega.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 8 model = "Phytec AM335x phyBOARD-WEGA"; 9 compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som", "ti,am33xx"; 12 compatible = "ti,da830-evm-audio"; 16 compatible = "regulator-fixed"; 17 regulator-name = "vcc3v3"; 18 regulator-min-microvolt = <3300000>; 19 regulator-max-microvolt = <3300000>; 20 regulator-boot-on; 27 pinctrl-single,pins = < [all …]
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D | am437x-sbc-t43.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2015 CompuLab, Ltd. - http://www.compulab.co.il/ 6 #include "am437x-cm-t43.dts" 7 #include "compulab-sb-som.dtsi" 10 model = "CompuLab CM-T43 on SB-SOM-T43"; 11 compatible = "compulab,am437x-sbc-t43", "compulab,am437x-cm-t43", "ti,am4372", "ti,am43"; 20 pinctrl-single,pins = < 33 pinctrl-single,pins = < 34 AM4372_IOPAD(0x9b0, PIN_OUTPUT_PULLUP | MUX_MODE2) /* cam0 hd -> DSS DATA 23 */ 41 AM4372_IOPAD(0x9cc, PIN_OUTPUT_PULLUP | MUX_MODE2) /* cam1 data 9 -> DSS DATA 16 */ [all …]
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D | sun7i-a20-olinuxino-micro.dts | 4 * Maxime Ripard <maxime.ripard@free-electrons.com> 6 * This file is dual-licensed: you can use it either under the terms 45 /dts-v1/; 46 #include "sun7i-a20.dtsi" 47 #include "sunxi-common-regulators.dtsi" 49 #include <dt-bindings/gpio/gpio.h> 50 #include <dt-bindings/input/input.h> 51 #include <dt-bindings/interrupt-controller/irq.h> 54 model = "Olimex A20-Olinuxino Micro"; 55 compatible = "olimex,a20-olinuxino-micro", "allwinner,sun7i-a20"; [all …]
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D | am335x-sancloud-bbe.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 8 #include "am335x-bone-common.dtsi" 9 #include "am335x-boneblack-common.dtsi" 10 #include <dt-bindings/interrupt-controller/irq.h> 14 compatible = "sancloud,am335x-boneenhanced", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx"; 18 pinctrl-names = "default"; 21 pinctrl-single,pins = < 39 pinctrl-single,pins = < [all …]
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D | r7s72100-genmai.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2013-14 Renesas Solutions Corp. 6 * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com> 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/pinctrl/r7s72100-pinctrl.h> 24 stdout-path = "serial0:115200n8"; 29 reg = <0x08000000 0x08000000>; 33 #address-cells = <1>; 34 #size-cells = <1>; [all …]
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D | kirkwood-rd88f6192.dts | 1 // SPDX-License-Identifier: GPL-2.0 10 /dts-v1/; 13 #include "kirkwood-6192.dtsi" 17 compatible = "marvell,rd88f6192", "marvell,kirkwood-88f6192", "marvell,kirkwood"; 21 reg = <0x00000000 0x20000000>; 26 stdout-path = &uart0; 30 pinctrl: pin-controller@10000 { 31 pinctrl-0 = <&pmx_usb_power>; 32 pinctrl-names = "default"; 34 pmx_usb_power: pmx-usb-power { [all …]
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D | at91-dvk_su60_somc_lcm.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * at91-dvk_su60_somc_lcm.dtsi - Device Tree file for the DVK SOM60 LCD board 12 compatible = "pwm-backlight"; 14 brightness-levels = <0 4 8 16 32 64 128 255>; 15 default-brightness-level = <6>; 22 power-supply = <&vcc_lcd_reg>; 23 #address-cells = <1>; 24 #size-cells = <0>; 28 #address-cells = <1>; 29 #size-cells = <0>; [all …]
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D | exynos5250-spring.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 10 #include <dt-bindings/clock/samsung,s2mps11.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/input/input.h> 22 reg = <0x40000000 0x80000000>; 27 stdout-path = "serial3:115200n8"; 30 gpio-keys { 31 compatible = "gpio-keys"; [all …]
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D | exynos5800-peach-pi.dts | 1 // SPDX-License-Identifier: GPL-2.0 8 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/clock/maxim,max77802.h> 13 #include <dt-bindings/regulator/maxim,max77802.h> 14 #include <dt-bindings/sound/samsung-i2s.h> 16 #include "exynos5420-cpus.dtsi" 21 compatible = "google,pi-rev16", [all …]
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D | imx6sll-evk.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Copyright 2017-2018 NXP. 8 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 16 compatible = "fsl,imx6sll-evk", "fsl,imx6sll"; 19 stdout-path = &uart1; 24 reg = <0x80000000 0x80000000>; 27 backlight_display: backlight-display { 28 compatible = "pwm-backlight"; [all …]
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/linux-5.10/Documentation/devicetree/bindings/sound/ |
D | adi,adau17x1.txt | 5 - compatible: Should contain one of the following: 13 - reg: The i2c address. Value depends on the state of ADDR0 17 - clock-names: If provided must be "mclk". 18 - clocks: phandle + clock-specifiers for the clock that provides 22 #include <dt-bindings/sound/adau17x1.h> 27 reg = <0x38>; 29 clock-names = "mclk";
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/linux-5.10/Documentation/devicetree/bindings/spi/ |
D | spi-pl022.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/spi/spi-pl022.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Linus Walleij <linus.walleij@linaro.org> 13 - $ref: "spi-controller.yaml#" 22 - compatible 27 - const: arm,pl022 28 - const: arm,primecell 30 reg: [all …]
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/linux-5.10/arch/arm64/boot/dts/rockchip/ |
D | rk3399-rock960.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 #include "rk3399-opp.dtsi" 12 sdio_pwrseq: sdio-pwrseq { 13 compatible = "mmc-pwrseq-simple"; 15 clock-names = "ext_clock"; 16 pinctrl-names = "default"; 17 pinctrl-0 = <&wifi_enable_h>; 18 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; 21 vcc12v_dcin: vcc12v-dcin { 22 compatible = "regulator-fixed"; [all …]
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/linux-5.10/Documentation/devicetree/bindings/pci/ |
D | altera-pcie.txt | 4 - compatible : should contain "altr,pcie-root-port-1.0" or "altr,pcie-root-port-2.0" 5 - reg: a list of physical base address and length for TXS and CRA. 6 For "altr,pcie-root-port-2.0", additional HIP base address and length. 7 - reg-names: must include the following entries: 10 "Hip": Hard IP region (if "altr,pcie-root-port-2.0") 11 - interrupts: specifies the interrupt source of the parent interrupt 14 - device_type: must be "pci" 15 - #address-cells: set to <3> 16 - #size-cells: set to <2> 17 - #interrupt-cells: set to <1> [all …]
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/linux-5.10/Documentation/devicetree/bindings/mfd/ |
D | atmel-flexcom.txt | 8 - compatible: Should be "atmel,sama5d2-flexcom" 9 - reg: Should be the offset/length value for Flexcom dedicated 11 - clocks: Should be the Flexcom peripheral clock from PMC. 12 - #address-cells: Should be <1> 13 - #size-cells: Should be <1> 14 - ranges: Should be one range for the full I/O register region 16 - atmel,flexcom-mode: Should be one of the following values: 17 - <1> for USART 18 - <2> for SPI 19 - <3> for I2C [all …]
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/linux-5.10/Documentation/devicetree/bindings/leds/ |
D | leds-pm8058.txt | 3 The Qualcomm PM8058 is a multi-functional device which contains 5 "flash" LEDs and one "keypad backlight" LED. The names are 7 different things than flash or keypad backlight: their names 8 are more of a suggestion than a hard-wired usecase. 10 Hardware-wise the different LEDs support slightly different 17 mfd/qcom-pm8xxx.txt. 19 Each LED is represented as a sub-node of the syscon device. Each 22 LED sub-node properties: 25 - compatible: one of 26 "qcom,pm8058-led" (for the normal LEDs at 0x131, 0x132 and 0x133) [all …]
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/linux-5.10/arch/arm64/boot/dts/sprd/ |
D | sc2731.dtsi | 6 * SPDX-License-Identifier: (GPL-2.0+ OR MIT) 12 reg = <0>; 13 spi-max-frequency = <26000000>; 15 interrupt-controller; 16 #interrupt-cells = <1>; 17 #address-cells = <1>; 18 #size-cells = <0>; 21 compatible = "sprd,sc2731-charger"; 22 reg = <0x0>; 23 monitored-battery = <&bat>; [all …]
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