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/linux-5.10/arch/arm/boot/dts/
Dsun8i-a83t-cubietruck-plus.dts2 * Copyright 2015 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
46 #include "sun8i-a83t.dtsi"
48 #include <dt-bindings/gpio/gpio.h>
52 compatible = "cubietech,cubietruck-plus", "allwinner,sun8i-a83t";
60 stdout-path = "serial0:115200n8";
63 hdmi-connector {
64 compatible = "hdmi-connector";
[all …]
Dimx6ull.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include "imx6ull-pinfunc.h"
7 #include "imx6ull-pinfunc-snvs.h"
9 /* Delete UART8 in AIPS-1 (i.MX6UL specific) */
10 /delete-node/ &uart8;
11 /* Delete CAAM node in AIPS-2 (i.MX6UL specific) */
12 /delete-node/ &crypto;
15 clock-frequency = <900000000>;
16 operating-points = <
24 fsl,soc-operating-points = <
[all …]
Dstm32h743i-eval.dts2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include "stm32h743-pinctrl.dtsi"
48 model = "STMicroelectronics STM32H743i-EVAL board";
49 compatible = "st,stm32h743i-eval", "st,stm32h743";
53 stdout-path = "serial0:115200n8";
58 reg = <0xd0000000 0x2000000>;
65 vdda: regulator-vdda {
66 compatible = "regulator-fixed";
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Domap3-overo-common-peripherals.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
11 lis33_3v3: lis33-3v3-reg {
12 compatible = "regulator-fixed";
13 regulator-name = "lis33-3v3-reg";
14 regulator-min-microvolt = <3300000>;
15 regulator-max-microvolt = <3300000>;
18 lis33_1v8: lis33-1v8-reg {
19 compatible = "regulator-fixed";
20 regulator-name = "lis33-1v8-reg";
21 regulator-min-microvolt = <1800000>;
[all …]
Dsun7i-a20-hummingbird.dts6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
46 #include "sun7i-a20.dtsi"
47 #include "sunxi-common-regulators.dtsi"
49 #include <dt-bindings/gpio/gpio.h>
50 #include <dt-bindings/interrupt-controller/irq.h>
54 compatible = "merrii,a20-hummingbird", "allwinner,sun7i-a20";
65 stdout-path = "serial0:115200n8";
69 compatible = "regulator-fixed";
70 regulator-name = "mmc3_vdd";
[all …]
Drk3288-rock2-square.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "rk3288-rock2-som.dtsi"
9 compatible = "radxa,rock2-square", "rockchip,rk3288";
12 stdout-path = "serial2:115200n8";
15 adc-keys {
16 compatible = "adc-keys";
17 io-channels = <&saradc 1>;
18 io-channel-names = "buttons";
[all …]
Dexynos4210-smdkv310.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
14 /dts-v1/;
16 #include <dt-bindings/gpio/gpio.h>
17 #include "exynos-mfc-reserved-memory.dtsi"
25 reg = <0x40000000 0x80000000>;
30 stdout-path = "serial1:115200n8";
33 fixed-rate-clocks {
35 compatible = "samsung,clock-xxti";
[all …]
/linux-5.10/Documentation/devicetree/bindings/mtd/
Dmxic-nand.txt2 -------------------------------------------------
5 - compatible: should be "mxic,multi-itfc-v009-nand-controller"
6 - reg: should contain 1 entry for the registers
7 - #address-cells: should be set to 1
8 - #size-cells: should be set to 0
9 - interrupts: interrupt line connected to this raw NAND controller
10 - clock-names: should contain "ps", "send" and "send_dly"
11 - clocks: should contain 3 phandles for the "ps", "send" and
15 - children nodes represent the available NAND chips.
17 See Documentation/devicetree/bindings/mtd/nand-controller.yaml
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/linux-5.10/Documentation/devicetree/bindings/clock/
Dqcom,sc7180-mss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sc7180-mss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Taniya Das <tdas@codeaurora.org>
16 - dt-bindings/clock/qcom,mss-sc7180.h
20 const: qcom,sc7180-mss
24 - description: gcc_mss_mfab_axi clock from GCC
25 - description: gcc_mss_nav_axi clock from GCC
26 - description: gcc_mss_cfg_ahb clock from GCC
[all …]
Dsprd,sc9863a-clk.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/clock/sprd,sc9863a-clk.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Orson Zhai <orsonzhai@gmail.com>
12 - Baolin Wang <baolin.wang7@gmail.com>
13 - Chunyan Zhang <zhang.lyra@gmail.com>
16 "#clock-cells":
21 - sprd,sc9863a-ap-clk
22 - sprd,sc9863a-aon-clk
[all …]
Dcs2000-cp.txt1 CIRRUS LOGIC Fractional-N Clock Synthesizer & Clock Multiplier
5 - compatible: "cirrus,cs2000-cp"
6 - reg: The chip select number on the I2C bus
7 - clocks: common clock binding for CLK_IN, XTI/REF_CLK
8 - clock-names: CLK_IN : clk_in, XTI/REF_CLK : ref_clk
9 - #clock-cells: must be <0>
16 #clock-cells = <0>;
17 compatible = "cirrus,cs2000-cp";
18 reg = <0x4f>;
20 clock-names = "clk_in", "ref_clk";
/linux-5.10/Documentation/devicetree/bindings/watchdog/
Dmarvel.txt5 - Compatibility : "marvell,orion-wdt"
6 "marvell,armada-370-wdt"
7 "marvell,armada-xp-wdt"
8 "marvell,armada-375-wdt"
9 "marvell,armada-380-wdt"
11 - reg : Should contain two entries: first one with the
15 For "marvell,armada-375-wdt" and "marvell,armada-380-wdt":
17 - reg : A third entry is mandatory and should contain the
20 Clocks required for compatibles = "marvell,orion-wdt",
21 "marvell,armada-370-wdt":
[all …]
/linux-5.10/Documentation/devicetree/bindings/sound/
Dak4642.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
15 - asahi-kasei,ak4642
16 - asahi-kasei,ak4643
17 - asahi-kasei,ak4648
19 reg:
22 "#clock-cells":
24 "#sound-dai-cells":
[all …]
Dqcom,msm8916-wcd-digital.txt6 - compatible = "qcom,msm8916-wcd-digital-codec";
7 - reg: address space for lpass codec.
8 - clocks: Handle to mclk and ahbclk
9 - clock-names: should be "mclk", "ahbix-clk".
13 audio-codec@771c000{
14 compatible = "qcom,msm8916-wcd-digital-codec";
15 reg = <0x0771c000 0x400>;
18 clock-names = "ahbix-clk", "mclk";
19 #sound-dai-cells = <1>;
Dwm8904.txt6 - compatible: "wlf,wm8904" or "wlf,wm8912"
7 - reg: the I2C address of the device.
8 - clock-names: "mclk"
9 - clocks: reference to
10 <Documentation/devicetree/bindings/clock/clock-bindings.txt>
30 reg = <0x1a>;
32 clock-names = "mclk";
/linux-5.10/Documentation/devicetree/bindings/fpga/
Dxilinx-zynq-fpga-mgr.txt4 - compatible: should contain "xlnx,zynq-devcfg-1.0"
5 - reg: base address and size for memory mapped io
6 - interrupts: interrupt for the FPGA manager device
7 - clocks: phandle for clocks required operation
8 - clock-names: name for the clock, should be "ref_clk"
9 - syscon: phandle for access to SLCR registers
13 compatible = "xlnx,zynq-devcfg-1.0";
14 reg = <0xf8007000 0x100>;
17 clock-names = "ref_clk";
/linux-5.10/Documentation/devicetree/bindings/arm/
Darm,scpi.txt2 ----------------------------------------------------------
10 - compatible : should be
12 * "arm,scpi-pre-1.0" : For implementations complying to all
14 - mboxes: List of phandle and mailbox channel specifiers
17 - shmem : List of phandle pointing to the shared memory(SHM) area between the
27 ------------------------------------------------------------
34 - compatible : should be "arm,scpi-clocks"
36 protocol much be listed as sub-nodes under this node.
38 Sub-nodes
41 - compatible : shall include one of the following
[all …]
/linux-5.10/Documentation/devicetree/bindings/crypto/
Dqcom,prng.txt5 - compatible : should be "qcom,prng" for 8916 etc
6 : should be "qcom,prng-ee" for 8996 and later using EE
8 - reg : specifies base physical address and size of the registers map
9 - clocks : phandle to clock-controller plus clock-specifier pair
10 - clock-names : "core" clocks all registers, FIFO and circuits in PRNG IP block
16 reg = <0xf9bff000 0x200>;
18 clock-names = "core";
/linux-5.10/Documentation/devicetree/bindings/slimbus/
Dslim-ngd-qcom-ctrl.txt3 SLIMBus NGD controller is a light-weight driver responsible for communicating
6 data-channel management
10 - compatible:
13 Definition: must be "qcom,slim-ngd-v<MAJOR>.<MINOR>.<STEP>"
15 "qcom,slim-ngd-v1.5.0" for MSM8996
16 "qcom,slim-ngd-v2.1.0" for SDM845
18 - reg:
20 Value type: <prop-encoded-array>
23 - dmas
28 - dma-names
[all …]
/linux-5.10/arch/arc/boot/dts/
Dnsimosci_hs_idu.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
5 /dts-v1/;
10 model = "snps,nsimosci_hs-smp";
12 #address-cells = <1>;
13 #size-cells = <1>;
14 interrupt-parent = <&core_intc>;
18 …n8 console=tty0 console=ttyS0,115200n8 consoleblan=0 debug video=640x480-24 print-fatal-signals=1";
26 compatible = "simple-bus";
27 #address-cells = <1>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/usb/
Dohci-da8xx.txt5 - compatible: Should be "ti,da830-ohci"
6 - reg: Should contain one register range i.e. start and length
7 - interrupts: Description of the interrupt line
8 - phys: Phandle for the PHY device
9 - phy-names: Should be "usb-phy"
12 - vbus-supply: phandle of regulator that controls vbus power / over-current
17 compatible = "ti,da830-ohci";
18 reg = <0x225000 0x1000>;
21 phy-names = "usb-phy";
22 vbus-supply = <&reg_usb_ohci>;
/linux-5.10/Documentation/devicetree/bindings/phy/
Dcdns,dphy.txt7 - compatible: should be set to "cdns,dphy".
8 - reg: physical base address and length of the DPHY registers.
9 - clocks: DPHY reference clocks.
10 - clock-names: must contain "psm" and "pll_ref".
11 - #phy-cells: must be set to 0.
16 reg = <0x0 0xfd0e0000 0x0 0x1000>;
18 clock-names = "psm", "pll_ref";
19 #phy-cells = <0>;
/linux-5.10/Documentation/devicetree/bindings/iio/dac/
Dvf610-dac.txt7 - compatible: Should contain "fsl,vf610-dac"
8 - reg: Offset and length of the register set for the device
9 - interrupts: Should contain the interrupt for the device
10 - clocks: The clock is needed by the DAC controller
11 - clock-names: Must contain "dac" matching entry in the clocks property.
15 compatible = "fsl,vf610-dac";
16 reg = <0x400cc000 0x1000>;
18 clock-names = "dac";
/linux-5.10/Documentation/devicetree/bindings/timer/
Dnxp,lpc3220-timer.txt7 - compatible:
8 Should be "nxp,lpc3220-timer".
9 - reg:
11 - interrupts:
13 - clocks:
15 - clock-names:
21 compatible = "nxp,lpc3220-timer";
22 reg = <0x40085000 0x1000>;
25 clock-names = "timerclk";
/linux-5.10/Documentation/devicetree/bindings/display/imx/
Dldb.txt1 Device-Tree bindings for LVDS Display Bridge (ldb)
6 The LVDS Display Bridge device tree node contains up to two lvds-channel
10 - #address-cells : should be <1>
11 - #size-cells : should be <0>
12 - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb".
16 - gpr : should be <&gpr> on i.MX53 and i.MX6q.
17 The phandle points to the iomuxc-gpr region containing the LVDS
19 - clocks, clock-names : phandles to the LDB divider and selector clocks and to
21 Documentation/devicetree/bindings/clock/clock-bindings.txt
23 "di0_pll" - LDB LVDS channel 0 mux
[all …]

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