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/linux-6.8/arch/arm64/boot/dts/qcom/
Dsdm845-cheza.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
25 stdout-path = "serial0:115200n8";
29 compatible = "pwm-backlight";
31 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
32 power-supply = <&ppvar_sys>;
33 pinctrl-names = "default";
34 pinctrl-0 = <&ap_edp_bklten>;
37 /* FIXED REGULATORS - parents above children */
[all …]
Dmsm8996-oneplus-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
12 #include <dt-bindings/sound/qcom,q6afe.h>
13 #include <dt-bindings/sound/qcom,q6asm.h>
14 #include <dt-bindings/sound/qcom,wcd9335.h>
23 compatible = "simple-battery";
25 constant-charge-current-max-microamp = <3000000>;
26 voltage-min-design-microvolt = <3400000>;
30 stdout-path = "serial1:115200n8";
[all …]
Dmsm8916-asus-z00l.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 /dts-v1/;
5 #include "msm8916-pm8916.dtsi"
6 #include "msm8916-modem-qdsp6.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
15 chassis-type = "handset";
24 stdout-path = "serial0";
27 gpio-keys {
[all …]
Dmsm8998-sony-xperia-yoshino.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
18 qcom,msm-id = <0x124 0x20000>, <0x124 0x20001>; /* 8998v2, v2.1 */
19 qcom,board-id = <8 0>;
23 compatible = "gpio-gate-clock";
24 pinctrl-0 = <&div_clk1>;
25 pinctrl-names = "default";
27 #clock-cells = <0>;
[all …]
/linux-6.8/arch/arm/boot/dts/allwinner/
Dsun7i-a20-olimex-som204-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Source for A20-SOM204-EVB Board
9 /dts-v1/;
10 #include "sun7i-a20.dtsi"
11 #include "sunxi-common-regulators.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/pwm/pwm.h>
19 model = "Olimex A20-SOM204-EVB";
20 compatible = "olimex,a20-olimex-som204-evb", "allwinner,sun7i-a20";
[all …]
/linux-6.8/arch/arm64/boot/dts/actions/
Ds900.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/actions,s900-cmu.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/reset/actions,s900-reset.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
18 #address-cells = <2>;
19 #size-cells = <0>;
[all …]
/linux-6.8/arch/arm/boot/dts/st/
Dste-ux500-samsung-gavini.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy Beam GT-I8530 also known as Gavini.
6 /dts-v1/;
7 #include "ste-db8500.dtsi"
8 #include "ste-ab8500.dtsi"
9 #include "ste-dbx5x0-pinctrl.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
[all …]
/linux-6.8/Documentation/devicetree/bindings/crypto/
Dimg-hash.txt8 - compatible : "img,hash-accelerator"
9 - reg : Offset and length of the register set for the module, and the DMA port
10 - interrupts : The designated IRQ line for the hashing module.
11 - dmas : DMA specifier as per Documentation/devicetree/bindings/dma/dma.txt
12 - dma-names : Should be "tx"
13 - clocks : Clock specifiers
14 - clock-names : "sys" Used to clock the hash block registers
20 compatible = "img,hash-accelerator";
21 reg = <0x18149600 0x100>, <0x18101100 0x4>;
24 dma-names = "tx";
[all …]
/linux-6.8/Documentation/devicetree/bindings/display/
Dsnps,arcpgu.txt8 - compatible: "snps,arcpgu"
9 - reg: Physical base address and length of the controller's registers.
10 - clocks: A list of phandle + clock-specifier pairs, one for each
11 entry in 'clock-names'.
12 - clock-names: A list of clock names. For ARC PGU it should contain:
13 - "pxlclk" for the clock feeding the output PLL of the controller.
15 Required sub-nodes:
16 - port: The PGU connection to an encoder chip.
25 reg = <0xXXXXXXXX 0x400>;
27 clock-names = "pxlclk";
[all …]
Dallwinner,sun8i-a83t-de2-mixer.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-de2-mixer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 - allwinner,sun8i-a83t-de2-mixer-0
17 - allwinner,sun8i-a83t-de2-mixer-1
18 - allwinner,sun8i-h3-de2-mixer-0
19 - allwinner,sun8i-r40-de2-mixer-0
[all …]
/linux-6.8/Documentation/devicetree/bindings/net/
Dti,icssg-prueth.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ti,icssg-prueth.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Md Danish Anwar <danishanwar@ti.com>
13 Ethernet based on the Programmable Real-Time Unit and Industrial
17 - $ref: /schemas/remoteproc/ti,pru-consumer.yaml#
22 - ti,am642-icssg-prueth # for AM64x SoC family
23 - ti,am654-icssg-prueth # for AM65x SoC family
33 dma-names:
[all …]
Dfsl,fman-dtsec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/fsl,fman-dtsec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Madalin Bucur <madalin.bucur@nxp.com>
15 10/100/1000 MBit/s speeds, and the 10-Gigabit Ethernet Media Access Controller
22 - fsl,fman-dtsec
23 - fsl,fman-xgec
24 - fsl,fman-memac
26 cell-index:
[all …]
Dmediatek,star-emac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/mediatek,star-emac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bartosz Golaszewski <bgolaszewski@baylibre.com>
14 It's compliant with 802.3 standards and supports half- and full-duplex
15 modes with flow-control as well as CRC offloading and VLAN tags.
18 - $ref: ethernet-controller.yaml#
23 - mediatek,mt8516-eth
24 - mediatek,mt8518-eth
[all …]
/linux-6.8/arch/arm/boot/dts/broadcom/
Dbcm-hr2.dtsi16 * * Neither the name of Broadcom Corporation nor the names of its
33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
39 interrupt-parent = <&gic>;
40 #address-cells = <1>;
41 #size-cells = <1>;
44 #address-cells = <1>;
45 #size-cells = <0>;
49 compatible = "arm,cortex-a9";
50 next-level-cache = <&L2>;
[all …]
/linux-6.8/Documentation/devicetree/bindings/mfd/
Dst,stm32-lptimer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-lptimer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Low-Power Timers
10 The STM32 Low-Power Timer (LPTIM) is a 16-bit timer that provides several
12 - PWM output (with programmable prescaler, configurable polarity)
13 - Trigger source for STM32 ADC/DAC (LPTIM_OUT)
14 - Several counter modes:
15 - quadrature encoder to detect angular position and direction of rotary
[all …]
/linux-6.8/Documentation/devicetree/bindings/iio/adc/
Dadi,ad7768-1.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/adi,ad7768-1.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices AD7768-1 ADC device driver
10 - Michael Hennerich <michael.hennerich@analog.com>
14 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7768-1.pdf
18 const: adi,ad7768-1
20 reg:
26 clock-names:
[all …]
/linux-6.8/Documentation/devicetree/bindings/media/
Dallwinner,sun8i-a83t-mipi-csi2.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/allwinner,sun8i-a83t-mipi-csi2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A83T MIPI CSI-2
10 - Paul Kocialkowski <paul.kocialkowski@bootlin.com>
14 const: allwinner,sun8i-a83t-mipi-csi2
16 reg:
24 - description: Bus Clock
25 - description: Module Clock
[all …]
Dmarvell,mmp2-ccic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/marvell,mmp2-ccic.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Lubomir Rintel <lkundrak@v3.sk>
15 pattern: '^camera@[a-f0-9]+$'
18 const: marvell,mmp2-ccic
20 reg:
26 power-domains:
30 $ref: /schemas/graph.yaml#/$defs/port-base
[all …]
/linux-6.8/Documentation/devicetree/bindings/spi/
Dspi-fsl-lpspi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-fsl-lpspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Anson Huang <Anson.Huang@nxp.com>
13 - $ref: /schemas/spi/spi-controller.yaml#
18 - enum:
19 - fsl,imx7ulp-spi
20 - fsl,imx8qxp-spi
21 - items:
[all …]
/linux-6.8/arch/arm64/boot/dts/rockchip/
Drk3399-firefly.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/pwm/pwm.h>
10 #include <dt-bindings/usb/pd.h>
12 #include "rk3399-opp.dtsi"
15 model = "Firefly-RK3399 Board";
16 compatible = "firefly,firefly-rk3399", "rockchip,rk3399";
26 stdout-path = "serial2:1500000n8";
[all …]
/linux-6.8/Documentation/devicetree/bindings/media/i2c/
Dovti,ov2685.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shunqian Zheng <zhengsq@rock-chips.com>
16 reg:
21 - description: XVCLK clock
23 clock-names:
25 - const: xvclk
27 dvdd-supply:
30 avdd-supply:
[all …]
/linux-6.8/Documentation/devicetree/bindings/phy/
Drenesas,rcar-gen2-usb-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/renesas,rcar-gen2-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car Gen2 USB PHY
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
15 - enum:
16 - renesas,usb-phy-r8a7742 # RZ/G1H
17 - renesas,usb-phy-r8a7743 # RZ/G1M
18 - renesas,usb-phy-r8a7744 # RZ/G1N
[all …]
/linux-6.8/arch/riscv/boot/dts/allwinner/
Dsun20i-d1-nezha.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org>
5 * gpio line names
7 * The Nezha-D1 has a 40-pin IO header. Some of these pins are routed
8 * directly to pads on the SoC, others come from an 8-bit pcf857x IO
9 * expander. Therefore, these line names are specified in two places:
12 * Lines which are routed to the 40-pin header are named as follows:
15 * <pin#> is the actual pin number of the 40-pin header
18 * For details regarding pin numbers and names see the schematics (under
20 * http://dl.linux-sunxi.org/D1/D1_Nezha_development_board_schematic_diagram_20210224.pdf
[all …]
/linux-6.8/arch/arm64/boot/dts/mediatek/
Dmt7986b-rfb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
12 chassis-type = "embedded";
13 compatible = "mediatek,mt7986b-rfb", "mediatek,mt7986b";
20 stdout-path = "serial0:115200n8";
25 reg = <0 0x40000000 0 0x40000000>;
37 compatible = "mediatek,eth-mac";
38 reg = <0>;
39 phy-mode = "2500base-x";
41 fixed-link {
[all …]
/linux-6.8/arch/arm/boot/dts/nxp/imx/
Dimx6qdl-udoo.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
19 stdout-path = &uart2;
23 compatible = "gpio-backlight";
25 default-on;
29 gpio-poweroff {
30 compatible = "gpio-poweroff";
32 pinctrl-0 = <&pinctrl_power_off>;
33 pinctrl-names = "default";
38 reg = <0x10000000 0x40000000>;
[all …]

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