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/linux-6.8/Documentation/devicetree/bindings/mmc/
Dsamsung,s3c6410-sdhci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/samsung,s3c6410-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jaehoon Chung <jh80.chung@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
16 - samsung,s3c6410-sdhci
17 - samsung,exynos4210-sdhci
19 reg:
26 clock-names:
[all …]
Dlitex,mmc.yaml1 # SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gabriel Somlo <gsomlo@gmail.com>
17 https://github.com/enjoy-digital/litesdcard/.
20 - $ref: mmc-controller.yaml#
26 reg:
28 - description: PHY registers
29 - description: CORE registers
30 - description: DMA Reader buffer
[all …]
/linux-6.8/arch/arm64/boot/dts/qcom/
Dsdm845-wcd9340.dtsi1 // SPDX-License-Identifier: GPL-2.0
12 reg = <1>;
13 #address-cells = <2>;
14 #size-cells = <0>;
18 reg = <0 0>;
23 reg = <1 0>;
24 slim-ifc-dev = <&wcd9340_ifd>;
26 #sound-dai-cells = <1>;
28 interrupts-extended = <&tlmm 54 IRQ_TYPE_LEVEL_HIGH>;
29 interrupt-controller;
[all …]
/linux-6.8/arch/arc/boot/dts/
Dhsdk.dts1 // SPDX-License-Identifier: GPL-2.0-only
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/reset/snps,hsdk-reset.h>
18 #address-cells = <2>;
19 #size-cells = <2>;
22 … "earlycon=uart8250,mmio32,0xf0005000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1";
30 #address-cells = <1>;
31 #size-cells = <0>;
36 reg = <0>;
[all …]
/linux-6.8/Documentation/devicetree/bindings/clock/
Dmarvell,mmp2-clock.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/marvell,mmp2-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lubomir Rintel <lkundrak@v3.sk>
19 All these identifiers could be found in <dt-bindings/clock/marvell,mmp2.h>.
24 - marvell,mmp2-clock # controller compatible with MMP2 SoC
25 - marvell,mmp3-clock # controller compatible with MMP3 SoC
27 reg:
29 - description: MPMU register region
[all …]
Dvf610-clock.txt4 - compatible: Should be "fsl,vf610-ccm"
5 - reg: Address and length of the register set
6 - #clock-cells: Should be <1>
9 - clocks: list of clock identifiers which are external input clocks to the
12 - clock-names: list of names of clocks which are external input clocks to the
16 - sxosc (external crystal oscillator 32KHz, recommended)
17 - fxosc (external crystal oscillator 24MHz, recommended)
18 - audio_ext
19 - enet_ext
22 ID in its "clocks" phandle cell. See include/dt-bindings/clock/vf610-clock.h
[all …]
/linux-6.8/Documentation/devicetree/bindings/gpu/
Dbrcm,bcm-v3d.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpu/brcm,bcm-v3d.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eric Anholt <eric@anholt.net>
11 - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
15 pattern: '^gpu@[a-f0-9]+$'
19 - brcm,2711-v3d
20 - brcm,2712-v3d
21 - brcm,7268-v3d
[all …]
/linux-6.8/Documentation/devicetree/bindings/soc/imx/
Dfsl,imx8mm-disp-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MM DISP blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MM DISP blk-ctrl is a top-level peripheral providing access to
20 - const: fsl,imx8mm-disp-blk-ctrl
21 - const: syscon
23 reg:
[all …]
Dfsl,imx8mn-disp-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MN DISP blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MN DISP blk-ctrl is a top-level peripheral providing access to
20 - const: fsl,imx8mn-disp-blk-ctrl
21 - const: syscon
23 reg:
[all …]
/linux-6.8/Documentation/devicetree/bindings/power/supply/
Dsc27xx-fg.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/supply/sc27xx-fg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
13 - $ref: power-supply.yaml#
18 - sprd,sc2720-fgu
19 - sprd,sc2721-fgu
20 - sprd,sc2723-fgu
21 - sprd,sc2730-fgu
[all …]
/linux-6.8/arch/mips/boot/dts/ralink/
Dgardena_smart_gateway_mt7688.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
14 compatible = "gardena,smart-gateway-mt7688", "ralink,mt7688a-soc",
15 "ralink,mt7628a-soc";
20 reg = <0x0 0x8000000>;
23 gpio-keys {
24 compatible = "gpio-keys";
26 pinctrl-names = "default";
[all …]
/linux-6.8/Documentation/devicetree/bindings/sound/
Damlogic,aiu.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jerome Brunet <jbrunet@baylibre.com>
13 - $ref: dai-common.yaml#
17 pattern: "^audio-controller@.*"
19 "#sound-dai-cells":
24 - enum:
25 - amlogic,aiu-gxbb
26 - amlogic,aiu-gxl
[all …]
Dnvidia,tegra30-hda.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra30-hda.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Thierry Reding <treding@nvidia.com>
15 - Jon Hunter <jonathanh@nvidia.com>
19 pattern: "^hda@[0-9a-f]*$"
23 - const: nvidia,tegra30-hda
24 - items:
25 - enum:
[all …]
Dfsl,easrc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
18 - enum:
19 - fsl,imx8mn-easrc
20 - items:
21 - enum:
22 - fsl,imx8mp-easrc
23 - const: fsl,imx8mn-easrc
[all …]
Dmicrochip,sama7g5-pdmc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/microchip,sama7g5-pdmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
17 - $ref: dai-common.yaml#
21 const: microchip,sama7g5-pdmc
23 reg:
26 "#sound-dai-cells":
34 - description: Peripheral Bus Clock
[all …]
/linux-6.8/Documentation/devicetree/bindings/usb/
Dmediatek,musb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Min Guo <min.guo@mediatek.com>
15 pattern: '^usb@[0-9a-f]+$'
19 - enum:
20 - mediatek,mt8516-musb
21 - mediatek,mt2701-musb
22 - mediatek,mt7623-musb
23 - const: mediatek,mtk-musb
[all …]
/linux-6.8/Documentation/devicetree/bindings/phy/
Dlantiq,vrx200-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/lantiq,vrx200-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
13 "#phy-cells":
15 description: selects the PHY mode as defined in <dt-bindings/phy/phy-lantiq-vrx200-pcie.h>
19 - lantiq,vrx200-pcie-phy
20 - lantiq,arx300-pcie-phy
22 reg:
[all …]
/linux-6.8/Documentation/devicetree/bindings/spi/
Dqcom,spi-qup.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/qcom,spi-qup.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
16 and an input FIFO) for serial peripheral interface (SPI) mini-core.
22 - $ref: /schemas/spi/spi-controller.yaml#
27 - qcom,spi-qup-v1.1.1 # for 8660, 8960 and 8064
[all …]
/linux-6.8/arch/arm/boot/dts/samsung/
Dexynos4210-universal_c210.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
12 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
19 chassis-type = "handset";
23 reg = <0x40000000 0x10000000
35 stdout-path = "serial2:115200n8";
39 fixed-rate-clocks {
41 compatible = "samsung,clock-xxti";
42 clock-frequency = <0>;
[all …]
/linux-6.8/arch/arm64/boot/dts/freescale/
Dimx8mm-var-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 model = "Variscite VAR-SOM-MX8MM module";
11 compatible = "variscite,var-som-mx8mm", "fsl,imx8mm";
14 stdout-path = &uart4;
19 reg = <0x0 0x40000000 0 0x80000000>;
22 reg_eth_phy: regulator-eth-phy {
23 compatible = "regulator-fixed";
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_reg_eth_phy>;
26 regulator-name = "eth_phy_pwr";
[all …]
Dimx8mp-debix-som-a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/leds/common.h>
13 compatible = "polyhex,imx8mp-debix-som-a", "fsl,imx8mp";
15 reg_usdhc2_vmmc: regulator-usdhc2 {
16 compatible = "regulator-fixed";
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
19 regulator-name = "VSD_3V3";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
[all …]
/linux-6.8/arch/arm/boot/dts/aspeed/
Daspeed-bmc-opp-vesnin.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "aspeed-g4.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
10 compatible = "yadro,vesnin-bmc", "aspeed,ast2400";
13 stdout-path = &uart5;
18 reg = <0x40000000 0x20000000>;
21 reserved-memory {
22 #address-cells = <1>;
23 #size-cells = <1>;
[all …]
/linux-6.8/arch/arm64/boot/dts/ti/
Dk3-j7200-common-proc-board.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include "k3-j7200-som-p0.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/net/ti-dp83867.h>
11 #include <dt-bindings/phy/phy.h>
13 #include "k3-serdes.h"
16 compatible = "ti,j7200-evm", "ti,j7200";
30 stdout-path = "serial2:115200n8";
[all …]
Dk3-am64-phycore-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2021 PHYTEC America, LLC - https://www.phytec.com
10 * https://www.phytec.com/product/phycore-am64x
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/net/ti-dp83867.h>
18 model = "PHYTEC phyCORE-AM64x";
19 compatible = "phytec,am64-phycore-som", "ti,am642";
29 reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
32 reserved_memory: reserved-memory {
[all …]
/linux-6.8/arch/arm/boot/dts/qcom/
Dqcom-apq8026-huawei-sturgeon.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include "qcom-msm8226.dtsi"
10 #include <dt-bindings/input/ti-drv260x.h>
12 /delete-node/ &adsp_region;
17 chassis-type = "watch";
18 qcom,msm-id = <199 0x20000>;
19 qcom,board-id = <8 4>;
21 reserved-memory {
23 reg = <0x02f00000 0x100000>;
[all …]

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