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/linux-6.8/Documentation/devicetree/bindings/i2c/
Dqcom,i2c-qup.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/qcom,i2c-qup.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
15 - $ref: /schemas/i2c/i2c-controller.yaml#
20 - qcom,i2c-qup-v1.1.1 # for 8660, 8960 and 8064
21 - qcom,i2c-qup-v2.1.1 # for 8974 v1
[all …]
/linux-6.8/Documentation/devicetree/bindings/sound/
Dsocionext,uniphier-aio.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/sound/socionext,uniphier-aio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - <alsa-devel@alsa-project.org>
13 - $ref: dai-common.yaml#
18 - socionext,uniphier-ld11-aio
19 - socionext,uniphier-ld20-aio
20 - socionext,uniphier-pxs2-aio
22 reg:
[all …]
Datmel,sama5d2-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/sound/atmel,sama5d2-i2s.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Nicolas Ferre <nicolas.ferre@microchip.com>
12 - Alexandre Belloni <alexandre.belloni@bootlin.com>
13 - Claudiu Beznea <claudiu.beznea@microchip.com>
16 Atmel I2S (Inter-IC Sound Controller) bus is the standard
21 const: atmel,sama5d2-i2s
23 reg:
[all …]
Dqcom,lpass-va-macro.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/qcom,lpass-va-macro.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
15 - enum:
16 - qcom,sc7280-lpass-va-macro
17 - qcom,sm8250-lpass-va-macro
18 - qcom,sm8450-lpass-va-macro
19 - qcom,sm8550-lpass-va-macro
[all …]
/linux-6.8/arch/arm64/boot/dts/mediatek/
Dmt7986a-rfb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/pinctrl/mt65xx.h>
14 chassis-type = "embedded";
15 compatible = "mediatek,mt7986a-rfb", "mediatek,mt7986a";
22 stdout-path = "serial0:115200n8";
27 reg = <0 0x40000000 0 0x40000000>;
30 reg_1p8v: regulator-1p8v {
31 compatible = "regulator-fixed";
32 regulator-name = "fixed-1.8V";
[all …]
/linux-6.8/arch/arm/boot/dts/microchip/
Dat91sam9m10g45ek.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9m10g45ek.dts - Device Tree file for AT91SAM9M10G45-EK board
8 /dts-v1/;
10 #include <dt-bindings/pwm/pwm.h>
13 model = "Atmel AT91SAM9M10G45-EK";
18 stdout-path = "serial0:115200n8";
22 reg = <0x70000000 0x4000000>;
27 clock-frequency = <32768>;
31 clock-frequency = <12000000>;
43 compatible = "atmel,tcb-timer";
[all …]
/linux-6.8/arch/arm64/boot/dts/qcom/
Dmsm8916-huawei-g7.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include "msm8916-pm8916.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/sound/apq8016-lpass.h>
16 * Note: The original firmware from Huawei can only boot 32-bit kernels.
17 * To boot this device tree using arm64 it is necessary to flash 64-bit TZ/HYP
[all …]
/linux-6.8/arch/arm64/boot/dts/broadcom/stingray/
Dstingray-usb.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
6 compatible = "simple-bus";
7 #address-cells = <2>;
8 #size-cells = <2>;
13 * to 40-bit
15 dma-ranges = <0 0 0 0 0x100 0x0>;
17 usbphy0: usb-phy@0 {
18 compatible = "brcm,sr-usb-combo-phy";
19 reg = <0x0 0x00000000 0x0 0x100>;
20 #phy-cells = <1>;
[all …]
/linux-6.8/Documentation/devicetree/bindings/media/
Damphion,vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ming Qian <ming.qian@nxp.com>
12 - Shijie Qin <shijie.qin@nxp.com>
14 description: |-
20 pattern: "^vpu@[0-9a-f]+$"
24 - enum:
25 - nxp,imx8qm-vpu
26 - nxp,imx8qxp-vpu
[all …]
Dmicrochip,csi2dc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eugen Hristev <eugen.hristev@microchip.com>
13 CSI2DC - Camera Serial Interface 2 Demux Controller
30 32-bit IDI interface or a parallel interface.
44 const: microchip,sama7g5-csi2dc
46 reg:
53 clock-names:
63 - const: pclk
[all …]
Dqcom,sdm660-camss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/qcom,sdm660-camss.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Robert Foss <robert.foss@linaro.org>
12 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
19 const: qcom,sdm660-camss
25 clock-names:
27 - const: ahb
28 - const: cphy_csid0
[all …]
/linux-6.8/arch/arm/boot/dts/st/
Dstm32h750i-art-pi.dts2 * Copyright 2021 - Dillon Min <dillon.minfei@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
42 * For art-pi board resources, you can refer to link:
43 * https://art-pi.gitee.io/website/
46 /dts-v1/;
48 #include "stm32h7-pinctrl.dtsi"
49 #include <dt-bindings/interrupt-controller/irq.h>
50 #include <dt-bindings/gpio/gpio.h>
53 model = "RT-Thread STM32H750i-ART-PI board";
54 compatible = "st,stm32h750i-art-pi", "st,stm32h750";
[all …]
Dstm32mp157c-osd32mp1-red.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) Geanix ApS 2023 - All Rights Reserved
7 /dts-v1/;
11 #include "stm32mp15xx-osd32.dtsi"
12 #include "stm32mp15xxac-pinctrl.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
19 compatible = "oct,stm32mp157c-osd32-red", "oct,stm32mp15xx-osd32", "st,stm32mp157";
26 stdout-path = "serial0:115200n8";
29 led-controller-0 {
[all …]
Dspear13xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #address-cells = <1>;
10 #size-cells = <1>;
11 interrupt-parent = <&gic>;
14 #address-cells = <1>;
15 #size-cells = <0>;
18 compatible = "arm,cortex-a9";
20 reg = <0>;
21 next-level-cache = <&L2>;
25 compatible = "arm,cortex-a9";
[all …]
/linux-6.8/arch/arm64/boot/dts/freescale/
Dimx8-apalis-v1.1.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 #include <dt-bindings/pwm/pwm.h>
10 stdout-path = &lpuart1;
15 compatible = "pwm-backlight";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_gpio_bkl_on>;
18 brightness-levels = <0 45 63 88 119 158 203 255>;
19 default-brightness-level = <4>;
20 enable-gpios = <&lsio_gpio1 4 GPIO_ACTIVE_HIGH>; /* Apalis BKL1_ON */
21 /* TODO: hook-up to Apalis BKL1_PWM */
[all …]
/linux-6.8/arch/arm/boot/dts/aspeed/
Daspeed-g4.dtsi1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
9 interrupt-parent = <&vic>;
35 #address-cells = <1>;
36 #size-cells = <0>;
39 compatible = "arm,arm926ej-s";
41 reg = <0>;
47 reg = <0x40000000 0>;
[all …]
/linux-6.8/arch/arm/boot/dts/marvell/
Darmada-38x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
32 compatible = "arm,cortex-a9-pmu";
33 interrupts-extended = <&mpic 3>;
37 compatible = "marvell,armada380-mbus", "simple-bus";
[all …]
/linux-6.8/Documentation/devicetree/bindings/pci/
Dmediatek,mt7621-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/mediatek,mt7621-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
14 with 3 Root Ports. Each Root Port supports a Gen1 1-lane Link
17 - $ref: /schemas/pci/pci-bus.yaml#
21 const: mediatek,mt7621-pci
23 reg:
25 - description: host-pci bridge registers
[all …]
Drockchip,rk3399-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/rockchip,rk3399-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Lin <shawn.lin@rock-chips.com>
13 - $ref: /schemas/pci/pci-bus.yaml#
14 - $ref: rockchip,rk3399-pcie-common.yaml#
18 const: rockchip,rk3399-pcie
20 reg: true
22 reg-names:
[all …]
/linux-6.8/Documentation/devicetree/bindings/display/
Dst,stm32-dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/st,stm32-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Philippe Cornu <philippe.cornu@foss.st.com>
11 - Yannick Fertre <yannick.fertre@foss.st.com>
14 The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller.
17 - $ref: dsi-controller.yaml#
21 const: st,stm32-dsi
23 reg:
[all …]
/linux-6.8/arch/arm/boot/dts/nxp/imx/
Dimx53-qsb-common.dtsi1 // SPDX-License-Identifier: GPL-2.0+
10 stdout-path = &uart1;
15 reg = <0x70000000 0x20000000>,
19 backlight_parallel: backlight-parallel {
20 compatible = "pwm-backlight";
22 brightness-levels = <0 4 8 16 32 64 128 255>;
23 default-brightness-level = <7>;
27 compatible = "fsl,imx-parallel-display";
28 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_ipu_disp0>;
[all …]
/linux-6.8/Documentation/devicetree/bindings/clock/
Dnuvoton,npcm750-clk.txt17 dt-bindings/clock/nuvoton,npcm7xx-clock.h
22 - compatible: "nuvoton,npcm750-clk" : for clock controller of Nuvoton
25 - reg: physical base address of the clock controller and length of
28 - #clock-cells: should be 1.
32 clk: clock-controller@f0801000 {
33 compatible = "nuvoton,npcm750-clk";
34 #clock-cells = <1>;
35 reg = <0xf0801000 0x1000>;
36 clock-names = "refclk", "sysbypck", "mcbypck";
43 clk_refclk: clk-refclk {
[all …]
/linux-6.8/arch/arm/boot/dts/nuvoton/
Dnuvoton-npcm730-gbs.dts1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
5 #include "nuvoton-npcm730.dtsi"
6 #include <dt-bindings/gpio/gpio.h>
10 compatible = "quanta,gbs-bmc","nuvoton,npcm730";
71 stdout-path = &serial0;
75 reg = <0 0x40000000>;
78 gpio-keys {
79 compatible = "gpio-keys";
80 sas-cable0 {
[all …]
/linux-6.8/arch/arm/boot/dts/samsung/
Ds3c6410-mini6410.dts1 // SPDX-License-Identifier: GPL-2.0
11 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
24 reg = <0x50000000 0x10000000>;
31 fin_pll: oscillator-0 {
32 compatible = "fixed-clock";
33 clock-frequency = <12000000>;
34 clock-output-names = "fin_pll";
35 #clock-cells = <0>;
[all …]
/linux-6.8/arch/arm/boot/dts/ti/omap/
Dam335x-shc.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
11 #include <dt-bindings/input/input.h>
15 compatible = "ti,am335x-shc", "ti,am335x-bone", "ti,am33xx";
29 operating-points = <
34 voltage-tolerance = <2>; /* 2 percentage */
35 cpu0-supply = <&dcdc2_reg>;
39 gpio-keys {
40 compatible = "gpio-keys";
42 back-button {
[all …]

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