Searched +full:reg +full:- +full:names (Results 1126 – 1150 of 4430) sorted by relevance
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/linux-6.8/Documentation/devicetree/bindings/iio/adc/ |
D | sprd,sc2720-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/sprd,sc2720-adc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Baolin Wang <baolin.wang7@gmail.com> 18 - sprd,sc2720-adc 19 - sprd,sc2721-adc 20 - sprd,sc2723-adc 21 - sprd,sc2730-adc 22 - sprd,sc2731-adc [all …]
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/linux-6.8/Documentation/devicetree/bindings/pci/ |
D | rockchip,rk3399-pcie-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/rockchip,rk3399-pcie-ep.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shawn Lin <shawn.lin@rock-chips.com> 13 - $ref: /schemas/pci/pci-ep.yaml# 14 - $ref: rockchip,rk3399-pcie-common.yaml# 18 const: rockchip,rk3399-pcie-ep 20 reg: true 22 reg-names: [all …]
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/linux-6.8/Documentation/devicetree/bindings/display/ |
D | ingenic,lcd.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Paul Cercueil <paul@crapouillou.net> 14 pattern: "^lcd-controller@[0-9a-f]+$" 18 - ingenic,jz4740-lcd 19 - ingenic,jz4725b-lcd 20 - ingenic,jz4760-lcd 21 - ingenic,jz4760b-lcd 22 - ingenic,jz4770-lcd [all …]
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/linux-6.8/arch/arm/boot/dts/nxp/imx/ |
D | imx6ul-kontron-sl-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/gpio/gpio.h> 12 stdout-path = &uart4; 16 reg = <0x80000000 0x10000000>; 22 cs-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; 23 pinctrl-names = "default"; 24 pinctrl-0 = <&pinctrl_ecspi2>; 28 compatible = "mxicy,mx25v8035f", "jedec,spi-nor"; 29 spi-max-frequency = <50000000>; 30 reg = <0>; [all …]
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D | imx6qdl-apf6dev.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/input/input.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 11 stdout-path = &uart4; 15 compatible = "pwm-backlight"; 17 brightness-levels = <0 4 8 16 32 64 128 255>; 18 default-brightness-level = <0>; 19 power-supply = <®_5v>; 23 compatible = "fsl,imx-parallel-display"; [all …]
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D | imx6q-ba16.dtsi | 2 * Support for imx6 based Advantech DMS-BA16 Qseven module 7 * This file is dual-licensed: you can use it either under the terms 46 #include <dt-bindings/gpio/gpio.h> 51 reg = <0x10000000 0x40000000>; 55 compatible = "pwm-backlight"; 56 pinctrl-names = "default"; 57 pinctrl-0 = <&pinctrl_display>; 59 brightness-levels = < 0 1 2 3 4 5 6 7 8 9 85 default-brightness-level = <255>; 86 enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; [all …]
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D | imx7d-nitrogen7.dts | 1 // SPDX-License-Identifier: GPL-2.0 OR X11 6 /dts-v1/; 12 compatible = "boundary,imx7d-nitrogen7", "fsl,imx7d"; 16 reg = <0x80000000 0x40000000>; 19 backlight-j9 { 20 compatible = "gpio-backlight"; 21 pinctrl-names = "default"; 22 pinctrl-0 = <&pinctrl_backlight_j9>; 24 default-on; 27 backlight_lcd: backlight-j20 { [all …]
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D | imx6q-h100.dts | 4 * This file is dual-licensed: you can use it either under the terms 42 /dts-v1/; 45 #include "imx6qdl-sr-som.dtsi" 46 #include "imx6qdl-sr-som-brcm.dtsi" 55 reg = <0x10000000 0>; 64 stdout-path = &uart2; 67 hdmi_osc: hdmi-osc { 68 compatible = "fixed-clock"; 69 clock-output-names = "hdmi-osc"; 70 clock-frequency = <27000000>; [all …]
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/linux-6.8/arch/arm/boot/dts/aspeed/ |
D | aspeed-bmc-opp-zaius.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 3 #include "aspeed-g5.dtsi" 4 #include <dt-bindings/gpio/aspeed-gpio.h> 8 compatible = "ingrasys,zaius-bmc", "aspeed,ast2500"; 19 stdout-path = &uart5; 24 reg = <0x80000000 0x40000000>; 27 reserved-memory { 28 #address-cells = <1>; 29 #size-cells = <1>; [all …]
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/linux-6.8/Documentation/devicetree/bindings/net/ |
D | apm-xgene-enet.txt | 1 APM X-Gene SoC Ethernet nodes 3 Ethernet nodes are defined to describe on-chip ethernet interfaces in 4 APM X-Gene SoC. 7 - compatible: Should state binding information from the following list, 8 - "apm,xgene-enet": RGMII based 1G interface 9 - "apm,xgene1-sgenet": SGMII based 1G interface 10 - "apm,xgene1-xgenet": XFI based 10G interface 11 - reg: Address and length of the register set for the device. It contains the 12 information of registers in the same order as described by reg-names 13 - reg-names: Should contain the register set names [all …]
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/linux-6.8/Documentation/devicetree/bindings/timer/ |
D | snps,dw-apb-timer.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/timer/snps,dw-apb-timer.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Daniel Lezcano <daniel.lezcano@linaro.org> 15 - const: snps,dw-apb-timer 16 - enum: 17 - snps,dw-apb-timer-sp 18 - snps,dw-apb-timer-osc 21 reg: [all …]
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/linux-6.8/Documentation/devicetree/bindings/ata/ |
D | apm-xgene.txt | 1 * APM X-Gene 6.0 Gb/s SATA host controller nodes 3 SATA host controller nodes are defined to describe on-chip Serial ATA 7 - compatible : Shall contain: 8 * "apm,xgene-ahci" 9 - reg : First memory resource shall be the AHCI memory 19 - interrupts : Interrupt-specifier for SATA host controller IRQ. 20 - clocks : Reference to the clock entry. 21 - phys : A list of phandles + phy-specifiers, one for each 22 entry in phy-names. 23 - phy-names : Should contain: [all …]
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/linux-6.8/arch/arm/boot/dts/ti/omap/ |
D | am335x-bone-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 9 cpu0-supply = <&dcdc2_reg>; 15 reg = <0x80000000 0x10000000>; /* 256 MB */ 19 stdout-path = &uart0; 23 pinctrl-names = "default"; 24 pinctrl-0 = <&user_leds_s0>; 26 compatible = "gpio-leds"; 31 linux,default-trigger = "heartbeat"; 32 default-state = "off"; [all …]
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/linux-6.8/Documentation/devicetree/bindings/fuse/ |
D | nvidia,tegra20-fuse.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/fuse/nvidia,tegra20-fuse.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 16 - enum: 17 - nvidia,tegra20-efuse 18 - nvidia,tegra30-efuse 19 - nvidia,tegra114-efuse [all …]
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/linux-6.8/Documentation/devicetree/bindings/soc/imx/ |
D | fsl,imx8mq-vpu-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX8MQ VPU blk-ctrl 10 - Lucas Stach <l.stach@pengutronix.de> 13 The i.MX8MQ VPU blk-ctrl is a top-level peripheral providing access to 20 - const: fsl,imx8mq-vpu-blk-ctrl 22 reg: 25 '#power-domain-cells': [all …]
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/linux-6.8/Documentation/devicetree/bindings/sound/ |
D | socionext,uniphier-evea.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/sound/socionext,uniphier-evea.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: UniPhier EVEA SoC-internal sound codec 10 - <alsa-devel@alsa-project.org> 13 - $ref: dai-common.yaml# 17 const: socionext,uniphier-evea 19 reg: 22 clock-names: [all …]
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D | microchip,sama7g5-spdifrx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/microchip,sama7g5-spdifrx.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Codrin Ciubotariu <codrin.ciubotariu@microchip.com> 14 compliant with the IEC-60958 standard. 17 "#sound-dai-cells": 21 const: microchip,sama7g5-spdifrx 23 reg: 31 - description: Peripheral Bus Clock [all …]
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D | starfive,jh7110-pwmdac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/starfive,jh7110-pwmdac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: StarFive JH7110 PWM-DAC Controller 10 The PWM-DAC Controller uses PWM square wave generators plus RC filters to 16 - Hal Feng <hal.feng@starfivetech.com> 19 - $ref: dai-common.yaml# 23 const: starfive,jh7110-pwmdac 25 reg: [all …]
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/linux-6.8/arch/arm64/boot/dts/arm/ |
D | juno-cs-r1r2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 5 reg = <0 0x20130000 0 0x1000>; 8 clock-names = "apb_pclk"; 9 power-domains = <&scpi_devpd 0>; 10 out-ports { 13 remote-endpoint = <&etf1_in_port>; 17 in-ports { 27 compatible = "arm,coresight-tmc", "arm,primecell"; 28 reg = <0 0x20140000 0 0x1000>; [all …]
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/linux-6.8/Documentation/devicetree/bindings/clock/ |
D | qcom,hfpll.txt | 1 High-Frequency PLL (HFPLL) 5 - compatible: 11 "qcom,hfpll-ipq8064", "qcom,hfpll" 12 "qcom,hfpll-apq8064", "qcom,hfpll" 13 "qcom,hfpll-msm8974", "qcom,hfpll" 14 "qcom,hfpll-msm8960", "qcom,hfpll" 15 "qcom,msm8976-hfpll-a53", "qcom,hfpll" 16 "qcom,msm8976-hfpll-a72", "qcom,hfpll" 17 "qcom,msm8976-hfpll-cci", "qcom,hfpll" 19 - reg: [all …]
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/linux-6.8/arch/arm64/boot/dts/apple/ |
D | t600x-j375.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 7 * target-type: J375c / J375d 19 #address-cells = <2>; 20 #size-cells = <2>; 23 stdout-path = "serial0"; 26 compatible = "apple,simple-framebuffer", "simple-framebuffer"; 27 reg = <0 0 0 0>; /* To be filled by loader */ 35 reg = <0x100 0 0x2 0>; /* To be filled by loader */ 45 hpm0: usb-pd@38 { 47 reg = <0x38>; [all …]
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/linux-6.8/arch/arm64/boot/dts/xilinx/ |
D | zynqmp-zcu100-revC.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * (C) Copyright 2016 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 12 /dts-v1/; 15 #include "zynqmp-clk-ccf.dtsi" 16 #include <dt-bindings/input/input.h> 17 #include <dt-bindings/interrupt-controller/irq.h> 18 #include <dt-bindings/gpio/gpio.h> 19 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 20 #include <dt-bindings/phy/phy.h> [all …]
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/linux-6.8/Documentation/devicetree/bindings/remoteproc/ |
D | qcom,sdm845-adsp-pil.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,sdm845-adsp-pil.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 19 - qcom,sdm845-adsp-pil 21 reg: 28 - description: Watchdog interrupt 29 - description: Fatal interrupt 30 - description: Ready interrupt [all …]
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D | qcom,qcs404-cdsp-pil.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,qcs404-cdsp-pil.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 19 - qcom,qcs404-cdsp-pil 21 reg: 28 - description: Watchdog interrupt 29 - description: Fatal interrupt 30 - description: Ready interrupt [all …]
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/linux-6.8/arch/arm/boot/dts/qcom/ |
D | qcom-msm8974pro-samsung-klte.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 #include "qcom-msm8974pro.dtsi" 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 6 #include <dt-bindings/leds/common.h> 11 chassis-type = "handset"; 20 stdout-path = "serial0:115200n8"; 23 gpio-keys { 24 compatible = "gpio-keys"; 26 pinctrl-names = "default"; [all …]
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