Searched +full:r9a07g044 +full:- +full:irqc (Results 1 – 4 of 4) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/interrupt-controller/renesas,rzg2l-irqc.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>11 - Geert Uytterhoeven <geert+renesas@glider.be>15 interrupts of NMI, IRQ, and GPIOINT and the interrupts of the built-in peripheral17 - IRQ sense select for 8 external interrupts, mapped to 8 GIC SPI interrupts18 - GPIO pins used as external interrupt input pins, mapped to 32 GIC SPI interrupts19 - NMI edge select (NMI is not treated as NMI exception and supports fall edge and[all …]
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/clock/r9a07g044-cpg.h>12 compatible = "renesas,r9a07g044";13 #address-cells = <2>;14 #size-cells = <2>;16 audio_clk1: audio1-clk {17 compatible = "fixed-clock";18 #clock-cells = <0>;20 clock-frequency = <0>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/clock/r9a08g045-cpg.h>13 #address-cells = <2>;14 #size-cells = <2>;17 #address-cells = <1>;18 #size-cells = <0>;21 compatible = "arm,cortex-a55";24 #cooling-cells = <2>;25 next-level-cache = <&L3_CA55>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/clock/r9a07g054-cpg.h>13 #address-cells = <2>;14 #size-cells = <2>;16 audio_clk1: audio1-clk {17 compatible = "fixed-clock";18 #clock-cells = <0>;20 clock-frequency = <0>;23 audio_clk2: audio2-clk {[all …]