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/qemu/qapi/
H A Dmisc-i386.json396 # @ipi: The post is an inter-processor interrupt (IPI).
/qemu/docs/specs/
H A Dppc-spapr-xive.rst4 The POWER9 processor comes with a new interrupt controller
/qemu/linux-headers/asm-s390/
H A Dkvm.h410 /* processor related attributes are r/w */
/qemu/include/hw/
H A Dloader.h122 * @pflags: Populated with ELF processor-specific flags. Ignore if NULL.
/qemu/docs/devel/
H A Dmulti-thread-tcg.rst263 of view of external observers (e.g. another processor core). They can
/qemu/target/ppc/
H A Dcpu-models.h41 /* IBM Processor for Network Resources */
H A Dcpu.h79 POWERPC_EXCP_APU = 9, /* Auxiliary processor unavailable */
721 #define ESR_AP PPC_BIT(44) /* Auxiliary Processor Operation */
1159 /* Server and Embedded Processor Control */
1354 bool has_hv_mode; /* set when the processor has an HV mode, thus HV priv */
2491 /* Embedded.Processor Control */
2684 /* Processor Compatibility mask (PCR) */
H A Dtimebase_helper.c222 * POWER processor Timebase Facility
H A Dmmu-booke.c280 * construct the EPID access bits from current processor state
/qemu/docs/system/riscv/
H A Dsifive_u.rst5 board featuring the Freedom U540 multi-core RISC-V processor.
/qemu/util/
H A Dqemu-coroutine-lock.c31 #include "qemu/processor.h"
/qemu/tools/i386/
H A Dqemu-vmsr-helper.c84 * Check if processor is "GenuineIntel" in is_intel_processor()
/qemu/qga/
H A Dcommands-win32.c1837 error_setg(&local_err, "Failed to get processor information: %d", in qmp_guest_get_vcpus()
1842 "Failed to get processor information buffer length: %d", in qmp_guest_get_vcpus()
2247 slog("unknown processor architecture 0x%0x", in ga_get_current_arch()
2498 CONST WCHAR *szCounterPath = L"\\System\\Processor Queue Length"; in init_load_avg_counter()
/qemu/tests/bench/
H A Dqht-bench.c8 #include "qemu/processor.h"
/qemu/include/hw/xen/interface/
H A Darch-arm.h192 * Maximum number of virtual CPUs in legacy multi-processor guests.
/qemu/pc-bios/
HDhppa-firmware.img ... ---------- Processor Speed State Coprocessor State Cache Size ---- ...
/qemu/hw/intc/
H A Dpnv_xive2_regs.h130 * Processor Cores Enabled for MsgSnd
/qemu/target/m68k/
H A Dop_helper.c304 /* "the processor first make an internal copy" */ in m68k_interrupt_all()
310 /* "sets the processor interrupt mask" */ in m68k_interrupt_all()
H A Dcpu.h364 /* Processor Miscellaneous Registers */
/qemu/target/alpha/
H A Dhelper.c447 interrupt that isn't masked by the processor status IPL. */ in alpha_cpu_exec_interrupt()
/qemu/include/fpu/
H A Dsoftfloat-types.h26 processor in collaboration with the University of California at Berkeley,
/qemu/hw/ppc/
H A Dpnv_i2c.c2 * QEMU PowerPC PowerNV Processor I2C model
/qemu/docs/about/
H A Dremoved-features.rst951 processor IP (see `Intel discontinuance notification`_).
1126 processor IP (see `Intel discontinuance notification`_).
/qemu/docs/system/s390x/
H A Dvfio-ap.rst1 Adjunct Processor (AP) Device
9 The IBM Adjunct Processor (AP) Cryptographic Facility is comprised
/qemu/target/s390x/
H A Dcpu_features_def.h.inc121 DEF_FEAT(PAI, "pai", STFL, 196, "Processor-Activity-Instrumentation facility")
122 DEF_FEAT(PAIE, "paie", STFL, 197, "Processor-Activity-Instrumentation extension-1")

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