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/linux-5.10/Documentation/devicetree/bindings/powerpc/
Dibm,powerpc-cpu-features.txt13 enablement, privilege, and compatibility metadata.
94 - usable-privilege
104 This property describes the privilege levels and/or software components
118 This property describes the HV privilege support required to enable the
119 feature to lesser privilege levels. If the property does not exist then no
137 This property describes the OS privilege support required to enable the
138 feature to lesser privilege levels. If the property does not exist then no
179 This property may exist when the usable-privilege property value has PR bit set.
213 usable-privilege = <1 | 2 | 4>;
219 usable-privilege = <1 | 2>;
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/linux-5.10/arch/arm64/include/asm/
Dhw_breakpoint.h17 privilege : 2, member
27 /* Privilege Levels */
35 u32 val = (ctrl.len << 5) | (ctrl.type << 3) | (ctrl.privilege << 1) | in encode_ctrl_reg()
38 if (is_kernel_in_hyp_mode() && ctrl.privilege == AARCH64_BREAKPOINT_EL1) in encode_ctrl_reg()
49 ctrl->privilege = reg & 0x3; in decode_ctrl_reg()
/linux-5.10/Documentation/ia64/
Dfsys.rst34 - execution is at privilege level 0 (most-privileged)
51 privilege level is at level 0, this means that fsys-mode requires some
58 Linux operates in fsys-mode when (a) the privilege level is 0 (most
70 to by "regs" was executing in user mode (privilege level 3).
177 is exited. This is accomplished with the help of the lower-privilege
181 "br.ret" instruction that lowers the privilege level, a trap will
216 breakpoint that triggers at any privilege level other than
222 syscall_via_break(), with privilege level 3. Note: the
228 taken _after_ restoring the privilege level, the CPU has already
241 syscall_via_break(), with privilege level 3.
/linux-5.10/arch/arm64/kernel/
Dhw_breakpoint.c137 * Convert a breakpoint privilege level to the corresponding exception
140 static enum dbg_active_el debug_exception_level(int privilege) in debug_exception_level() argument
142 switch (privilege) { in debug_exception_level()
148 pr_warn("invalid breakpoint privilege level %d\n", privilege); in debug_exception_level()
229 enum dbg_active_el dbg_el = debug_exception_level(info->ctrl.privilege); in hw_breakpoint_control()
489 * Privilege in arch_build_bp_info()
494 hw->ctrl.privilege = AARCH64_BREAKPOINT_EL1; in arch_build_bp_info()
496 hw->ctrl.privilege = AARCH64_BREAKPOINT_EL0; in arch_build_bp_info()
569 if (hw->ctrl.privilege == AARCH64_BREAKPOINT_EL1 && bp->hw.target) in hw_breakpoint_arch_parse()
582 int i, max_slots, privilege; in toggle_bp_registers() local
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/linux-5.10/arch/arm/include/asm/
Dhw_breakpoint.h17 privilege : 2,
31 (ctrl.privilege << 1) | ctrl.enabled; in encode_ctrl_reg()
39 ctrl->privilege = reg & 0x3; in decode_ctrl_reg()
68 /* Privilege Levels */
/linux-5.10/arch/sparc/include/uapi/asm/
Dpsr.h7 * PSTATE.PRIV for the current CPU privilege level.
24 #define PSR_PS 0x00000040 /* previous privilege level */
25 #define PSR_S 0x00000080 /* current privilege level */
Dpsrcompat.h10 #define PSR_PS 0x00000040 /* previous privilege level */
11 #define PSR_S 0x00000080 /* current privilege level */
/linux-5.10/arch/x86/include/asm/
Dsegment.h30 * privilege level
35 * When running on Xen PV, the actual privilege level of the kernel is 1,
36 * not 0. Testing the Requested Privilege Level in a segment selector to
38 * SEGMENT_RPL_MASK is wrong because the PV kernel's privilege level
42 * kernels because privilege level 2 is never used.
46 /* User mode is privilege level 3: */
/linux-5.10/tools/testing/selftests/powerpc/dscr/
Ddscr_explicit_test.c7 * privilege state SPR and the problem state SPR for this purpose.
9 * When using the privilege state SPR, the instructions such as
Ddscr_user_test.c10 * When using the privilege state SPR, the instructions such as
/linux-5.10/Documentation/userspace-api/
Dno_new_privs.rst26 promises not to grant the privilege to do anything that could not have
41 Note that ``no_new_privs`` does not prevent privilege changes that do not
/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Dsifive,plic-1.0.0.yaml16 A hart context is a privilege mode in a hardware execution thread. For example,
18 privilege modes per hart; machine mode and supervisor mode.
/linux-5.10/Documentation/admin-guide/LSM/
DSmack.rst425 Privilege:
427 policy is said to have privilege. As of this writing a task can
428 have privilege either by possessing capabilities or by having an
614 only be changed by a process with privilege.
616 Privilege section in Smack Basics
779 privilege.
793 program has appropriate privilege::
798 packets will be checked if the program has appropriate privilege.
/linux-5.10/Documentation/powerpc/
Dultravisor.rst26 | Privilege States |
68 * The privilege of a process is now determined by three MSR bits,
70 from least privilege to highest privilege. The higher privilege
71 modes can access all the resources of the lower privilege modes.
76 | S | HV| PR|Privilege |
90 | S | HV| PR|Privilege |
/linux-5.10/arch/ia64/include/asm/
Dpal.h519 pl : 2, /* privilege level */
520 pv : 1, /* privilege level field valid */
556 pl : 2, /* privilege level */
557 pv : 1, /* privilege level field valid */
592 pl : 2, /* privilege level */
593 pv : 1, /* privilege level field valid */
622 pl : 2, /* privilege level */
623 pv : 1, /* privilege level field valid */
652 pl : 2, /* privilege level */
653 pv : 1, /* privilege level field valid */
/linux-5.10/arch/c6x/include/asm/
Dtraps.h17 #define EXCEPT_CAUSE_PRX (1 << 6) /* privilege exception */
/linux-5.10/security/
Dcommoncap.c34 * to get full privilege on a kernel without file capabilities
308 * Erase the privilege-enhancing security markings on an inode.
706 * @effective: Do we have effective root privilege?
889 /* Check for privilege-elevated exec. */ in cap_bprm_creds_from_file()
994 * of its privilege. The call to setuid(!=0) would drop all privileges!
1186 * system from legacy UID=0 based privilege (when filesystem in cap_task_prctl()
1201 * capability-based-privilege environment. in cap_task_prctl()
1216 * [4] doing anything requires privilege (go read about in cap_task_prctl()
/linux-5.10/arch/x86/include/asm/xen/
Dinterface.h127 * The privilege level specifies which modes may enter a trap via a software
129 * privilege levels as follows:
143 uint8_t flags; /* 0-3: privilege level; 4: clear event enable? */
/linux-5.10/Documentation/devicetree/bindings/arm/firmware/
Dsdei.txt11 privilege level of the SDEI firmware (specified as part of the binding
/linux-5.10/arch/arm/kernel/
Dhw_breakpoint.c569 /* Privilege */ in arch_build_bp_info()
570 hw->ctrl.privilege = ARM_BREAKPOINT_USER; in arch_build_bp_info()
572 hw->ctrl.privilege |= ARM_BREAKPOINT_PRIV; in arch_build_bp_info()
673 info->step_ctrl.privilege = info->ctrl.privilege; in enable_single_step()
723 return !user_mode(regs) && info->ctrl.privilege == ARM_BREAKPOINT_USER; in watchpoint_fault_on_uaccess()
/linux-5.10/arch/sparc/include/asm/
Dpsr.h7 * PSTATE.PRIV for the current CPU privilege level.
/linux-5.10/tools/perf/Documentation/
Dperf-top.txt246 The privilege levels may be omitted, in which case, the privilege levels of the associated
247 event are applied to the branch filter. Both kernel (k) and hypervisor (hv) privilege
/linux-5.10/Documentation/security/
Dcredentials.rst238 * UNIX exec privilege escalation bits (SUID/SGID);
239 * File capabilities exec privilege escalation bits.
243 privilege escalation bits come into play, and may allow the resulting process
550 To avoid "confused deputy" privilege escalation attacks, access control checks
/linux-5.10/arch/arm/mach-imx/
Dcpu.c50 * supervisor privilege level for access, allow for in imx_set_aips()
/linux-5.10/Documentation/driver-api/firmware/
Dother_interfaces.rst18 Some features of the Intel Stratix10 SoC require a level of privilege

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