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Searched full:prescaler (Results 1 – 25 of 174) sorted by relevance

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/linux-5.10/drivers/pwm/
Dpwm-sl28cpld.c10 * With the prescaler setting you can select which bit of the counter is used
16 * | prescaler | reset | counter bits | frequency | period length |
25 * - The hardware cannot generate a 100% duty cycle if the prescaler is 0.
26 * - The hardware cannot atomically set the prescaler and the counter value,
28 * - The counter is not reset if you switch the prescaler which leads
54 #define SL28CPLD_PWM_MAX_DUTY_CYCLE(prescaler) (1 << (7 - (prescaler))) argument
55 #define SL28CPLD_PWM_PERIOD(prescaler) \ argument
56 (NSEC_PER_SEC / SL28CPLD_PWM_CLK * SL28CPLD_PWM_MAX_DUTY_CYCLE(prescaler))
63 * max_period_ns = 1 << (7 - prescaler) / SL28CPLD_PWM_CLK * NSEC_PER_SEC
64 * max_duty_cycle = 1 << (7 - prescaler)
[all …]
Dpwm-sun4i.c119 unsigned int prescaler; in sun4i_pwm_get_state() local
141 prescaler = 1; in sun4i_pwm_get_state()
143 prescaler = prescaler_table[PWM_REG_PRESCAL(val, pwm->hwpwm)]; in sun4i_pwm_get_state()
145 if (prescaler == 0) in sun4i_pwm_get_state()
161 tmp = (u64)prescaler * NSEC_PER_SEC * PWM_REG_DTY(val); in sun4i_pwm_get_state()
164 tmp = (u64)prescaler * NSEC_PER_SEC * PWM_REG_PRD(val); in sun4i_pwm_get_state()
174 unsigned int prescaler = 0; in sun4i_pwm_calculate() local
189 /* First, test without any prescaler when available */ in sun4i_pwm_calculate()
190 prescaler = PWM_PRESCAL_MASK; in sun4i_pwm_calculate()
192 * When not using any prescaler, the clock period in nanoseconds in sun4i_pwm_calculate()
[all …]
Dpwm-renesas-tpu.c76 unsigned int prescaler; member
170 * - Set prescaler in tpu_pwm_timer_start()
176 pwm->prescaler); in tpu_pwm_timer_start()
225 pwm->prescaler = 0; in tpu_pwm_request()
250 unsigned int prescaler; in tpu_pwm_config() local
258 * Pick a prescaler to avoid overflowing the counter. in tpu_pwm_config()
259 * TODO: Pick the highest acceptable prescaler. in tpu_pwm_config()
263 for (prescaler = 0; prescaler < ARRAY_SIZE(prescalers); ++prescaler) { in tpu_pwm_config()
264 period = clk_rate / prescalers[prescaler] in tpu_pwm_config()
270 if (prescaler == ARRAY_SIZE(prescalers) || period == 0) { in tpu_pwm_config()
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Dpwm-rockchip.c49 unsigned int prescaler; member
78 tmp *= pc->data->prescaler * NSEC_PER_SEC; in rockchip_pwm_get_state()
82 tmp *= pc->data->prescaler * NSEC_PER_SEC; in rockchip_pwm_get_state()
109 * default prescaler value for all practical clock rate values. in rockchip_pwm_config()
113 pc->data->prescaler * NSEC_PER_SEC); in rockchip_pwm_config()
116 duty = DIV_ROUND_CLOSEST_ULL(div, pc->data->prescaler * NSEC_PER_SEC); in rockchip_pwm_config()
229 .prescaler = 2,
242 .prescaler = 1,
256 .prescaler = 1,
270 .prescaler = 1,
Dpwm-stm32.c198 /* prescaler: fit timeout window provided by upper layer */ in stm32_pwm_capture()
228 * - decrease counter clock prescaler, scale up to max rate. in stm32_pwm_capture()
229 * - use input prescaler, capture once every /2 /4 or /8 edges. in stm32_pwm_capture()
254 /* input prescaler: also keep arbitrary margin */ in stm32_pwm_capture()
264 /* Last chance to improve period accuracy, using input prescaler */ in stm32_pwm_capture()
277 * We may fall here using input prescaler, when input in stm32_pwm_capture()
326 unsigned int prescaler = 0; in stm32_pwm_config() local
329 /* Period and prescaler values depends on clock rate */ in stm32_pwm_config()
336 prescaler++; in stm32_pwm_config()
338 do_div(div, prescaler + 1); in stm32_pwm_config()
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Dpwm-tiehrpwm.c145 * set_prescale_div - Set up the prescaler divider function
146 * @rqst_prescaler: prescaler value min
147 * @prescale_div: prescaler value set
148 * @tb_clk_div: Time Base Control prescaler bits
158 * calculations for prescaler value : in set_prescale_div()
268 /* Configure clock prescaler to support Low frequency PWM wave */ in ehrpwm_pwm_config()
277 /* Update clock prescaler values */ in ehrpwm_pwm_config()
/linux-5.10/drivers/clocksource/
Dtimer-stm32.c200 * stm32_timer_set_prescaler - Compute and set the prescaler register
203 * Depending on the timer width, compute the prescaler to always
205 * considered precise and long enough to not use the prescaler.
209 int prescaler = 1; in stm32_timer_set_prescaler() local
212 prescaler = DIV_ROUND_CLOSEST(timer_of_rate(to), in stm32_timer_set_prescaler()
215 * The prescaler register is an u16, the variable in stm32_timer_set_prescaler()
219 prescaler = prescaler < TIM_PSC_MAX ? prescaler : TIM_PSC_MAX; in stm32_timer_set_prescaler()
222 writel_relaxed(prescaler - 1, timer_of_base(to) + TIM_PSC); in stm32_timer_set_prescaler()
226 /* Adjust rate and period given the prescaler value */ in stm32_timer_set_prescaler()
227 to->of_clk.rate = DIV_ROUND_CLOSEST(to->of_clk.rate, prescaler); in stm32_timer_set_prescaler()
Dtimer-microchip-pit64b.c201 /* Use the bigest prescaler if we didn't match one. */ in mchp_pit64b_pres_compute()
208 * runtime; this includes prescaler and SGCLK bit
216 * PMC and then using the internal PIT64B prescaler, if any, to reach the
219 * choosing the highest prescaler in case it doesn't locate one to match the
288 pr_info("PIT64B: using clk=%s with prescaler %u, freq=%lu [Hz]\n", in mchp_pit64b_init_mode()
392 /* Initialize mode (prescaler + SGCK bit). To be used at runtime. */ in mchp_pit64b_dt_init_timer()
/linux-5.10/drivers/watchdog/
Dcadence_wdt.c34 /* Clock prescaler value and selection */
67 * @prescaler: for saving prescaler value
68 * @ctrl_clksel: counter clock prescaler selection
78 u32 prescaler; member
163 * calculated count = (timeout * clock) / prescaler + 1.
166 * Clears the contents of prescaler and counter reset value. Sets the
167 * prescaler to 4096 and the calculated count and access key
186 count = (wdd->timeout * (clock_f / wdt->prescaler)) / in cdns_wdt_start()
353 wdt->prescaler = CDNS_WDT_PRESCALE_512; in cdns_wdt_probe()
356 wdt->prescaler = CDNS_WDT_PRESCALE_4096; in cdns_wdt_probe()
Dmpc8xxx_wdt.c44 int prescaler; member
186 ddata->swtc = min(ddata->wdd.timeout * freq / wdt_type->prescaler, in mpc8xxx_wdt_probe()
197 ddata->wdd.max_hw_heartbeat_ms = (ddata->swtc * wdt_type->prescaler) / in mpc8xxx_wdt_probe()
219 .prescaler = 0x10000,
226 .prescaler = 0x10000,
234 .prescaler = 0x800,
Dmt7621_wdt.c73 /* set the prescaler to 1ms == 1000us */ in mt7621_wdt_start()
150 * the prescaler of this driver here into account (the in mt7621_wdt_probe()
151 * boot loader might be using a different prescaler). in mt7621_wdt_probe()
154 * we first disable the watchdog, set the new prescaler in mt7621_wdt_probe()
Dstm32_iwdg.c26 #define IWDG_PR 0x04 /* Prescaler Register */
46 #define SR_PVU BIT(0) /* Watchdog prescaler value update */
100 /* The prescaler is align on power of 2 and start at 2 ^ PR_SHIFT. */ in stm32_iwdg_start()
108 /* set prescaler & reload registers */ in stm32_iwdg_start()
118 dev_err(wdd->parent, "Fail to set prescaler, reload regs\n"); in stm32_iwdg_start()
Dkempld_wdt.c135 u32 prescaler; in kempld_wdt_set_stage_timeout() local
141 prescaler = kempld_prescaler[PRESCALER_21]; in kempld_wdt_set_stage_timeout()
147 remainder = do_div(stage_timeout64, prescaler); in kempld_wdt_set_stage_timeout()
177 u32 prescaler; in kempld_wdt_get_timeout() local
186 prescaler = kempld_prescaler[STAGE_CFG_GET_PRESCALER(stage_cfg)]; in kempld_wdt_get_timeout()
188 stage_timeout = (stage_timeout & stage->mask) * prescaler; in kempld_wdt_get_timeout()
/linux-5.10/Documentation/ABI/testing/
Dsysfs-bus-counter-ftm-quaddec9 What: /sys/bus/counter/devices/counterX/countY/prescaler
13 Configure the prescaler value associated with Count Y.
15 prescaler (i.e. a counter). This acts like a clock
/linux-5.10/arch/powerpc/sysdev/
Dfsl_gtm.c170 unsigned int prescaler; in gtm_set_ref_timer16() local
177 /* CPM2 doesn't have primary prescaler */ in gtm_set_ref_timer16()
181 prescaler = gtm->clock / frequency; in gtm_set_ref_timer16()
187 if (prescaler > max_prescaler) in gtm_set_ref_timer16()
190 if (prescaler > max_prescaler / 16) { in gtm_set_ref_timer16()
192 prescaler /= 16; in gtm_set_ref_timer16()
195 if (prescaler <= 256) { in gtm_set_ref_timer16()
197 sps = prescaler - 1; in gtm_set_ref_timer16()
200 sps = prescaler / 256 - 1; in gtm_set_ref_timer16()
366 /* CPM2 doesn't have primary prescaler */ in gtm_set_shortcuts()
/linux-5.10/Documentation/devicetree/bindings/power/supply/
Dltc2941.txt16 - lltc,prescaler-exponent: The prescaler exponent as explained in the datasheet.
27 lltc,prescaler-exponent = <5>; /* 2^(2*5) = 1024 */
/linux-5.10/drivers/thermal/st/
Dstm_thermal.c203 u32 prescaler; in stm_thermal_calibration() local
205 /* Figure out prescaler value for PCLK during calibration */ in stm_thermal_calibration()
210 prescaler = 0; in stm_thermal_calibration()
213 while (prescaler <= clk_freq) in stm_thermal_calibration()
214 prescaler++; in stm_thermal_calibration()
219 /* Clear prescaler */ in stm_thermal_calibration()
222 /* Set prescaler. pclk_freq/prescaler < 1MHz */ in stm_thermal_calibration()
223 value |= (prescaler << HSREF_CLK_DIV_POS); in stm_thermal_calibration()
/linux-5.10/drivers/i2c/busses/
Di2c-mpc.c356 * According to the AN2919 all MPC824x have prescaler 1, while MPC83xx in mpc_i2c_get_prescaler_8xxx()
357 * may have prescaler 1, 2, or 3, depending on the power-on in mpc_i2c_get_prescaler_8xxx()
360 u32 prescaler = 1; in mpc_i2c_get_prescaler_8xxx() local
374 /* the above 85xx SoCs have prescaler 1 */ in mpc_i2c_get_prescaler_8xxx()
375 prescaler = 1; in mpc_i2c_get_prescaler_8xxx()
378 /* the above 85xx SoCs have prescaler 3 or 2 */ in mpc_i2c_get_prescaler_8xxx()
379 prescaler = mpc_i2c_get_sec_cfg_8xxx() ? 3 : 2; in mpc_i2c_get_prescaler_8xxx()
381 /* all the other 85xx have prescaler 2 */ in mpc_i2c_get_prescaler_8xxx()
382 prescaler = 2; in mpc_i2c_get_prescaler_8xxx()
385 return prescaler; in mpc_i2c_get_prescaler_8xxx()
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/linux-5.10/drivers/tty/serial/
Dmpc52xx_uart.c121 /* setting the prescaler and divisor reg is common for all chips */
123 u16 prescaler, unsigned int divisor) in mpc52xx_set_divisor() argument
125 /* select prescaler */ in mpc52xx_set_divisor()
126 out_be16(&psc->mpc52xx_psc_clock_select, prescaler); in mpc52xx_set_divisor()
293 /* The 5200 has a fixed /32 prescaler, uartclk contains the ipb freq */ in mpc5200_psc_set_baudrate()
299 /* enable the /32 prescaler and set the divisor */ in mpc5200_psc_set_baudrate()
310 u16 prescaler; in mpc5200b_psc_set_baudrate() local
312 /* The 5200B has a selectable /4 or /32 prescaler, uartclk contains the in mpc5200b_psc_set_baudrate()
319 /* select the proper prescaler and set the divisor in mpc5200b_psc_set_baudrate()
320 * prefer high prescaler for more tolerance on low baudrates */ in mpc5200b_psc_set_baudrate()
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/linux-5.10/drivers/iio/adc/
Daspeed_adc.c191 /* Register ADC clock prescaler with source specified by device tree. */ in aspeed_adc_probe()
196 &pdev->dev, "prescaler", clk_parent_name, 0, in aspeed_adc_probe()
203 * Register ADC clock scaler downstream from the prescaler. Allow rate in aspeed_adc_probe()
204 * setting to adjust the prescaler as well. in aspeed_adc_probe()
207 &pdev->dev, "scaler", "prescaler", in aspeed_adc_probe()
/linux-5.10/Documentation/devicetree/bindings/mfd/
Dst,stm32-timers.yaml12 by a programmable prescaler, break input feature, PWM outputs and
15 driven by a programmable prescaler and PWM outputs.
17 programmable prescaler.
/linux-5.10/arch/powerpc/kernel/
Dudbg_16550.c126 unsigned int dll, dlm, divisor, prescaler, speed; in udbg_probe_uart_speed() local
141 prescaler = 4; in udbg_probe_uart_speed()
143 prescaler = 1; in udbg_probe_uart_speed()
149 speed = (clock / prescaler) / (divisor * 16); in udbg_probe_uart_speed()
/linux-5.10/drivers/hwmon/
Dmax6650.c38 /* prescaler: Possible values are 1, 2, 4, 8, 16 or 0 for don't change */
39 static int prescaler; variable
44 module_param(prescaler, int, 0444);
233 * 2) The prescaler (low three bits of the config register) has already
234 * been set to an appropriate value. Use the prescaler module parameter
252 * KSCALE is the prescaler value (1, 2, 4, 8, or 16)
375 prescale = prescaler; in max6650_init_client()
419 dev_err(dev, "illegal value for prescaler (%d)\n", prescale); in max6650_init_client()
422 dev_info(dev, "Fan voltage: %dV, prescaler: %d.\n", in max6650_init_client()
/linux-5.10/drivers/usb/serial/
Dkeyspan.c69 u8 *prescaler, int portnum);
73 u8 *prescaler, int portnum);
77 u8 *prescaler, int portnum);
81 u8 *prescaler, int portnum);
196 u8 *rate_hi, u8 *rate_low, u8 *prescaler,
1858 /* usa19 function doesn't require prescaler */
1861 u8 *rate_low, u8 *prescaler, int portnum) in keyspan_usa19_calc_baud() argument
1899 /* usa19hs function doesn't require prescaler */
1902 u8 *rate_low, u8 *prescaler, int portnum) in keyspan_usa19hs_calc_baud() argument
1938 u8 *rate_low, u8 *prescaler, int portnum) in keyspan_usa19w_calc_baud() argument
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/linux-5.10/arch/arm/mach-omap2/
Dvc.c470 * Calculates voltage ramp prescaler + counter values for a voltage
473 * bits[8:9] prescaler ... bits[0:5] counter. See OMAP4 TRM for reference.
477 u32 prescaler; in omap4_calc_volt_ramp() local
486 prescaler = 0; in omap4_calc_volt_ramp()
488 /* shift to next prescaler until no overflow */ in omap4_calc_volt_ramp()
493 prescaler++; in omap4_calc_volt_ramp()
499 prescaler++; in omap4_calc_volt_ramp()
505 prescaler++; in omap4_calc_volt_ramp()
517 return (prescaler << OMAP4430_RAMP_UP_PRESCAL_SHIFT) | in omap4_calc_volt_ramp()

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