Home
last modified time | relevance | path

Searched +full:power +full:- +full:domain (Results 1 – 25 of 1124) sorted by relevance

12345678910>>...45

/linux-6.15/Documentation/devicetree/bindings/power/
Dmediatek,power-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/mediatek,power-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek Power Domains Controller
10 - MandyJH Liu <mandyjh.liu@mediatek.com>
11 - Matthias Brugger <mbrugger@suse.com>
14 Mediatek processors include support for multiple power domains which can be
15 powered up/down by software based on different application scenes to save power.
17 IP cores belonging to a power domain should contain a 'power-domains'
[all …]
Dpower-domain.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/power-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rafael J. Wysocki <rjw@rjwysocki.net>
11 - Kevin Hilman <khilman@kernel.org>
12 - Ulf Hansson <ulf.hansson@linaro.org>
16 used for power gating of selected IP blocks for power saving by reduced
20 This device tree binding can be used to bind PM domain consumer devices with
21 their PM domains provided by PM domain providers. A PM domain provider can be
[all …]
Drockchip,power-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip Power Domains
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
14 Rockchip processors include support for multiple power domains
16 application scenarios to save power.
18 Power domains contained within power-controller node are
[all …]
Dfsl,imx-gpcv2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/fsl,imx-gpcv2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX General Power Controller v2
10 - Andrey Smirnov <andrew.smirnov@gmail.com>
13 The i.MX7S/D General Power Control (GPC) block contains Power Gating
14 Control (PGC) for various power domains.
16 Power domains contained within GPC node are generic power domain
18 Documentation/devicetree/bindings/power/power-domain.yaml, which are
[all …]
Dpower_domain.txt4 used for power gating of selected IP blocks for power saving by reduced leakage
7 This device tree binding can be used to bind PM domain consumer devices with
8 their PM domains provided by PM domain providers. A PM domain provider can be
11 phandle arguments (so called PM domain specifiers) of length specified by the
12 #power-domain-cells property in the PM domain provider node.
14 ==PM domain providers==
16 See power-domain.yaml.
18 ==PM domain consumers==
21 - power-domains : A list of PM domain specifiers, as defined by bindings of
22 the power controller that is the PM domain provider.
[all …]
Dfsl,imx-gpc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/fsl,imx-gpc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX General Power Controller
10 - Philipp Zabel <p.zabel@pengutronix.de>
13 The i.MX6 General Power Control (GPC) block contains DVFS load tracking
14 counters and Power Gating Control (PGC).
16 The power domains are generic power domain providers as documented in
17 Documentation/devicetree/bindings/power/power-domain.yaml. They are
[all …]
Drenesas,sysc-rmobile.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/renesas,sysc-rmobile.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Mobile System Controller
10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 - Magnus Damm <magnus.damm@gmail.com>
14 The R-Mobile System Controller provides the following functions:
15 - Boot mode management,
16 - Reset generation,
[all …]
/linux-6.15/Documentation/devicetree/bindings/clock/
Dfsl,imx8-acm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/fsl,imx8-acm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
19 - fsl,imx8dxl-acm
20 - fsl,imx8qm-acm
21 - fsl,imx8qxp-acm
26 power-domains:
30 '#clock-cells':
[all …]
/linux-6.15/arch/arm64/boot/dts/apple/
Ds8001-pmgr.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * PMGR Power domains for the Apple S8001 "A9X" SoC
9 ps_cpu0: power-controller@80000 {
10 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
12 #power-domain-cells = <0>;
13 #reset-cells = <0>;
15 apple,always-on; /* Core device */
18 ps_cpu1: power-controller@80008 {
19 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
21 #power-domain-cells = <0>;
[all …]
Dt8103-pmgr.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * PMGR Power domains for the Apple T8103 "M1" SoC
10 ps_sbr: power-controller@100 {
11 compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
13 #power-domain-cells = <0>;
14 #reset-cells = <0>;
16 apple,always-on; /* Core device */
19 ps_aic: power-controller@108 {
20 compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
22 #power-domain-cells = <0>;
[all …]
Dt8112-pmgr.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * PMGR Power domains for the Apple T8112 "M2" SoC
10 ps_sbr: power-controller@100 {
11 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
13 #power-domain-cells = <0>;
14 #reset-cells = <0>;
16 apple,always-on; /* Core device */
19 ps_aic: power-controller@108 {
20 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
22 #power-domain-cells = <0>;
[all …]
Dt8011-pmgr.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * PMGR Power domains for the Apple T8011 "A10X" SoC
9 ps_cpu0: power-controller@80000 {
10 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";
12 #power-domain-cells = <0>;
13 #reset-cells = <0>;
15 apple,always-on; /* Core device */
18 ps_cpu1: power-controller@80008 {
19 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";
21 #power-domain-cells = <0>;
[all …]
Dt8015-pmgr.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * PMGR Power domains for the Apple T8015 "A11" SoC
9 ps_cpu0: power-controller@80000 {
10 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
12 #power-domain-cells = <0>;
13 #reset-cells = <0>;
15 apple,always-on; /* Core device */
18 ps_cpu1: power-controller@80008 {
19 compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
21 #power-domain-cells = <0>;
[all …]
Ds5l8960x-pmgr.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * PMGR Power domains for the Apple S5L8960X "A7" SoC
9 ps_cpu0: power-controller@20000 {
10 compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
12 #power-domain-cells = <0>;
13 #reset-cells = <0>;
15 apple,always-on; /* Core device */
18 ps_cpu1: power-controller@20008 {
19 compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
21 #power-domain-cells = <0>;
[all …]
Dt8012-pmgr.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * PMGR Power domains for the Apple T8012 "T2" SoC
9 ps_cpu0: power-controller@80000 {
10 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";
12 #power-domain-cells = <0>;
13 #reset-cells = <0>;
15 apple,always-on; /* Core device */
18 ps_cpu1: power-controller@80008 {
19 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";
21 #power-domain-cells = <0>;
[all …]
Dt8010-pmgr.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * PMGR Power domains for the Apple T8010 "A10" SoC
9 ps_cpu0: power-controller@80000 {
10 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";
12 #power-domain-cells = <0>;
13 #reset-cells = <0>;
15 apple,always-on; /* Core device */
18 ps_cpu1: power-controller@80008 {
19 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";
21 #power-domain-cells = <0>;
[all …]
Dt7001-pmgr.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * PMGR Power domains for the Apple T7001 "A8X" SoC
9 ps_cpu0: power-controller@20000 {
10 compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
12 #power-domain-cells = <0>;
13 #reset-cells = <0>;
15 apple,always-on; /* Core device */
18 ps_cpu1: power-controller@20008 {
19 compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
21 #power-domain-cells = <0>;
[all …]
Dt7000-pmgr.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * PMGR Power domains for the Apple T7000 "A8" SoC
8 ps_cpu0: power-controller@20000 {
9 compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
11 #power-domain-cells = <0>;
12 #reset-cells = <0>;
14 apple,always-on; /* Core device */
17 ps_cpu1: power-controller@20008 {
18 compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";
20 #power-domain-cells = <0>;
[all …]
Ds800-0-3-pmgr.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * PMGR Power domains for the Apple S8000/3 "A9" SoC
9 ps_cpu0: power-controller@80000 {
10 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
12 #power-domain-cells = <0>;
13 #reset-cells = <0>;
15 apple,always-on; /* Core device */
18 ps_cpu1: power-controller@80008 {
19 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
21 #power-domain-cells = <0>;
[all …]
Dt600x-pmgr.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * PMGR Power domains for the Apple T6001 "M1 Max" SoC
9 DIE_NODE(ps_pms_bridge): power-controller@100 {
10 compatible = "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate";
12 #power-domain-cells = <0>;
13 #reset-cells = <0>;
15 apple,always-on; /* Core device */
18 DIE_NODE(ps_aic): power-controller@108 {
19 compatible = "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate";
21 #power-domain-cells = <0>;
[all …]
/linux-6.15/Documentation/devicetree/bindings/soc/mediatek/
Dscpsys.txt4 The System Control Processor System (SCPSYS) has several power management
7 The System Power Manager (SPM) inside the SCPSYS is for the MTCMOS power
8 domain control.
10 The driver implements the Generic PM domain bindings described in
11 power/power-domain.yaml. It provides the power domains defined in
12 - include/dt-bindings/power/mt8173-power.h
13 - include/dt-bindings/power/mt6797-power.h
14 - include/dt-bindings/power/mt6765-power.h
15 - include/dt-bindings/power/mt2701-power.h
16 - include/dt-bindings/power/mt2712-power.h
[all …]
/linux-6.15/include/dt-bindings/power/
Dqcom-rpmpd.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 /* SA8775P Power Domain Indexes */
26 /* SDM670 Power Domain Indexes */
36 /* SDM845 Power Domain Indexes */
47 /* SDX55 Power Domain Indexes */
52 /* SDX65 Power Domain Indexes */
60 /* SM6350 Power Domain Indexes */
68 /* SM6375 Power Domain Indexes */
80 /* SM8150 Power Domain Indexes */
102 /* SM8250 Power Domain Indexes */
[all …]
/linux-6.15/Documentation/devicetree/bindings/soc/imx/
Dfsl,imx8mm-vpu-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MM VPU blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MM VPU blk-ctrl is a top-level peripheral providing access to
14 the NoC and ensuring proper power sequencing of the VPU peripherals
15 located in the VPU domain of the SoC.
20 - const: fsl,imx8mm-vpu-blk-ctrl
[all …]
/linux-6.15/Documentation/power/regulator/
Doverview.rst11 The intention is to allow systems to dynamically control regulator power output
12 in order to save power and prolong battery life. This applies to both voltage
26 - Regulator
27 - Electronic device that supplies power to other devices.
31 Input Voltage -> Regulator -> Output Voltage
34 - PMIC
35 - Power Management IC. An IC that contains numerous
39 - Consumer
40 - Electronic device that is supplied power by a regulator.
41 Consumers can be classified into two types:-
[all …]
/linux-6.15/arch/arm64/boot/dts/qcom/
Dsm4450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm4450-camcc.h>
8 #include <dt-bindings/clock/qcom,sm4450-dispcc.h>
9 #include <dt-bindings/clock/qcom,sm4450-gcc.h>
10 #include <dt-bindings/clock/qcom,sm4450-gpucc.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
16 interrupt-parent = <&intc>;
[all …]

12345678910>>...45